Voltage Regulators
1
Publication date: November 2001 SDH00007CEB
AN8017SA
1.8-volt 2-channel step-up DC-DC converter control IC
■Overview
The AN8017SA is a two-channel PWM DC-DC con-
verter control IC that features low-voltage operation.
This IC can obtain the step-up voltage with a small
number of external components.
The minimum operating voltage is as low as 1.8 V so
that it can operate with two dry batteries. In addition,
since it uses the 16-pin surface mounting type package
with 0.65 mm pitch, it is suitable for a miniaturized highly
efficient potable power supply.
■Features
•Wide operating supply voltage range (1.8 V to 14 V)
•Incorporating a high precision reference voltage circuit
(allowance: ± 2%)
•Control in a wide output frequency range is possible
(20 kHz to 1 MHz)
•Built-in wideband error amplifier
(single gain bandwidth: 10 MHz typical)
•A built-in timer latch short-circuit protection circuit
(charge current: 1.1 µA typical)
•Incorporating an under-voltage lock-out circuit (U.V.L.O.)
(circuit operation-starting voltage: 1.67 V typical)
•Dead-time is variable
•Flatness of switching current can be obtained by staggering the turn-on timing of each channel
•Built-in unlatch function
When DT1 pin is low level or DT2 pin is high level, independent turn-off is possible.
•Incorporating an on/off control function
(active-high control input, standby mode current: 1 µA maximum)
•Parallel operation is possible
•Totem pole output
• Output source-current: −50 mA maximum (Constant current output with a less supply voltage fluctuation is possible
by connecting an external resistor to pin 6 and pin 11)
• Output sink-current: +80 mA maximum
■Applications
•LCD displays, digital still cameras, and PDAs
SSOP016-P-0225A
18
0.50±0.20
(1.0)
0° to 10°
16
5.00±0.20
4.40±0.20
6.40±0.30
9
0.65
(0.225)
0.22
+0.10
–0.05
0.15
+0.10
–0.05
Seating plane
1.4 max.
(Overall height)
Unit: mm
Note) The package of this product will be changed
to lead-free type (SSOP016-P-0225E). See the
package dimensions section later of this
datasheet.
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AN8017SA
2SDH00007CEB
■Pin Descriptions
■Block Diagram
RB1
6
Out1
7
GND
8
Off 15
IN+214
FB2 13
1.19 V
H
L
FB1 4
IN−13
V
REF
16
OSC
1
DT1
5
V
CC
9
DT2 12
S.C.P. 2
U.V.L.O.
Error amp.1
Error
amp.2
S.C.P.
comp. V
REF
Unlatch2
Unlatch1
Q
R
S
Triangular wave
oscillation
Reference
voltage source
V
REF
On/off
control
Latch
V
CC
1.19 V
1.19 V
0.9 V
0.9 V
V
CC
PWM1
0.9 V
0.22 V
0.2 V
0.9 V
V
REF
V
REF
RB2
11
Out2
10
PWM2
Pin No. Symbol Description
1 OSC Pin for connecting a oscillation timing
resistor and capacitor
2 S.C.P.
Pin for connecting the time constant set-
ting capacitor for short-circuit protection
3IN−1 Inverting input pin to error amplifier
1 block
4 FB1 Output pin of error amplifier 1 block
5 DT1 PWM1 block dead-time setting pin
6 RB1 Out1 block output source current
setting resistor connection pin
7 Out1 Out1 block push-pull type output pin
Pin No. Symbol Description
8 GND Grounding pin
9V
CC Power supply voltage application pin
10 Out2 Out2 block push-pull type output pin
11 RB2 Out2 block output source current
setting resistor connection pin
12 DT2 PWM2 block dead-time setting pin
13 FB2 Output pin of error amplifier 2 block
14 IN+2 Error amplifier 2 block noninverting
input pin
15 Off On/off control pin
16 VREF Reference voltage output pin
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AN8017SA
3
SDH00007CEB
■Absolute Maximum Ratings
Parameter Symbol Rating Unit
Supply voltage VCC 15 V
Off terminal allowable application voltage VOFF 15 V
IN−1 terminal allowable application voltage *2VIN−16V
IN+2 terminal allowable application voltage *2VIN+26V
Supply current ICC mA
Output source current ISO(OUT) −50 mA
Output sink current ISI(OUT) +80 mA
Power dissipation *1PD135 mW
Operating ambient temperature Topr −30 to +85 °C
Storage temperature Tstg −55 to +150 °C
■Recommended Operating Range
Parameter Symbol Range Unit
Supply voltage VCC 1.8 to 14 V
Off control terminal application voltage VOFF 0 to 14 V
Output source current ISO(OUT) −40 (minimum) mA
Output sink current ISI(OUT) 70 (maximum) mA
Timing resistance RT1 to 51 kΩ
Timing capacitance CT100 to 10
000 pF
Oscillation frequency fOUT 20 to 1
000 kHz
Short-circuit protection time constant CSCP 1
000 (minimum) pF
setting capacitance
Output current setting resistance RB180 to 15
000 Ω
Note) 1. Do not apply external currents or voltages to any pins not specifically mentioned.
For the circuit currents, '+' denotes current flowing into the IC, and '−' denotes current flowing out of the IC.
2. Except for the power dissipation, operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
3. *1: Ta = 85 °C. For the independent IC without a heat sink. Note that applications must observe the derating curve for the
relationship between the IC power consumption and the ambient temperature.
*2: VIN−1 , VIN+2 = VCC when VCC < 6 V.
■Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C
Parameter Symbol Conditions Min Typ Max Unit
Reference voltage block
Reference voltage VREF IREF = − 0.1 mA 1.166 1.19 1.214 V
Input regulation with input fluctuation Line VCC = 1.8 V to 14 V 15 30 mV
Load regulation Load IREF = − 0.1 mA to −1 mA −20 −5mV
U.V.L.O. block
Circuit operation start voltage VUON 1.59 1.67 1.75 V
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AN8017SA
4SDH00007CEB
■Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C (continued)
Parameter Symbol Conditions Min Typ Max Unit
Error amplifier 1 block
Input threshold voltage 1 VTH1 1.16 1.19 1.22 V
Input bias current 1 IB1 0.2 0.8 µA
High-level output voltage 1 VEH1 0.83 0.93 1.03 V
Low-level output voltage 1 VEL1 0.2 V
Output source current 1 ISO(FB)1 −61 −47 −33 µA
Output sink current 1 ISI(FB)1 33 47 61 µA
Error amplifier 2 block
Input threshold voltage 2 VTH2 1.16 1.19 1.22 V
Input bias current 2 IB2 0.2 0.8 µA
High-level output voltage 2 VEH2 0.83 0.93 1.03 V
Low-level output voltage 2 VEL2 0.2 V
Output source current 2 ISO(FB)2 −61 −47 −33 µA
Output sink current 2 ISI(FB)2 33 47 61 µA
Oscillator block
Output off threshold voltage VTH(OSC) 0.8 0.9 1.0 V
Output 1 block
Oscillation frequency 1 fOUT1 RT = 12 kΩ, CT = 330 pF 185 205 225 kHz
Output duty ratio 1 Du173 78 83 %
High-level output voltage 1 VOH1 IO = −10 mA, RB = 820 Ω1.4 V
Low-level output voltage 1 VOL1 IO = 10 mA, RB = 820 Ω0.2 V
Output source current 1 ISO(OUT)1 VO = 0.7 V, RB = 820 Ω−40 −30 −20 mA
Output sink current 1 ISI(OUT)1 VO = 0.7 V, RB = 820 Ω20 mA
Pull-down resistance 1 RO1 20 30 40 kΩ
Output 2 block
Oscillation frequency 2 fOUT2 RT = 12 kΩ, CT = 330 pF 185 205 225 kHz
Output duty ratio 2 Du272 77 82 %
High-level output voltage 2 VOH2 IO = −10 mA, RB = 820 Ω1.4 V
Low-level output voltage 2 VOL2 IO = 10 mA, RB = 820 Ω0.2 V
Output source current 2 ISO(OUT)2 VO = 0.7 V, RB = 820 Ω−40 −30 −20 mA
Output sink current 2 ISI(OUT)2 VO = 0.7 V, RB = 820 Ω20 mA
Pull-down resistance 2 RO2 20 30 40 kΩ
PWM1 block
Output full-off input threshold voltage 1 VT0-1 Duty = 0% 0.28 0.30 V
Output full-on input threshold voltage 1 VT100-1 Duty = 100% 0.65 0.72 V
Input current 1 IDT1 VDT1 = 0.5 V −1.1 − 0.5 µA
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AN8017SA
5
SDH00007CEB
■Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25 °C (continued)
Parameter Symbol Conditions Min Typ Max Unit
PWM2 block
Output full-off input threshold voltage 2 VT0-2 Duty = 0% 0.65 0.72 V
Output full-on input threshold voltage 2 VT100-2 Duty = 100% 0.28 0.30 V
Input current 2 IDT2 VDT2 = 0.2 V −1.1 − 0.5 µA
Unlatch circuit 1 block
Input threshold voltage 1 VTHUL1 0.15 0.20 0.25 V
Unlatch circuit 2 block
Input threshold voltage 2 VTHUL2 0.8 0.9 1.0 V
Short-circuit protection circuit block
Input standby voltage VSTBY 60 120 mV
Input threshold voltage 1 VTHPC1 0.8 0.9 1.0 V
Input threshold voltage 2 VTHPC2 0.17 0.22 0.27 V
Input latch voltage VIN 60 120 mV
Charge current ICHG VSCP = 0 V −1.43 −1.1 − 0.77 µA
On/off control block
Input threshold voltage VON(TH) 0.8 1.0 1.3 V
Whole device
Output off consumption current ICC(OFF) RB = 820 Ω, duty = 0% 7.0 9.8 mA
Latch mode consumption current ICC(LA) RB = 820 Ω5.6 7.8 mA
Standby current ICC(SB) 1µA
•Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
Reference voltage block
VREF temperature characteristics VREFdT Ta = −30°C to +85°C−1+1%
Over-current protection drive current IOC −11 mA
U.V.L.O. block
Reset voltage VR0.8 V
Error amplifier 1/2 blocks
VTH temperature characteristics VTHdT Ta = −30°C to +85°C− 0.3 + 0.3 mV/°C
Open-loop gain AV57 dB
Single gain bandwidth fBW 10 MHz
Output 1/2 blocks
RB terminal voltage VB0.36 V
Frequency supply voltage characteristics fdV −1+1%
Frequency temperature characteristics fdT −3+3%
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AN8017SA
6SDH00007CEB
■Terminal Equivalent Circuits
Pin No. Equivalent circuit Description I/O
1 OSC: O
The terminal used for connecting a timing capaci-
tor/resistor to set oscillation frequency.
Use a capacitance value within the range of 100 pF
to 10
000 pF and a resistance value within the range
of 1 kΩ to 51 kΩ. Use an oscillation frequency in the
range of 20 kHz to 1 MHz. In a parallel synchronous
operation, the channel 2 output stops when this pin
becomes 0.9 V or more.
(Refer to the "Application Notes, [7]" section.)
2 S.C.P.: O
The terminal for connecting a capacitor to set the
time constant of the timer latch short-circuit protec-
tion circuit. Use a capacitance value in the range of
1
000 pF or more. The charge current ICHG is 1.1 µA
typical.
3IN−1: I
The inverting input pin for error amplifier 1 block.
■Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C (continued)
•Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
Short-circuit protection block
Comparator threshold voltage VTHL 1.19 V
On/off control block
Off terminal current IOFF 23 µA
Q
S
Latch
0.2 V R
V
CC
1
Q
S
Latch
1.19 V R
1.1 µA
Output
cut-off
VCC
2
2 kΩ
100 Ω
VCC
1.19 V
3
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AN8017SA
7
SDH00007CEB
■Terminal Equivalent Circuits (continued)
Pin No. Equivalent circuit Description I/O
4 FB1: O
The output pin for error amplifier 1 block.
The source current is −47 µA and the sink current is
47 µA.
Correct the frequency characteristics of the gain and
the phase by connecting a resistor and a capacitor
between this terminal and GND.
5 DT1: I
The pin for setting channel 1 output maximum duty
ratio.
If this terminal is set at a voltage of 0.20 V or less,
FB1 terminal becomes low-level voltage and the
protective function for channel 1 output short-cir-
cuit will stop (Unlatch function).
6 RB1: I
The pin for connecting a resistor for setting channel
1 output current.
Use a resistance value in the range of 180 Ω to 15 kΩ.
The terminal voltage is 0.36 V (at RB1 = 820 Ω).
Please refer to the "Usage Notes [2]", if you intend
to directly drive a n-channel MOSFET from this
pin.
7 Out1: O
The pin is push-pull type output terminal.
The absolute maximum ratings of output current are
−50 mA for the source current and +80 mA for the
sink current.
A constant current output with less fluctuation with
power supply voltage and dispersion can be ob-
tained by the resistor externally attached to RB1
pin.
ISO(OUT)1 = 68 ×VRB1 [A]
RB1
8 GND:
Grounding terminal
9V
CC:
The supply voltage application terminal
Use the operating supply voltage in the range of
1.8 V to 14 V.
V
CC
IN−1
4
1.19 V
47 µA
OSC PWM
47 µA
VCC
FB1
5
0.20 V
OSC PWM
VCC
6
120 Ω30 kΩ
Out1
VCC
ISO(OUT)1
7
30 kΩ
RB1
8
9
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AN8017SA
8SDH00007CEB
■Terminal Equivalent Circuits (continued)
Pin No. Equivalent circuit Description I/O
10 Out2: O
The pin is push-pull type output terminal.
The absolute maximum ratings of output current are
−50 mA for the source current and +80 mA for the
sink current.
A constant current output with less fluctuation with
power supply voltage and dispersion can be ob-
tained by the resistor externally attached to RB2
pin.
ISO(OUT)2 = 68 ×VRB2 [A]
RB2
11 RB2: I
The pin for connecting a resistor for setting channel
2 output current.
Use a resistance value in the range of 180 Ω to 15
kΩ.
The terminal voltage is 0.36 V (at RB2 = 820 Ω).
Please refer to the "Usage Notes [2]", if you intend to
directly drive a n-channel MOSFET from this pin.
12 DT2: I
The pin for setting channel 2 output maximum duty
ratio.
If this terminal is set at a voltage of 0.9 V or more,
FB2 terminal becomes high-level voltage and the
protective function for channel 2 output short-cir-
cuit will stop (Unlatch function).
13 FB2: O
The output pin for error amplifier.
The source current is −47 µA and the sink current is
47 µA.
Correct the frequency characteristics of the gain and
the phase by connecting a resistor and a capacitor
between this terminal and GND.
14 IN+2: I
The noninverting input pin for error amplifier 2
block.
VCC
ISO(OUT)2
10
30 kΩ
RB2
V
CC
11
120 Ω30 kΩ
Out2
VCC
FB2
12
0.9 V
OSC PWM
0.9 V
V
CC
IN+2
13
1.19 V
47 µA
OSC PWM
47 µA
100 Ω
VCC
1.19 V
14
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AN8017SA
9
SDH00007CEB
■Terminal Equivalent Circuits (continued)
Pin No. Equivalent circuit Description I/O
15 Off: I
The terminal for on/off control.
High-level input: Normal operation (VOFF > 1.3 V)
Low-level input: Standby state (VOFF < 0.8 V)
The total current consumption in the standby state
can be suppressed to a value of 1 µA or less.
16 VREF:O
The output terminal for the internal reference volt-
age.
The reference voltage is 1.19 V (allowance: ± 2%)
at VCC = 2.4 V and IREF = − 0.1 mA.
Connect a capacitor of 0.01 µF or more between
VREF and GND for phase compensation.
30 kΩ
Internal circuit
start/stop
60 kΩ
15
VCC
16
■Usage Notes
[1] The loss, P of this IC increases in proportion to the supply voltage. Use the IC so as not to exceed the allowable
power dissipation of package, PD .
Reference formula:
P = (VCC − VBEQ1) × ISO(OUT)1 × Du1 + (VCC − VBEQ2) × ISO(OUT)2 × Du2 + VCC × ICC < PD
VBEQ1 : Base-emitter voltage of npn transistor Q1
ISO(OUT)1 : Out1 terminal output source current
(set by RB1, ISO(OUT)1 = 40 mA maximum at RB1 = 820 Ω)
Du1: Output1 duty ratio
VBEQ2 : Base-emitter voltage of npn transistor Q2
ISO(OUT)2 : Out2 terminal output source current
(set by RB2, ISO(OUT)2 = 40 mA maximum at RB2 = 820 Ω)
Du2: Output2 duty ratio
ICC :V
CC terminal current (8.0 mA maximum where VCC = 2.4 V)
[2] Since the output of the AN8017SA is assuming the bipolar transistor driving, it is necessary to pay attention to the
following points when an n-channel MOSFET is driven directly.
1. Select an n-channel MOSFET having a low input capacitance
The AN8017SA is of the constant current (50 mA maxi-
mum) output source current type circuit assuming the bipo-
lar transistor driving. Also, its sink current capability is around
80 mA maximum. For those reason, it is necessary to pay
attention to the increase of loss due to the extension of the
output rise time and the output fall time.
If any problem arises, there is a method to solve it by
amplifying with inverters as shown in figure 1.
SBD
VIN
Figure 1. Output bootstrap circuit example
Pins 7,10
Out
VOUT
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AN8017SA
10 SDH00007CEB
V
CC
ripple frequency (MHz)
0.1
100
1.510.3 0.50
V
CC
ripple width (V[p-p])
0.5
1
2
10
Recommended
operating range
■Usage Notes (continued)
2. Select an n-channel MOSFET having a low gate
threshold value
The high-level output voltage of out pin of the
AN8017SA is VCC − 1.0 V minimum, so that it is
necessary to select a low VT MOSFET having a suffi-
ciently low on-state resistance in accordance with the
using operating supply voltage.
If a larger VGS is desired, there is a method to apply
the double-voltage of the input to the IC's VCC pin by
using the transformer as shown in figure 2.
[3] In order to realize a low noise and high efficiency, care should be taken in the following points in designing the
board layout.
1. The wiring for ground line should be taken as wide as possible and grounded separately from the power system.
2. The input filter capacitor should be arranged in a place as close to VCC and GND pin as possible so as not to allow
switching noise to enter into the IC inside.
3. The wiring between the Out terminal and switching device (transistor or MOSFET) should be as short as possible
to obtain a clean switching waveform.
4. In wiring the detection resistor of the output voltage, the wiring for the low impedance side should be longer.
[4] There is a case in which this IC does not start charging to the S.C.P. capacitor when the output is short-circuited
due to the malfunction of U.V.L.O. circuit biased by VCC that has ripples generated by turning on and off of the
switching transistor. The allowable range of the VCC ripple is as shown in the following figure. Reduce the VCC ripple
by inserting a capacitor near the VCC terminal and GND terminal of this IC so that the VCC ripple is in this allowable
range. However, this allowable range is design reference value and not the guaranteed value.
VCC ripple allowable range
Figure 2. Gate drive voltage increasing method
Pins 7,10
Out
SBD
V
IN
V
CC
≈ 2 × V
IN
− V
D
V
CC
V
OUT
SBD
9
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AN8017SA
11
SDH00007CEB
700
582
100
135
200
233
300
400
338
500
600
0
0 25 85 125
Ambient temperature T
a
(°C)
Power dissipation P
D
(mW)
50 75 100
Independent IC
without a heat sink
R
th(j−a)
= 295.6°C/W
Glass epoxy board
(50 × 50 × t0.8 mm
3
)
R
th(j−a)
= 171.8°C/W
■Application Notes
[1] PD Ta curves of SSOP016-P-0225A
PD Ta
[2] Main characteristics
VREF temperature characteristics Frequency characteristics
1.185
1.195
−30
Ta (°C)
VREF (V)
1.190
−10 10 30 50 70 90
10k
1M
1k 10k 100k
RT (Ω)
fOUT (Hz)
100k
CT = 100 pF
CT = 330 pF
CT = 0.01 µF
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AN8017SA
12 SDH00007CEB
0
9
0
VCC (V)
ICC(OFF) (mA)
1
2
3
4
5
6
7
8
24 6 8 10 12 14
0
20
100 1k 10k
RB (Ω)
ICC(OFF) (mA)
2
4
6
8
10
12
14
16
18
■Application Notes (continued)
[2] Main characteristics (continued)
ISO(OUT) RBISI(OUT) RB
Du1 VDT1 Du2 VDT2
ICC(OFF) VCC ICC(OFF) RB
0
70
100k10k1k100
RB (Ω)
ISO(OUT) (mA)
10
20
30
40
50
60
VCC = 1.8 V
VCC = 2.4 V VCC = 14 V
VCC = 7 V
0
90
100k10k1k100
RB (Ω)
ISI(OUT) (mA)
10
20
30
40
50
60
70
80
VCC = 1.8 V
VCC = 2.4 V
VCC = 14 V
VCC = 7 V
0
100
0.2
VDT1 (V)
Du1 (%)
10
20
30
40
50
60
70
80
90
0.3 0.4 0.5 0.6 0.7 0.8
0
100
0.2
VDT2 (V)
Du2 (%)
10
20
30
40
50
60
70
80
90
0.3 0.4 0.5 0.6 0.7 0.8
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AN8017SA
13
SDH00007CEB
FB1 OSC DT1
Output short-circuit
DT2
OSCFB2
Channel 1
1.6 V
1.22 V
VCC terminal
voltage waveform
S.C.P. terminal
voltage waveform
Out1 terminal
voltage waveform
Out2 terminal
voltage waveform
Channel 2
■Application Notes (continued)
[3] Timing chart
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AN8017SA
14 SDH00007CEB
■Application Notes (continued)
[4] Function descriptions
1. Reference voltage block
This block is composed of the band gap circuit, and outputs the temperature compensated 1.19 V reference
voltage. The reference voltage is stabilized when the supply voltage is 1.8 V or more. The reference voltage is also
used as the reference voltage for the error amplifier 1 block and the error amplifier 2 block.
2. Triangular wave oscillation block
The sawtooth-waveform-like triangular wave hav-
ing a peak of approximately 0.7 V and a trough of
approximately 0.2 V can be generated by connecting
the timing capacitor and resistor to the OSC terminal
(pin 1). The oscillation frequency can be freely set by
the value of CT and RT to be connected externally. The
usable oscillation frequency is from 20 kHz to the
maximum 1 MHz. The triangular wave is connected
with the inverting input of PWM comparator for
channel 1 side and the noninverting input of PWM
comparator for channel 2 side within the IC inside.
And refer to the experimentally determined graph of
the frequency characteristics provided in the main
characteristics section.
3. Error amplifier 1 block
The output voltage of DC-DC converter is de-
tected by the npn-transistor-input type error amplifier
and the amplified signal is input to the PWM com-
parator. The internal reference voltage 1.19 V is given
to the noninverting input.
Also, it is possible to perform the gain setting and
the phase compensation arbitrarily by connecting a
resistor and a capacitor from the FB1 terminal (pin 4)
to GND in series.
The output voltage VOUT1 can be set by making
connection as shown in figure 2.
4. Error amplifier 2 block
The output voltage of DC-DC converter is de-
tected by the npn-transistor-input type error-amplifier
and the amplified signal is input to the PWM com-
parator. The internal reference voltage 1.19 V is given
to the noninverting input.
Also, it is possible to perform the gain setting and
the phase compensation arbitrarily by connecting a
resistor and a capacitor from the FB2 terminal (pin
13) to GND in series.
The output voltage VOUT2 can be set by making
connection as shown in figure 3.
Figure 1. Tiangular wave oscillation waveform
t
1
Quick
charging
t
2
T
Discharging
V
OSCH
≈ 0.75 V
V
OSCL
≈ 0.2 V
FB1
R1
R2
4
1.19 V To PWM
comparator input
Error amplifier 1
block
IN−13
V
OUT1
V
OUT1
= 1.19 ×
Figure 2. Connection method of error ampifier 1 block
(Step-up output)
R1 + R2
R2
FB2
R1
R2
13
1.19 V To PWM
comparator input
Error amplifier 2
block
IN+214
VOUT2
VOUT2 = 1.19 ×
Figure 3. Connection method of error ampifier 2 block
(Step-up output)
R1 + R2
R2
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AN8017SA
15
SDH00007CEB
■Application Notes (continued)
[4] Function descriptions (continued)
5. Timer latch short-circuit protection circuit
This circuit protects the external main switching devices, flywheel diodes, and choke coils, etc. from
destruction or deterioration if overload or short-circuit condition of power supply output lasts for a certain time.
The timer latch short-circuit protection circuit detects the output level of the error amplifier. When the output
voltage of DC-DC converter drops and the output level of error amplifier 1 block exceeds 0.9 V or the output level
of error amplifier 2 block exceeds 0.22 V, the low-level output is given and the timer circuit is actuated to start the
charge of the external protection-enable capacitor.
If the output of the error amplifier does not return to a normal voltage range by the time when the voltage of
this capacitor reaches 1.22 V, it sets the latch circuit, and cuts off the output drive transistor, and sets the dead-time
to 100%.
6. Low input voltage malfunction prevention circuit (U.V.L.O.)
This circuit protects the system from destruction or deterioration due to control malfunction when the supply
voltage is low in the transient state of power on/off.
The low input voltage malfunction prevention circuit detects the internal reference voltage which changes
according to the supply voltage level. Until the supply voltage reaches 1.67 V during its rise time, it cuts off the
output drive transistor, and sets the dead-time to 100%. At the same time, it holds the S.C.P. terminal (pin 2) and
DT1 terminal (pin 5) to low-level and the OSC terminal (pin 1) and DT2 terminal (pin 12) to high-level.
7. PWM comparator block
The PWM comparator controls the on-period of the output pulse according to the input voltage. The PWM1
and PWM2 block are reverse logic relation.
The PWM1 block turns on the output transistor during the period when the triangular wave of OSC terminal
(pin 1) is lower than any lower one of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage.
The PWM2 block turns on the output transistor during the period when the triangular wave of OSC terminal
(pin 1) is higher than any higher one of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage.
The maximum duty ratio is variable from the outside.
Also, the soft start which gradually extends on-period of the output pulse is activated by connecting a capacitor
in parallel with the resistor-dividing for the maximum duty ratio setting.
8. Unlatch block
The unlatch circuit 1 block fixes the FB1 terminal (pin 4) at low-level at the DT1 terminal (pin 5) is 0.20 V or
less. The unlatch circuit 2 block fixes the FB2 terminal (pin 13) at high-level at the DT2 terminal (pin 12) is 0.9
V or less. Consequently, by controlling the DT terminal voltage, it is possible to operate only one channel or to
start and stop each channel in any required sequence.
9. Output 1 block
This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB1 terminal,
it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage.
The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V.
10. Output 2 block
This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB2 terminal,
it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage.
The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V.
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AN8017SA
16 SDH00007CEB
FB1 DT1 and DT2
are omitted.
OSC
FB2
Channel 1
Switching transistor
collector current I
C1
Channel 2
Switching transistor
collector current I
C2
I
C1
+ I
C2
Figure 4. PWM logic explanation chart
Out1
(totem pole output)
Out2
(totem pole output)
V
IN
I
C2
SBD
+
I
C1
SBD
+
Out210Out1 7
■Application Notes (continued)
[5] About logic of PWM block
The logic for channel 1 and channel 2 of this IC is reversed. Thereby an input current flatness is realized. At the
same time, noise can be suppressed to a lower level by staggering the turn on timing.
The PWM1 block turns on the output transistor during the period when the triangular wave of the OSC terminal
(pin 1) is lower than both of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage.
The PWM2 block turns on the output transistor during the period when the triangular wave of the OSC terminal
(pin 1) is higher than both of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage.
(Refer to figure 4.)
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AN8017SA
17
SDH00007CEB
■Application Notes (continued)
[6] Time constant setting method for timer latch short-circuit protection circuit
The constructional block diagram of protection latch circuit is shown in figure 6. The comparator for short-circuit
protection compares the error amplifier 1 output FB1 with the reference voltage of 0.9 V for channel 1 side, and the
error amplifier 2 output FB2 with the reference voltage of 0.18 V for channel 2 side at all the time.
When the load conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output
and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the
conductive state and the S.C.P. terminal is held to approximately 60 mV.
When the load conditions for channel 1 side suddenly change and high-level signal (0.9 V or more) is input from
the error amplifier 1 block to the short-circuit protection comparator, the short-circuit protection comparator outputs
the low-level signal to cut off the output transistor Q1. Also, when the load conditions for channel 2 side suddenly
change and low-level signal (0.22 V or less) is inputted from the error amplifier 2 block to the short-circuit protection
comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1.
The capacitor CSCP connected to the S.C.P. terminal starts charging. When the external capacitor CSCP has been charged
to approximately 1.19 V with the constant current of approximately 1.1 µA, the latch circuit is set, the output terminal
is fixed to low-level, and the dead-time is set to 100%. Once the latch circuit is set, the S.C.P. terminal is discharged
to approximately 40 mV. However, the latch circuit is not reset unless the power for the latch circuit is turned off or
restarted by the on/off control.
1.19 V = ICHG × tPE
CSCP
∴ tPE [s] = 1.08 × CSCP
When the power supply is turned on, the output is
considered to be short-circuited state so that the S.C.P.
terminal voltage starts charging. It is necessary to set the
external capacitor so as to start up the DC-DC converter
output voltage before setting the latch circuit in the later
stage. Especially, pay attention to the delay of the start-up
time when applying the soft-start.
Figure 5. S.C.P. terminal charging waveform
VSCP [V]
t [s]
Short-circuit detection time tPE
0.06
1.22
FB2 13
1.22 V Q1
Error amp.2
S.C.P.
comp.
IN+214
S.C.P. 2
Figure 6. Short-circuit protection circuit
0.18 V
High-level detection comp.
1.19 V
FB1 4
3
1.22 V
Error amp.1
IN−1
0.9 V
1.1 µA
Internal reference
Output cut-off
U.V.L.O.
Latch
Q
R
S
On/off
control
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AN8017SA
18 SDH00007CEB
Figure 7. Slave operation circuit example
0.1 µFInput
0.1 µF
L
H
Off terminals
connected together
OSC terminals
connected together
1
2
3
4
5
6
7
8
FB1
RB1
IN−1
S.C.P.
VCC
GND
Out1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Out2
DT1
FB2
RB2
IN+2
DT2
FB1
OSC
RB1
IN−1
S.C.P.
GND
Out1
DT1
Off
VCC
Out2
FB2
RB2
IN+2
DT2
VREF VREF
OSC
Off
16
15
14
13
12
11
10
9
■Application Notes (continued)
[7] Parallel synchronous operation of multiple ICs
Multiple instances of this IC can be operated in parallel. If the OSC terminals (pin 1) and Off terminals (pin 15) are
connected to each other as shown in figure 7, the ICs will operate at the same frequency.
It is possible to operate this IC (the AN8017SA) with the two-channel 1.8-volt DC-DC converter control IC
AN8018SA (open-collector output/each single-channel totem pole output) in parallel synchronous mode.
1. Usage notes
1) The parallel synchronous operation with the single-channel 1.8-volt DC-DC converter control IC AN8016SH/
AN8016NSH is not possible.
2) The remote on/off with the single IC itself is not possible. Only the simultaneous remote on/off of all ICs is
possible.
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AN8017SA
19
SDH00007CEB
S.C.P.
IC-2 side output
short-circuited 1.19 V
DT1
FB1
Out1
OSC Since the OSC terminal voltage
becomes higher than
the DT1 terminal voltage,
the Out1 becomes fully off state.
FB2
DT2
Out2
OSC
S.C.P.
Figure 8. Operation of short-circuit protection at parallel synchronous operation
1.19 V
Channel 2 goes off
at high
Oscillator high-level
detection comparator
When short-circuit protection
function is actuated to apply latch,
Q1 turns on and,
VOSC = VREF − VCE(sat)
becomes approximately 1.1 V
Forced to be in off state
inside the IC
IC-1 latch
IC-2 latch
16
0.9 V
IC-1
1
16
IC-2 Q1
1
■Application Notes (continued)
[7] Parallel synchronous operation of multiple ICs (continued)
2. About the operation of short-circuit protection at parallel synchronous operation
In the case of the operation in parallel, if the single output (or multiple outputs) of them is short-circuited and
the timer latch is applied to the IC which has that output, the output of other ICs will be also shut down.
In figure 8, if the timer latch is applied to IC-2, Q1 turns on and the OSC terminal (pin 1) is raised to
approximately 1.1 V. Then channel 1 of IC-1 logically turns off, and then for channel 2, the output of comparator
whose reference voltage is 0.9 V becomes high-voltage and Out2 is forced to go off. The same goes with the case
when the timer latch is applied to IC-1.
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AN8017SA
20 SDH00007CEB
■Application Notes (continued)
[8] Setting of Off-terminal connection resistor
The start circuit starts its operation when Q1 is turned on. In an organization in which Q1 turns off/on when Q2
turns on/off in figure 9, the input voltage VIN at which the start circuit operates is obtained by the equation:
VIN = VBEQ1 × (ROFF + R1 + R2) / R2
Therefore, ROFF can be set by:
ROFF = R2 · VIN / VBEQ1 − R1 − R2
Also, in case of limiting the Off terminal current by ROFF ,
set it by the above equation. However, take the values as:
VBEQ1 = 0.7 V (T = 25°C)
VBEQ1 fluctuation with temperature: −2 mV/°C
Temperature coefficient of R1 and R2: +6
000 PPM/°C
[9] Sequential operation
It is possible to turn on/off the output of DC-DC converter individually by turning on/off Q1 and Q2 as shown in
figure 10. However, pay particular attention to the current flowing into the VREF terminal when Q2 is turned off since
sink capability of VREF terminal is approximately 100 µA.
R
OFF
15Off
R1
30 kΩ
R2
60 kΩ
Q1
Start circuit
Figure 9. Off terminal peripheral circuit
Q2
Figure 10
V
1
V
2
Control block
0.9 V
0.9 V
Unlatch2
Q1
Q2
1.19 V
4
5
6
7
8
FB1
RB1
V
CC
GND
Out1
16
13
12
11
10
9
Out2
DT1
FB2
RB2
DT2
V
REF
0.2 V
Unlatch1
0.1 µF
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AN8017SA
21
SDH00007CEB
■Application Notes (continued)
[9] Sequence operation (continued)
V1
V2
DT1
Out1
DT2
Out2 Out1 operation
Out2 operation
Out1: Off at DT1 < 0.2 V Out2: Off at DT2 > 0.9 V
Operation when each channel is turned on/off independently
[10] Error amplifier phase-compensation setting method
The equivalent circuit of error amplifier is shown in figure 11.
The transfer function is:
H =1 / {S (CE1 + CO1)} =1
RE1 + 1 / {S (CE1 + CO1)} SCO1 · RE1 + 1 (from CE1 << CO1)
The cut-off frequency is variable by changing the externally attached phase compensation capacitor CO1 .
Adjust by inserting a resistor RO1 between the FB1 terminal and CO1 in series as shown in figure 12 when it is
required to have a gain on the high frequency side or desired to lead a phase.
The transfer function is:
H =SCO1 · RO1 + 1
SCO1 (RO1 + RE1) + 1 (from CE1 << CO1)
To PWM
1.19 V
C
O1
57dB
IN−1
C
E1
5 pF
Figure 11. Error amplifier equivalent circuit
FB1
R
E1
1 MΩTo PWM
1.19 V
C
O1
R
O1
57dB
IN−1
C
E1
5 pF
Figure 12. Error amplifier equivalent circuit (R
O1
inserted)
FB1
R
E1
1 MΩ
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AN8017SA
22 SDH00007CEB
0
20
180
1 10 100M
f (Hz)
Phase ( ° )
40
60
80
100
120
140
160
100 1k 10k 100k 1M 10M
C
O1
= 0.01 µF
10 Ω
1 Ω
R
O1
= 10 kΩ
1 kΩ
100 Ω
f Phase f Phase
0
20
180
1 10 100M
f (Hz)
Phase ( ° )
40
60
80
100
120
140
160
100 1k 10k 100k 1M 10M
CO1 = 1
000 pF
1 Ω
1 kΩ
100 Ω
10 Ω
RO1 = 10 kΩ
■AC Analysis Result
•Simulation circuit
1.19 V
AC
CO1
RO1
FB1
IN−1
f Gain f Gain
−80
−60
60
1 10 100M
f (Hz)
Gain (dB)
−40
−20
0
20
40
100 1k 10k 100k 1M 10M
CO1 = 0.01 µF
10 Ω
1 Ω
RO1 = 10 kΩ
100 Ω
1 kΩ
−80
−60
60
1 10 100M
f (Hz)
Gain (dB)
−40
−20
0
20
40
100 1k 10k 100k 1M 10M
C
O1
= 1
000 pF
10 Ω
1 Ω
R
O1
= 10 kΩ
100 Ω
1 kΩ
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AN8017SA
23
SDH00007CEB
f Gain f Gain
0
20
180
1 10 100M
f (Hz)
Phase ( ° )
40
60
80
100
120
140
160
100 1k 10k 100k 1M 10M
RO1 = 0
CO1 = 1 µF
0.1µF
0.01
µF
0.001 µF
0
20
180
1 10 100M
f (Hz)
Phase ( ° )
40
60
80
100
120
140
160
100 1k 10k 100k 1M 10M
C
O1
= 0.1 µF
R
O1
= 10 kΩ
1 kΩ
100 Ω10 Ω1 Ω
−80
−60
60
1 10 100M
f (Hz)
Gain (dB)
−40
−20
0
20
40
100 1k 10k 100k 1M 10M
R
O1
= 0
C
O1
= 1 µF
0.1
µF
0.001 µF
0.01
µF
−80
−60
60
1 10 100M
f (Hz)
Gain (dB)
−40
−20
0
20
40
100 1k 10k 100k 1M 10M
C
O1
= 0.1 µF
1 kΩ
100 Ω
10 Ω
1 Ω
R
O1
= 10 kΩ
■AC Analysis Result (continued)
f Phase f Phase
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AN8017SA
24 SDH00007CEB
L2
Q2
VO2
VIN
R11
R10
R9 R8 C7
C8
L1 Q1
R5 R4 R3
SBO1
SBO2
GND
AN8017SA
R13 On
SW1
Off
C5 VO1
C11
C10
C6
C1C2
C3
C4
R12
R2 R6 R7 R1
•Evaluation board
■Application Circuit Examples
•Application circuit example 1
Output2
+
−
CTL
C6
C1 C2
R2
R3
R4
C3
C4
C5
C9
C10
C11
R10
Input
R9
C8
C7
R8
R1
Q2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RB1
R5 R6
R7
R12
R13
L1
L2
IN−1
S.C.P.
OSC
Off
V
CC
GND
Out1 Out2
DT1
FB1 FB2
RB2
RB2
IN+2
DT2
V
REF
SBD2
Output1
+
−
Q1
SBD1
AN8017SA
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AN8017SA
25
SDH00007CEB
Input 1.8 V to 3.2 V
Remote on/off
control pin
−10 V, 5 V, 18 V
stop with high-level
input.
Input voltage range: 1.8 V to 3.2 V
Oscillation frequency: 450 kHz
0.1 µF
0.1 µF
10 µF
10 µF
10 µF
0.1 µF
0.1 µF
1.19 V
330 pF
68 kΩ
5.1 kΩ
10 kΩ
0.1 µF
10 kΩ
75 kΩ
300 Ω
68 kΩ
22 kΩ
2SD0874
(2SD874*)
2SB1440
AN8018SA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DT1
39 kΩ
5 V (STBY)
300 mA
(max.)
−10 V
10 mA
(max.)
12 kΩ
10 µH
IN+1
S.C.P.
OSC
Off
VCC
GND
Out1 Out2
FB1
IN−1FB2
RB2
820 Ω
IN+2
DT2
VREF
MA2Q738
(MA738*)
MA2Q738
(MA738*)
MA2Q738
(MA738 *)
MA2Q738
(MA738*)
75 kΩ
47 kΩ
22 kΩ
1.5 kΩ
0.1 µF
0.1 µF
0.1 µF
0.1 µF
1.19 V
68 kΩ
820 Ω
10 kΩ
0.1 µF
10 kΩ
68 kΩ
56 kΩ
22 kΩ
2SD0602
(2SD602*)
2SD0602
(2SD602*)
AN8017SA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RB1
51 kΩ
5 V
140 mA
(max.)
18 V
35 mA
(max.)
15 kΩ
10 µH
68 µH
IN−1
S.C.P.
OSC
Off
VCC
GND
Out1 Out2
DT1
FB1 FB2
RB2
820 Ω
IN+2
DT2
VREF
10 µF
56 kΩ
3.9 kΩ
18 µH
■Application Circuit Examples (continued)
•Application circuit example 2 (Circuit using the AN8017SA/AN8018SA)
Note) *: Former part number
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AN8017SA
26 SDH00007CEB
■New Package Dimensions (Unit: mm)
•SSOP016-P-0225E (Lead-free package)
4.40±0.20
6.40±0.20
1.20±0.20
0.10±0.10
5.00±0.20
0.50±0.20
0.22+0.10
-
0.05
0.15
+0.10
-
0.05
0° to 10°
9
16
8
1
(1.00)
Seating plane Seating plane
(0.225) 0.65
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Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1)If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2)The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products, and no license is granted under any intellectual property right or other right owned by our company or any other
company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other
company which may arise as a result of the use of technical information described in this book.
(3)The products described in this book are intended to be used for standard applications or general electronic equipment (such as office
equipment, communications equipment, measuring instruments and household appliances).
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support
systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the prod-
ucts may directly jeopardize life or harm the human body.
– Any applications other than the standard applications intended.
(4)The products and product specifications described in this book are subject to change without notice for modification and/or im-
provement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
(5)When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6)Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
(7)This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita
Electric Industrial Co., Ltd.
