May 2001
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT13N06L
QFETTM
FQT13N06L
60V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
2.8A, 60V, RDS(on) = 0.11 @VGS = 10 V
Low gate charge ( typical 4.8 nC)
Low Crss ( typical 17 pF)
Fast switching
Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQT13N06L Units
VDSS Drain-Source Voltage 60 V
IDDrain Current - Continuous (TC = 25°C) 2.8 A
- Continuous (TC = 70°C) 2.24 A
IDM Drain Current - Pulsed (Note 1) 11.2 A
VGSS Gate-Source Voltage ± 20 V
EAS Single Pulsed Avalanche Energy (Note 2) 85 mJ
IAR Avalanche Current (Note 1) 2.8 A
EAR Repetitive Avalanche Energy (Note 1) 0.21 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns
PDPower Dissipation (TC = 25°C) 2.1 W
- Derate above 25°C 0.017 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJA Thermal Resistance, Junction-to-Ambient * -- 60 °C/W
!"
!
!
!"
"
"
!"
!
!
!"
"
"
S
D
G
SOT-223
FQT Series
* When mounted on the minimum pad size recommended (PCB Mount)
G
D
S
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Rev. A, May 2001
FQT13N06L
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
©2001 Fairchild Semiconductor Corporation
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 12.6mH, IAS = 2.8A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 13.6A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit i ons Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA60 -- -- V
BVDSS
/ TJ
Breakdown Vo ltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.05 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V -- -- 1 µA
VDS = 48 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA1.0 -- 2.5 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 1.4 A
VGS = 5 V, I D = 1.4 A --
-- 0.088
0.110 0.11
0.14
gFS Forward Transconductance VDS = 25 V, ID = 1.4 A -- 4.1 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 270 350 pF
Coss Output Capacitance -- 95 125 pF
Crss Reverse Transfer Capacit ance -- 17 23 pF
Switching Characteristics
td(on) Turn-On Delay T ime VDD = 30 V, ID = 6.8 A,
RG = 25
-- 8 25 ns
trTurn-On Rise Time -- 90 190 ns
td(off) Turn-Off Del a y Time -- 20 50 ns
tfTurn-Off Fa ll Time -- 40 90 ns
QgTotal Gate Ch arge VDS = 48 V, ID = 13.6 A,
VGS = 5 V
-- 4.8 6.4 nC
Qgs Gate-Source Charge -- 1.6 -- nC
Qgd Gate-Drain Charge -- 2.7 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 2.8 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 11.2 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 2.8 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, I S = 13.6 A,
dIF / dt = 100 A/µs
-- 45 -- ns
Qrr Reverse Recovery Charge -- 45 -- nC
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Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT13N06L
0246810
0
2
4
6
8
10
12
VDS = 30V
VDS = 48V
! N ote : I D = 13.6A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10-1 100101
0
200
400
600
800 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
!
N o te s :
1 . V GS = 0 V
2. F = 1 MH z
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.2 0.4 0.6 0.8 1.0 1.2
10-1
100
101
150"
! No te s :
1. VGS = 0V
2. 250 #s P ulse Test
25"
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 10203040
0
50
100
150
200
250
VGS = 10V
VGS = 5V
! Note : TJ = 25"
RDS(ON) [m$],
Drain-Source On-Resistance
ID, Dr ain Curr en t [A]
0246810
10-1
100
101
150"
25"
-55"! Notes :
1. VDS = 25V
2. 2 50#s P ulse Te st
ID, D ra in C u rr en t [A]
VGS, Gate-Source Voltage [V]
10-1 100101
100
101 V GS
Top : 10.0 V
8 .0 V
6 .0 V
5 .0 V
4 .5 V
4 .0 V
3 .5 V
B o tto m : 3.0 V
!
N o te s :
1 . 2 5 0 #s Pulse Test
2 . T C = 25"
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitanc e C haracterist i cs Figure 6. Gate Charge C haracteris tics
Figure 3. On-Resistanc e Variation vs
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation with Sour ce Cur r ent
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ic s
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FQT13N06L
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
! No te :
1. VGS = 10 V
2. I D = 1.4 A
RDS(ON) , (N o rmaliz e d)
Drain-Source On-Resistance
TJ, Junc tion Te m pera ture [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
!
Note :
1 . VGS = 0 V
2 . ID = 250 #A
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
3.0
ID, Drain Current [A]
TC, Case Temperature ["
]
10-1 100101102
10-2
10-1
100
101
10 ms
DC
100 m s
1 ms100 µs
Op eratio n in T h is A re a
is Limited by R DS(on)
! Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
10-5 10-4 10-3 10-2 10-1 100101102103
10-1
100
101
102
! No te s :
1 . Z %JC(t) = 6 0 "/W Ma x .
2 . D u ty Fa c to r, D = t1/t2
3 . T JM - T C = PDM * Z %JC(t)
s in g le pu ls e
D=0.5
0.02
0.2
0.05
0.1
0.01
Z%JC
(t), Thermal R esponse
t1, S quare Wave P ulse Duration [sec]
Typical Characteristics (Continued)
t1
PDM
t2
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature
Figu re 7. Breakdown Voltag e Variation
vs Temperature Figure 8. On-Resistance Variation
vs Temperature
Figure 11. Tr ansient Thermal Res pons e Cur ve
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Rev. A, May 2001
©2001 Fairchild Semiconductor Corporation
FQT13N06L
Vin
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
Vin
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
Gate Charge Test Circuit & Waveform
EAS =L
L IAS2
----
2
1--------------------
BVDSS -- VDD
BVDSS
EAS =L
L IAS2
----
2
1
EAS =L
L IAS2
----
2
1
----
2
1--------------------
BVDSS -- VDD
BVDSS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switc hing Test Circuit & Waveform
Charge
VGS
5V Qg
Qgs Qgd
Charge
VGS
5V Qg
Qgs Qgd
VDD
VDS
10V DUT
RG
L
ID
VDD
VDS
10V DUT
RG
LL
ID
ID
VDD
( 0.5 rated VDS )
5V
VDS RL
DUT
RG
VDD
( 0.5 rated VDS )
5V
VDS RL
DUT
RG
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FQT13N06L
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
Scontrolled by pulse period
VDD
L
IS
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
Scontrolled by pulse period
VDD
LL
IS
IS
10V
VGS
( Driver )
IS
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Vf
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
-------------------------- 10V
VGS
( Driver )
IS
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Vf
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
Peak Diode Recovery dv/dt Test Circuit & Waveform
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FQT13N06L
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
Package Dimensions
3.00 ±0.10
7.00 ±0.30
0.65 ±0.20
0.08MAX
3.50 ±0.20
1.60 ±0.20
(0.46)
(0.89)
(0.60) (0.60)
1.75 ±0.20
0.70 ±0.10
4.60 ±0.25
6.50 ±0.20
(0.95) (0.95)
2.30 TYP
0.25
MAX1.80
0°~10°
+0.10
–0.05
0.06 +0.04
–0.02
SOT-223
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©2001 Fairchild Semiconductor Corporation
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intended to be an exhaustive list of all su ch trademarks.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY A NY LICENSE UNDER ITS PATENT RIGHTS, N OR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H2
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