This is information on a product in full production.
August 2012 Doc ID 15927 Rev 7 1/21
21
STGIPS14K60
SLLIMM™ (small low-loss intelligent molded module)
IPM, 3-phase inverter - 14 A, 600 V short-circuit rugged IGBT
Datasheet − production data
Features
■IPM 14 A, 600 V 3-phase IGBT inverter bridge
including control ICs for gate driving and free-
wheeling diodes
■Short-circuit rugged IGBTs
■VCE(sat) negative temperature coefficient
■3.3 V, 5 V, 15 V CMOS/TTL inputs
comparators with hysteresis and pull down /
pull up resistors
■Undervoltage lockout
■Internal bootstrap diode
■Interlocking function
■Smart shutdown function
■Comparator for fault protection against
overtemperature and overcurrent
■DBC substrate leading to low thermal
resistance
■Isolation rating of 2500 Vrms/min
■UL Recognized: UL1557 file E81734
Applications
■3-phase inverters for motor drives
■Home appliances, such as washing machines,
refrigerators, air conditioners and sewing
machines
Description
This intelligent power module provides a
compact, high performance AC motor drive in a
simple, rugged design. Combining ST proprietary
control ICs with the most advanced short-circuit-
rugged IGBT system technology, this device is
ideal for 3-phase inverters in applications such as
home appliances and air conditioners. SLLIMM™
is a trademark of STMicroelectronics.
SDIP-25L
Table 1. Device summary
Order code Marking Package Packaging
STGIPS14K60 GIPS14K60 SDIP-25L Tube
www.st.com
Contents STGIPS14K60
2/21 Doc ID 15927 Rev 7
Contents
1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3
2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4 Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STGIPS14K60 Internal block diagram and pin configuration
Doc ID 15927 Rev 7 3/21
1 Internal block diagram and pin configuration
Figure 1. Internal block diagram
AM05002v1
W
NW
P
VBOOT U
VBOOT W
OUT V
VBOOT V
OUT U
OUT W
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
Pin 16
Pin 1
P
P
Pin 17
Pin 25
GND
LIN-U
HIN-V
LIN-V
HIN-W
HIN-U
LIN-W
CIN
VCC
NU
NV
U
V
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
SD/OD
Internal block diagram and pin configuration STGIPS14K60
4/21 Doc ID 15927 Rev 7
Figure 2. Pin layout (bottom view)
Table 2. Pin description
Pin n° Symbol Description
1OUT
UHigh side reference output for U phase
2V
boot U Bootstrap voltage for U phase
3LIN
ULow side logic input for U phase
4HIN
UHigh side logic input for U phase
5V
CC Low voltage power supply
6OUT
VHigh side reference output for V phase
7V
boot V Bootstrap voltage for V phase
8 GND Ground
9LIN
VLow side logic input for V phase
10 HINVHigh side logic input for V phase
11 OUTWHigh side reference output for W phase
12 Vboot W Bootstrap voltage for W phase
13 LINWLow side logic input for W phase
14 HINWHigh side logic input for W phase
15 SD / OD Shut down logic input (active low) / open drain (comparator output)
16 CIN Comparator input
17 NWNegative DC input for W phase
18 W W phase output
19 P Positive DC input
20 NVNegative DC input for V phase
21 V V phase output
22 P Positive DC input
23 NUNegative DC input for U phase
24 U U phase output
25 P Positive DC input
STGIPS14K60 Electrical ratings
Doc ID 15927 Rev 7 5/21
2 Electrical ratings
2.1 Absolute maximum ratings
Table 3. Inverter part
Symbol Parameter Value Unit
VPN Supply voltage applied between P - NU, NV
, NW450 V
VPN(surge)
Supply voltage (surge) applied between P - NU,
NV
, NW
500 V
VCES Each IGBT collector emitter voltage (VIN(1) = 0)
1. Applied between HINi, LINi and GND for i = U, V, W
600 V
± IC (2)
2. Calculated according to the iterative formula:
Each IGBT continuous collector current
at TC = 25°C 14 A
± ICP (3)
3. Pulse width limited by max junction temperature
Each IGBT pulsed collector current 30 A
PTOT Each IGBT total dissipation at TC = 25°C 42 W
tscw
Short circuit withstand time, VCE = 0.5 V(BR)CES
TJ = 125 °C, VCC = Vboot= 15 V, VIN (1)= 0 ÷ 5 V 5µs
Table 4. Control part
Symbol Parameter Min. Max. Unit
VOUT
Output voltage applied between
OUTU, OUTV
, OUTW - GND Vboot - 21 Vboot + 0.3 V
VCC Low voltage power supply - 0.3 21 V
VCIN Comparator input voltage - 0.3 VCC + 0.3 V
Vboot Bootstrap voltage - 0.3 620 V
VIN
Logic input voltage applied between HIN, LIN and
GND - 0.3 15 V
VSD/OD Open drain voltage - 0.3 15 V
dVOUT/dt Allowed output slew rate 50 V/ns
ICTC
() Tjmax()
TC
–
Rthj c–VCE sat()max()
Tjmax()
ICTC
(),()×
------ ---- ----------- ---- --------------- ---- ----------- ---- ----------- ---- ---------- ----- --------------=
Electrical ratings STGIPS14K60
6/21 Doc ID 15927 Rev 7
2.2 Thermal data
Table 5. Total system
Symbol Parameter Value Unit
VISO
Isolation withstand voltage applied between each
pin and heatsink plate (AC voltage, t = 60 sec.) 2500 V
TjPower chips operating junction temperature - 40 to 150 °C
TCModule case operation temperature - 40 to 125 °C
Table 6. Thermal data
Symbol Parameter Value Unit
RthJC
Thermal resistance junction-case single IGBT 3 °C/W
Thermal resistance junction-case single diode 5.5 °C/W
STGIPS14K60 Electrical characteristics
Doc ID 15927 Rev 7 7/21
3 Electrical characteristics
TJ = 25 °C unless otherwise specified.
Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are
the switching time of IGBT itself under the internally given gate driving condition.
Table 7. Inverter part
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCE(sat)
Collector-emitter
saturation voltage
VCC = Vboot = 15 V, VIN(1)= 0 ÷ 5 V,
IC = 7 A -2.12.5
V
VCC = Vboot = 15 V, VIN(1)= 0 ÷ 5 V,
IC = 7 A, TJ = 125 °C -1.8
ICES
Collector-cut off current
(VIN(1)= 0 “logic state”) VCE = 550 V, VCC = VBoot = 15 V - 150 µA
VFDiode forward voltage VIN(1) = 0 “logic state”, IC = 7 A - 2.1 V
Inductive load switching time and energy
ton Tur n - o n t i m e
VDD = 300 V,
VCC = Vboot = 15 V,
VIN(1) = 0 ÷ 5 V,
IC = 7 A
(see
Figure 5
)
-270
ns
tc(on) Crossover time (on) - 130
toff Turn-off time - 520
tc(off) Crossover time (off) - 140
trr Reverse recovery time - 130
Eon Turn-on switching losses - 150 µJ
Eoff Turn-off switching losses - 110
1. Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low).
Electrical characteristics STGIPS14K60
8/21 Doc ID 15927 Rev 7
Figure 3. Switching time test circuit
Note: Figure 4 "Switching time definition" refers to HIN inputs (active high). For LIN inputs (active
low), VIN polarity must be inverted for turn-on and turn-off.
Figure 4. Switching time definition
VCE ICIC
VIN
tON
tC(ON)
VIN(ON) 10% IC 90% IC 10% VCE
(a) turn-on (b) turn-off
trr
100% IC 100% IC
VIN
VCE
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
AM09223V1
STGIPS14K60 Electrical characteristics
Doc ID 15927 Rev 7 9/21
3.1 Control part
Table 8. Low voltage power supply (VCC = 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Vcc_hys Vcc UV hysteresis 1.2 1.5 1.8 V
Vcc_thON Vcc UV turn ON threshold 11.5 12 12.5 V
Vcc_thOFF Vcc UV turn OFF threshold 10 10.5 11 V
I
qccu
Undervoltage quiescent
supply current
VCC = 10 V
SD/OD = 5 V; LIN = 5 V;
HIN = 0, CIN = 0
450 µA
I
qcc
Quiescent current
V
cc
= 15 V
SD/OD = 5 V; LIN = 5 V
HIN = 0, CIN = 0
3.5 mA
V
ref
Internal comparator (CIN)
reference voltage 0.5 0.54 0.58 V
Table 9. Bootstrapped voltage (VCC = 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VBS_hys VBS UV hysteresis 1.2 1.5 1.8 V
VBS_thON VBS UV turn ON threshold 10.6 11.5 12.4 V
VBS_thOFF VBS UV turn OFF threshold 9.1 10 10.9 V
I
QBSU
Undervoltage VBS quiescent
current
V
BS
< 9 V
SD/OD = 5 V; LIN and
HIN = 5 V; CIN = 0
70 110 µA
I
QBS
VBS quiescent current
V
BS
= 15 V
SD/OD = 5 V; LIN and
HIN = 5 V; CIN = 0
150 210 µA
R
DS(on)
Bootstrap driver on resistance LVG ON 120 Ω
Table 10. Logic inputs (VCC = 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
il
Low logic level voltage 0.8 V
V
ih
High logic level voltage 2.25 V
I
HINh
HIN logic “1” input bias current HIN = 15 V 110 175 260 µA
I
HINl
HIN logic “0” input bias current HIN = 0 V 1 µA
ILINl LIN logic “1” input bias current LIN = 0 V 3 6 20 µA
ILINh LIN logic “0” input bias current LIN = 15 V 1 µA
I
SDh
SD logic “0” input bias current SD = 15 V 30 120 300 µA
I
SDl
SD logic “1” input bias current SD = 0 V 3 µA
Dt Dead time see
Figure 7
600 ns
Electrical characteristics STGIPS14K60
10/21 Doc ID 15927 Rev 7
Note: X: don’t care
Table 11. Sense comparator characteristics (VCC = 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Iib Input bias current VCP+ = 1 V 3 µA
V
ol
Open drain low level output
voltage Iod = 3 mA 0.5 V
t
d_comp
Comparator delay SD/OD pulled to 5 V through
100 kΩ resistor 90 130 ns
SR Slew rate CL = 180 pF; Rpu = 5 kΩ60 V/µsec
tsd Shut down to high / low side
driver propagation delay
VOUT = 0, Vboot = VCC,
VIN = 0 to 3.3 V 50 125 200
ns
tisd
Comparator triggering to high /
low side driver turn-off
propagation delay
Measured applying a voltage
step from 0 V to 3.3 V to pin
CINi
50 200 250
Table 12. Truth table
Condition
Logic input (VI) Output
SD/OD LIN HIN LVG HVG
Shutdown enable
half-bridge tri-state LXXLL
Interlocking
half-bridge tri-state HLHLL
0 ‘’logic state”
half-bridge tri-state HHL L L
1 “logic state”
low side direct driving HLLHL
1 “logic state”
high side direct driving HHHLH
STGIPS14K60 Electrical characteristics
Doc ID 15927 Rev 7 11/21
Figure 5. Maximum IC(RMS) current vs.
switching frequency (1) Figure 6. Maximum IC(RMS) current vs. fSINE
(1)
1. Simulated curves refer to typical IGBT parameters and maximum Rthj-c.
)C2-3 ;!=
FSW;K(Z=
60.6-ODULATIONINDEX
0&4J
#F3).%(Z
4C#
4C#
)C2-3 ;!=
F3).% ;(Z=
FSWK(Z
FSWK(Z
FSWK(Z
60.6-ODULATIONINDEX
0& 4J
#4
C
#
Electrical characteristics STGIPS14K60
12/21 Doc ID 15927 Rev 7
3.2 Waveforms definitions
Figure 7. Dead time and interlocking waveforms definitions
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
DTLH DTHL
DTLH DTHL
DTLH DTHL
DTLH DTHL
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
INTERLOCKING
INTERLOCKING
CONTROL SIGNAL EDGES
OVERLAPPED:
INTERLOCKING + DEAD TIME
CONTROL SIGNALS EDGES
SYNCHRONOUS (*):
DEAD TIME
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
BUT INSIDE THE DEAD TIME:
DEAD TIME
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
OUTSIDE THE DEAD TIME:
DIRECT DRIVING
(*) HIN and LIN can be connected together and driven by just one control signal
INTERLOCKING
INTERLOCKING
G
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
STGIPS14K60 Smart shutdown function
Doc ID 15927 Rev 7 13/21
4 Smart shutdown function
The STGIPS14K60 integrates a comparator for fault sensing purposes. The comparator
non-inverting input (CIN) can be connected to an external shunt resistor in order to
implement a simple over-current protection function. When the comparator triggers, the
device is set in shutdown state and both its outputs are set to low level leading the half-
bridge in tri-state. In the common overcurrent protection architectures the comparator output
is usually connected to the shutdown input through a RC network, in order to provide a
mono-stable circuit, which implements a protection time that follows the fault condition. Our
smart shutdown architecture allows to immediately turn-off the output gate driver in case of
overcurrent, the fault signal has a preferential path which directly switches off the outputs.
The time delay between the fault and the outputs turn-off is no more dependent on the RC
values of the external network connected to the shutdown pin. At the same time the internal
logic turns on the open drain output and holds it on until the shutdown voltage goes below
the logic input lower threshold. Finally the smart shutdown function provides the possibility
to increase the real disable time without increasing the constant time of the external RC
network.
Figure 8. Smart shutdown timing waveforms
Note: Pls refer to Table 11: Sense comparator characteristics (VCC = 15 V unless otherwise
specified) for internal propagation delay time details.
HIN/LIN
HVG/LVG
SD/OD
open drain gate
(internal)
upper
threshold
lower
threshold
comp
Vref
CP+
PROTECTION
Fast shut down:
the driver outputs are set in SD state
immediately after the comparator
triggering even if the SD signal
has not yet reach
the lower input threshold
real disable time
2
1
1
2
= (RON_OD // RSD)
C
SD
= RSD
C
SD
SD/OD
FROM/TO
CONTROLLER
VBIAS
SMART
SD
LOGIC
CSD
RSD
RON_OD
SHUT DOWN CIRCUIT
TIME CONSTANTS
Applications information STGIPS14K60
14/21 Doc ID 15927 Rev 7
5 Applications information
Figure 9. Typical application circuit
AM05001v1
Cvcc
W
Nw
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
VBOOT V
P
OUT U
VBOOT U
OUT V
VBOOT W
OUT W
Rg
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
LIN
SD/OD
VCC
GND
DT
OUT
HVG
Vboot
HIN
LVG
CP+
Rg
Rdt
Rg
Cdt
Rg
Rg
Rg
CONTROLLER
Cvcc
Rdt Cdt
Cvcc
R
C
Rsd
VDC
M
Csd
+
3.3V/5V Line
Cbu
Cbv
Cbw
VCC
Rshunt
GND
HIN-U
LIN-U
SD/OD
HIN-W
LIN-V
HIN-V
LIN-W
CIN
VCC
Nu
Nv
T1
T2
T3
T4
T5
Rdt
T6
V
U
Cdt
D1
D2
D3
D4
D5
D6
STGIPS14K60 Applications information
Doc ID 15927 Rev 7 15/21
5.1 Recommendations
●Input signal HIN is active high logic. A 85 kΩ (typ.) pull down resistor is built-in for each
high side input. If an external RC filter is used, for noise immunity, pay attention to the
variation of the input signal level.
●Input signal /LIN is active low logic. A 720 kΩ (typ.) pull-up resistor, connected to an
internal 5 V regulator through a diode, is built-in for each low side input.
●To prevent the input signals oscillation, the wiring of each input should be as short as
possible.
●By integrating an application specific type HVIC inside the module, direct coupling to
MCU terminals without any opto-coupler is possible.
●Each capacitor should be located as nearby the pins of IPM as possible.
●Low inductance shunt resistors should be used for phase leg current sensing.
●Electrolytic bus capacitors should be mounted as close to the module bus terminals as
possible. Additional high frequency ceramic capacitor mounted close to the module
pins will further improve performance.
●The SD/OD signal should be pulled up to 5 V / 3.3 V with an external resistor (see
Section 4: Smart shutdown function
for detailed info).
Note: For further details refer to AN3338.
Table 13. Recommended operating conditions
Symbol Parameter Conditions
Value
Unit
Min. Typ. Max.
VPN Supply voltage Applied between P-Nu, Nv,
Nw 300 400 V
VCC Control supply voltage Applied between VCC-GND 13.5 15 18 V
VBS High side bias voltage
Applied between VBOOTi-
OUTi for
i = U, V, W
13 18 V
tdead
Blanking time to prevent
Arm-short For each input signal 1 µs
fPWM PWM input signal -40°C < Tc < 100°C
-40°C < Tj < 125°C 20 kHz
TCCase operation temperature 100 °C
Package mechanical data STGIPS14K60
16/21 Doc ID 15927 Rev 7
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at:
www.st.com
.
ECOPACK® is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.
Table 14. SDIP-25L mechanical data
Dim.
(mm.)
Min. Typ. Max.
A 43.90 44.40 44.90
A1 1.15 1.35 1.55
A2 1.40 1.60 1.80
A3 38.90 39.40 39.90
B 21.50 22.00 22.50
B1 11.25 11.85 12.45
B2 24.83 25.23 25.63
C 5.00 5.40 6.00
C1 6.50 7.00 7.50
C2 11.20 11.70 12.20
e 2.15 2.35 2.55
e1 3.40 3.60 3.80
e2 4.50 4.70 4.90
e3 6.30 6.50 6.70
D 33.30
D1 5.55
E 11.20
E1 1.40
F 0.85 1.00 1.15
F1 0.35 0.50 0.65
R 1.55 1.75 1.95
T 0.45 0.55 0.65
V0° 6°
STGIPS14K60 Package mechanical data
Doc ID 15927 Rev 7 17/21
Figure 10. SDIP-25L drawing dimensions data
8154676_H
Package mechanical data STGIPS14K60
18/21 Doc ID 15927 Rev 7
Figure 11. SDIP-25L shipping tube (dimensions are in mm.)
AM10488v1
Base quantity: 11 pcs
Bulk quantity: 132 pcs
8123127_E
STGIPS14K60 Package mechanical data
Doc ID 15927 Rev 7 19/21
Figure 12. SDIP-25L shipping tube type B (dimensions are in mm.)
ANTIS TATIC S 03 P VC
AM10487v1
8123127_E
Base quantity: 11 pcs
Bulk quantity: 132 pcs
Revision history STGIPS14K60
20/21 Doc ID 15927 Rev 7
7 Revision history
Table 15. Document revision history
Date Revision Changes
25-Jun-2009 1Initial release.
05-Aug-2009 2 Reduced VCE(sat) value on
Ta b l e 7 .
15-Jun-2010 3
Document status promoted from preliminary data to datasheet.
Updated package mechanical data,
Table 7: Inverter part,
Figure 5: Maximum IC(RMS) current vs. switching frequency
and Figure 6: Maximum IC(RMS) current vs. fSINE (1).
Minor text changes to improve readability.
08-Nov-2010 4 Updated
Ta b l e 3
,
5
,
8
,
9
,
10
and
Ta b le 1 1
.
Modified:
Figure 5
and
Figure 6
.
09-Mar-2011 5 Updated title with SLLIMM™ in cover page, added SDIP-25L
tube dimensions
Figure 11 on page 18
.
04-Nov-2011 6
Updated title with SLLIMM™ (small low-loss intelligent molded
module) IPM, 3-phase inverter - 14 A, 600 V short-circuit
rugged IGBT in cover page and SDIP-25L mechanical data
Table 14 on page 16
,
Figure 10 on page 17
.
28-Aug-2012 7
Modified: Min. and Max. value
Table 4 on page 5
.
Updated:
Figure 11 on page 18
.
Added:
Figure 12 on page 19
.
STGIPS14K60
Doc ID 15927 Rev 7 21/21
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2012 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
