ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 1 -
GENERAL DESCRIPTION
The AKD4356 is an evaluation board for AK4356, the 24bit 6ch D/A converter for DVD-audio. The
AKD4356 has the interface with AKM’s wave generator using ROM data and with AKM’s A/D converter
evaluation boards. Therefore, it is easy to evaluate the AK4356. The AKD4356 also has the digital audio
interface and can achieve the interface with digital audio systems via opt-connector or RCA connector.
n Ordering guide
AKD4356 --- Evaluation board for AK4356
(Cable for connecting with printer port of IBM-AT compatible PC
and control software are packed with this.)
FUNCTION
• On-board 2nd order LPF
• On-board clock generator
• Compatible with 3 types of interface
- Direct interface with AKM’s A/D converter evaluation boards
and direct interface with AKM’s signal generator(AKD43XX) by 10pin header
- On-board CS8414 as DIR which accepts optical input
- Direct interface with AC3 decoder by 10pin header
• BNC connector for an external clock input
• 10pin header for serial control interface
DVDD = 4.5 ∼ 5.25V GND
CS8414
(DIR)
Opt In
A/D, D/A Data
ROM Data
Clock
Generator
AK4356
Rch
x3
AVDD = 4.5 ∼ 5.25V
10pin Header
RCA In
Lch
x3
Output
LPF
10pin Header
Control Data
Figure 1. AKD4356 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
Evaluation board Rev.B for AK4356
AKD4356
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 2 -
n External analog circuit
The 2nd order LPF (fc=93.2kHz, Q=0.712) which adds differential outputs of AK4356 is implemented on the board.
When the further attenuation of the out-band noise is needed, some additional LPF is required. Analog signal is output
through BNC connectors on the board. And the output level of AK4356 is 5.5Vpp@5V.
The AK4356 detects input signal “zero ” conditions and assert high on DZFL/DZFR pins. As shown on Figure 2, analog
output is muted externally with this signal.
LOUT-
(ROUT-)
AVDD
DZFL*
(DZFR*)
JP*
-
RN1202
LOUT-
(ROUT-)
DZFL*
(DZFR*)
RN2202
2SC3327
+12V
-12V
NJM5532D
R1
C1
R3
R2
C2
R1 R3
R2 C2
22u
10k
+
220
Figur e 2. On-board analog filter
R1 R2 R3 C1 C2
4.7k 4.7k 200 3300p 470p
Table 1. The value of R,C on this board
fin 20kHz 40kHz 80kHz
Frequency Response -0.004dB -0.123dB -1.823dB
Table 2. Frequency Response of LPF
<Calculation>
fC=ω
0
2π,
ω0=1
2*C1*C2*R2*R3 ,
Q= 2*C1*ω0.
+
1
R1 +
1
R2 1
R3
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 3 -
n Operation sequence
1) Set up the power supply lines.
[AVDD] (orange) = 4 . 5∼5.25V
[DVDD] (orange) = 4 . 5∼5.25V
[VD] (red) = 3. 4∼5.0V
[VP+] (green) = +12V∼+15V
[VP-] (blue) = -12V∼-12V
[AGND] (black) = 0V
[DGND] (black) = 0V
Each supply line should be distributed from the power supply unit.
2) Set-up the evaluation modes, jumper pins and DIP switches (See the followings. )
3) Power on.
The AK4356 should be reset once bringing SW1(-PD) “L” upon power-up.
n Evaluation mode
Applicable evaluation modes
1) DIR (Optical Link and RCA) (default)
2) Using ROM data (AK43XX)
3) Using AKM’s evaluation board for ADC
4) Feeding all signals from external
1) DIR (Optical Link and RCA) <default>
PORT4(TORX174) or J1(RCA) is used. All clock are supplied from CS8414(DIR). DIR generates MCLK,
BICK, LRCK and SDATA from the received data through optical connector (TORX174) or RCA connector.
Used for the evaluation using CD test disk. Nothing should be connected to PORT2,3. In case of using optical
connector (TORX174), select “OPT ” on JP17(RCA/OPT). In case of using RCA connector, select “ RCA” .
JP15
XTI JP14
DIR
JP4
LRCK
DIR
ADC
JP7
BICK JP16
XTE JP13
SDATA
DIR
ADC
DIR
BNC
XTL
GND
VD
2) Ideal sine wave generated by ROM data
Connect the AKD43XX with PORT3(AD/ROM). AKD4356 sends MCLK to AKD43XX, and receives LRCK,
BICK and SDATA. In case of using external master clock through a BNC connector, select “BNC” on JP15(XTI)
and short JP16(XTE).
JP15
XTI JP14
DIR
JP4
LRCK
DIR
ADC
JP7
BICK JP16
XTE JP13
SDATA
DIR
ADC
DIR
BNC
XTL
GND
VD
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 4 -
3) Using AKM’s evaluation board for ADC
To evaluate AK4356 with analog input, the AKM’s evaluation board for ADC can be used. MCLK, BICK and
LRCK are supplied from clock generator on the AKD4356, and analog signal is A/D converted and send to
AKD4356 through PORT3(AD/ROM). In case of using external master clock through a BNC connector, select
“BNC” on JP15(XTI) and short JP16(XTE).
JP15
XTI JP14
DIR
JP4
LRCK
DIR
ADC
JP7
BICK JP16
XTE JP13
SDATA
DIR
ADC
DIR
BNC
XTL
GND
VD
4) Feeding all signals from external
Under the following set-up, all external signals can be fed through POTR3.
JP15
XTI JP14
DIR
JP4
LRCK
DIR
ADC
JP7
BICK JP16
XTE JP13
SDATA
DIR
ADC
DIR
BNC
XTL
GND
VD
n BICK frequency
[JP9]: When BICK is fed from 74HC4040 on board,
it’ s frequency is selected with JP9.
128fs: BICK = 128fs
64fs: BICK = 64fs (Figure 3)
32fs: BICK = 32fs
Figure 3. BICK frequency
JP9
X_BICK
128fs
64fs
32fs
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 5 -
n DIP switch set up
Upper side is “ON”(“ H”), lower side is “OFF” (”L”).
[SW3](MODE1): No.1 to 5 set the mode of AK4356 and No.6 to 8 set the mode of CS8412.
No. Pin OFF ON
1 CAD1
2 CAD0 Chip address (2bit)
<default=”00”>
3 DIF0
4 DIF1
5 DIF2
Digital interface format of AK4356
(See table 2.)
6M2
7M1
8M0
Digital interface format of CS8414
(See table 2.)
(Note)
Table 3. SW3 set-up
(Note: M2-0 should be selected at only evaluation mode 1.
In other mode, these should be “ OFF”.)
345678JP6
Mode Format DIF0 DIF1 DIF2 M2 M1 M0 BICK2
0 16bit, LSB justified 000101THR
1 20bit, LSB justified 1 0 0 - - - -
2 24bit, MSB justified 010000INV
3 I2S 110010THRdefault
4 24bit, LSB justified 0 0 1 - - - -
Table 4. Digital interface format set-up (1=ON, 0=OFF)
(CS8414 does not correspond to 20/24bit LSB justified format.)
[SW4](MODE2): Set the mode of AK4356.
No. Pin OFF <default> ON
1 DFS0 Normal speed Double speed
2 DZFE Zero detect disable Zero detect enable
3 CKS2
4 CKS1
5 CKS0
Clock select
(See the datasheet of AK4356.
JP5 and 8 should be selected as table 4.)
Table 5. SW4 set-up
[JP5, 8]: Set the dividing rate corresponding to CKS2-0. This set up is needed only for the evaluation mode 3.
JP5 JP8
Mode FS2 FS1
128fs x1/2 x1
256fs x1 x1
512fs x1 x2
Table 6. JP5 and 8 set up
(For 192fs/384fs/768fs mode, use the external divider.)
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 6 -
PORT1
CR-I/F
12
910 -CS
CCLK
CDTI
PORT2
AC3
1
2
910
SDTI1
SDTI2
SDTI3
MCLK
BICK
LRCK
n Other jumpers set up
[JP1](GND): Analog ground and digital ground
Open: Separated <default>
Short: Common (The connector “DGND” can be open.)
[JP2](DVDD): DVDD of AK4356
DVDD: Independent of AVDD <default>
AVDD: Same as AVDD (The connector “DVDD” can be open.)
[JP3](REG): AVDD of AK4356
Open: Supplied from “AVDD” connector
Short: Supplied from the regulator (The connector “AVDD” should be open.)
[JP10-12](SDTI1-3): SDTI of AK4356
DATA: Serial data <default>
GND: “0” data
n The function of the toggle SW
Upper-side is “H” and lower-side is “L”.
[SW1](-PD): Resets th e AK4356. Keep “H” during normal operation.
[SW2](SMUTE): Soft mute of AK4356. Bring “H” when using soft mute.
n The indication content for LED
[D2] (VERF): Monitors VERF pin of the CS8414. LED turns on when some error has occurred to CS8414.
[D3] (PREM): Indicates whether the input data is pre-emphasized or not. LED turns on when the data is pre-
emphasized.
n Serial control mode
The AK4356 can be controlled via the printer port (parallel port) of IBM-AT
compatible PC. Connect PORT1(CR-I/F) with PC by 10-line flat cable
packed with the AKD4356.
Chip address can be selected by SW3(MODE1)-No.1(CAD1) and No.2(CAD0).
Take care of the direction of connector. There is a mark at 1pin.
The pin layout of PORT1 is as Figure 4.
Figure 4. PORT1 pin layout
n Interface with AC3 decoder
PORT2(AC3) is used for interface with AC3 decoder.
MCLK, BICK, LRCK and 3-line serial data can be input
from the decoder via PORT2.
Pin layout of PORT2 is as Figure5.
In this case, JP4(LRCK), JP7(BICK), JP15(XTI), JP16(XTE),
JP14(DIR) and JP13(SDATA) should be set up as evaluation mode 4.
Figure 5. PORT2 pin layout
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 7 -
MEASUREMENT RESULTS
[Measurement condition]
• Measurement unit : ROHDE & SCHWARZ, UPD04
• MCLK : 256fs
• BICK : 64fs
• fs : 44.1kHz, 96kHz, 192kHz
• BW : 20Hz ∼20kHz (fs=44.1kHz), 20Hz∼40kHz (fs=96kHz), 20Hz∼80kHz (fs=192kHz)
• Bit : 24bit
• Power Supply : AVDD=DVDD=5V
• Interface : DIR (fs=44.1kHz), Serial Multiplex (fs=96kHz, 192kHz)
• Temperature : Room
Parameter Input signal Measurement filter fs=44.1kHz
S/(N+D) 1kHz, 0dB 20kLPF 97.5dB
20kLPF 110.0dBDR 1kHz, -60dB 20kLPF, A-weighted 113.2dB
20kLPF 110.1dBS/N no signal 20kLPF, A-weighted 113.5dB
Parameter Input signal Measurement filter fs=96kHz
S/(N+D) 1kHz, 0dB 40kLPF 94.4dB
40kLPF 106.2dBDR 1kHz, -60dB 20kLPF, A-weighted 112.3dB
40kLPF 106.4dBS/N no signal 20kLPF, A-weighted 112.8dB
Parameter Input signal Measurement filter fs=192kHz
S/(N+D) 1kHz, 0dB 80kLPF 90.0dB
80kLPF 92.6dBDR 1kHz, -60dB 20kLPF, A-weighted 112.8dB
80kLPF 93.3dBS/N no signal 20kLPF, A-weighted 112.8dB
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade
• MCLK : 256fs
• BICK : 64fs
• fs : 44.1kHz
• BW : 20Hz ∼20kHz
• Bit : 24bit
• Power Supply : AVDD=DVDD=5V
• Interface : DIR
• Temperature : Room
Parameter Input signal Measurement filter Results
S/(N+D) 1kHz, 0dB 20kLPF 98.8dB
DR 1kHz, -60dB 22kLPF, A-weighted 112.2dB
S/N no signal 22kLPF, A-weighted 112.6dB
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 8 -
n Plots
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade (fs=48kHz),
ROHDE & SCHWARZ, UPD04 (fs=96kHz)
• MCLK : 256fs
• BICK : 64fs
• fs : 44.1kHz, 96kHz, 192kHz
• BW : 20Hz ∼20kHz (fs=44.1kHz), 20Hz∼40kHz (fs=96kHz), 20Hz∼80kHz (fs=192kHz)
• Bit : 24bit
• Power Supply : VA=VD=5V
• Interface : DIR (fs=48kHz, 96kHz), Serial Multiplex (fs=192kHz)
• Temperature : Room
fs=44.1kHz
Figure 6. THD+N vs Input Level (fin=1kHz)
Figure 7. THD+N vs fin (0dBFS input)
Figure 8. Linearity (fin=1kHz)
Figure 9. Frequency Response (0dBFS input)
Figure 10. Cross-talk (0dBFS input)
Figure 11. FFT (1kHz, 0dBFS input)
Figure 12. FFT (1kHz, -60dBFS input)
Figure 13. FFT (noise floor)
Figure 14. FFT (outband noise)
fs=96kHz
Figure 15. THD+N vs Input Level (fin=1kHz)
Figure 16. THD+N vs fin (0dBFS input)
Figure 17. Linearity (fin=1kHz)
Figure 18. Frequency Response (0dBFS input)
fs=192kHz
Figure 19. THD+N vs Input Level (fin=1kHz)
Figure 20. THD+N vs fin (0dBFS input)
Figure 21. Linearity (fin=1kHz)
Figure 22. Frequency Response (0dBFS input)
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 9 -
A KM AK4356 THD+N vs Input Level (fs=44.1kHz, fin=1kHz)
-120 +0-110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBFS
-120
-90
-118
-116
-114
-112
-110
-108
-106
-104
-102
-100
-98
-96
-94
-92
d
B
r
A
Figure 6. THD+N vs Input Level (fs=44.1kHz; fin=1kHz)
A K M AK4356 THD+N vs fin (fs=44.1kHz, 0dBFS input)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-110
-90
-108
-106
-104
-102
-100
-98
-96
-94
-92
d
B
r
A
Figure 7. THD+N vs fin (fs=44.1kHz; 0dBFS input)
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 10 -
A KM AK4356 Linearity (fs=44.1kHz, fin=1kHz)
-140 +0-130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBFS
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 8. Linearity (fs=44.1kHz; fin=1kHz)
A K M AK4356 Frequency Response (fs=44.1kHz, 0dBFS input)
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
-0.5
+0.5
-0.4
-0.3
-0.2
-0.1
+0
+0.1
+0.2
+0.3
+0.4
d
B
r
A
Figure 9. Frequency Response (fs=44.1kHz; 0dBFS input)
* including output 2nd order LPF Response
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 11 -
A KM AK4356 Cross-talk (fs=44.1kHz, 0dBFS input)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-120
-100
-118
-116
-114
-112
-110
-108
-106
-104
-102
d
B
Figure 10. Cross-talk (fs=44.1kHz; 0dBFS input)
A K M AK4356 FFT (fs=44.1kHz; 1kHz, 0dBFS input)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 11. FFT (fs=44.1kHz; 1kHz, 0dBFS input)
FFT point=16384, Avg=8
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 12 -
A K M AK4356 FFT (fs=44.1kHz; 1kHz, -60dBFS input)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 12. FFT (fs=44.1kHz; 1kHz, -60dBFS input)
FFT point=16384, Avg=8
A KM AK4356 FFT (noise floor; fs=44.1kHz, no signal input)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 13. FFT (noise floor: fs=44.1kHz; no signal input)
FFT point=16384, Avg=8
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 13 -
A KM AK4356 FFT (outband noise: ~130kHz; fs=44.1kHz, no signal input)
200 100k500 1k 2k 5k 10k 20k 50k
Hz
-160
+0
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 14. FFT (outband noise: fs=44.1kHz; no signal input)
FFT point=16384, Avg=8
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 14 -
A KM AK4356 THD+N vs Input Level (fs=96kHz, fin=1kHz)
-120 +0-110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBFS
-120
-90
-118
-116
-114
-112
-110
-108
-106
-104
-102
-100
-98
-96
-94
-92
d
B
r
A
Figure 15. THD+N vs Input Level (fs=96kHz; fin=1kHz)
A KM AK4356 THD+N vs fin (fs=96kHz, 0dBFS input)
20 40k50 100 200 500 1k 2k 5k 10k 20k
Hz
-110
-90
-108
-106
-104
-102
-100
-98
-96
-94
-92
d
B
r
A
Figure 16. THD+N vs fin (fs=96kHz; 0dBFS input)
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 15 -
A KM AK4356 Linearity (fs=96kHz, fin=1kHz)
-140 +0-130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBFS
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 17. Linearity (fs=96kHz; fin=1kHz)
A K M AK4356 Frequency Response (fs=96kHz, 0dBFS input)
2.5k 40k5k 7.5k 10k 12.5k 15k 17.5k 20k 22.5k 25k 27.5k 30k 32.5k 35k 37.5k
Hz
-0.5
+0.5
-0.4
-0.3
-0.2
-0.1
+0
+0.1
+0.2
+0.3
+0.4
d
B
r
A
Figure 18. Frequency Response (fs=96kHz; 0dBFS input)
including external 2nd order LPF response
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 16 -
Figure 19. THD+N vs Input Level (fs=192kHz; fin=1kHz)
Figure 20. THD+N vs fin (fs=192kHz; 0dBFS input)
ASAHI KASEI [AKD4356]
<KM060602> ’99/11
- 17 -
Figure 21. Linearity (fs=192kHz; fin=1kHz)
Figure 22. Frequency Response (fs=192kHz; 0dBFS input)
* including external 2nd order LPF response
ASAHI KASEI [AKD4356 Control Program]
‘99/3
- 1 -
AKD4356 Control Program ver 1.0 operation manual
1. Connect IBM-AT compatible PC with AKD4356 by 10-line type flat cable (packed with AKD4356).
Take care of the direction of 10pin Header (Refer to manual of AKD4356).
2. Start up “WINDOWS 95” or “ WINDOWS 98”.
3. Insert the floppy-disk labeled “AKD4356 Control Program ver 1.0” into the floppy-disk drive.
4. Set up “MS-DOS” from start menu.
5. Change directory to the floppy-disk drive(ex.a:) at MS-DOS prompt.
6. Type “ ak4356”.
7. Then follow the displayed comment (See the following).
==================== <<Operating flow>> =====================
Input Chip Address (2bit)
Write data/ Display register map/ Reset etc.à loop
=========================================================
ASAHI KASEI [AKD4356 Control Program]
‘99/3
- 2 -
At first the following message is displayed:
****** AK4356 Control Program ver 1.0 , '99/3 ******
copyright(c) 1999, Asahi Kasei Microsystems co.,ltd.
All rights reserved.
Input Chip Address(CAD1,CAD0) (2 figure, binary) =
Input chip address in 2 figures of binary.
Set CAD1 and CAD0 before the AKD4356 is powered up.
When hanging CAD1 and CAD0, set SW1(-PD) “L”, then “H” after that.
After chip address is defined, the following default register map is displayed (Loop starts from here):
CAD1-0=00 ----------------------------------------------------------------
ADDR = 00 : 01 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN )
ADDR = 01 : 01 <Control 2> ( 0 0 0 CKS2 CKS1 CKS0 SMUTE RSTN )
ADDR = 02 : 0F <Speed & PD> ( 0 0 DFS1 DFS0 PW3 PW2 PW1 RSTN )
ADDR = 03 : 15 <DEM control>( 0 0 DEMC1 DEMC0 DEMB1 DEMB0 DEMA1 DEMA0)
ADDR = 04 : FF <LOUT1 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 05 : FF <ROUT1 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 06 : FF <LOUT2 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 07 : FF <ROUT2 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 08 : FF <LOUT3 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 09 : FF <ROUT3 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 )
ADDR = 0A : 00 <Test> ( TEST7 TEST6 TEST5 TEST4 TEST3 TEST2 TEST1 TEST0)
Input 1(Write), R(Reset), T(Table), I(Increment), D(Decrement) or S(Stop) :
1) If you input “1”, you can write data to AK4356.
You can write data to AK4356
Input Register Address (2 figure, hex) (00-0A) =
Input register address in 2 figures of hexadecimal.
Then current data of this address is displayed:
ADDR = 00 : 01 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN )
0 0 0 0 0 0 0 1
Input Register Data (2 figure, hex) (00-FF) =
You can write control data to this address. Input control data in 2 figures of hexadecimal.
Refer to datasheet of AK4356.
Then the data written to this address is displayed:
ADDR = 00 : 07 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN )
0 0 0 0 0 1 1 1
ASAHI KASEI [AKD4356 Control Program]
‘99/3
- 3 -
2) If you input “R” or “r”, this program writes default data to all register addresses.
3) If you input “T ” or “t”, current register map is displayed.
4) If you input “I” or “i”, this program increment data of current address by 1 (only for addr=04H to 09H).
You can increment ATT value by 1step.
5) If you input “D” or “d”, this program decrement data of current address by 1 (only for addr=04H to 09H).
You can decrement ATT value by 1step.
6) If you input “S” or “s”, this program is terminated.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CCLK
CDTI
-CS
LH
LH
Analog GroundDigital Ground
AK4356
B
AKD4356
A4
13
Tuesday, August 10, 1999
Title
Size Document Number Rev
Date: Sheet of
LOUT1+
LOUT1-
ROUT1+
ROUT1-
LOUT2+
LOUT2-
ROUT2+
ROUT2-
LOUT3+
LOUT3-
ROUT3+
ROUT3-
DZFL2
DZFR1
DZFL1
DZFR2
DZFL3
DZFR3
SDTI1
SDTI2
LRCK
SDTI3
BICK
MCLK
AVDD1
AVDD1
REG
DVDD1
CKS1
CKS2
DIF1
DIF0
DIF2
DZFE
CKS0
DFS0
DVDD1
CAD0
CAD1
AVDD2
AVDD1
VD
VD
VD
DVDD
AVDD
C5
0.1u
+
C6
10u
R4
51
R7
2.2k
PORT1
CR-I/F
1
2
3
4
5 6
7
8
9
10
R9
2.2k
R8
2.2k
R5
51
R6
51
R2
10k R3
1k
SW2
SMUTE
+
C4
1u
C3
0.1u
+
C2
10u
D1 R1
10k
SW1
-PD
C1
0.1u
+
C7
47u
JP2
DVDD 1
2
3
U4
74AC541
2
3
4
5
6
7
8
9
1
19
18
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
A8
G1
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
U1A
74HC14
1 2 U1B
74HC14
3 4
U1C
74HC14
5 6
JP1
GND
U3
AK4356
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
LOUT1-
LOUT1+
DZFL2
DZFR1
DZFL1
CAD0
CAD1
PD
BICK
MCLK
DVDD
DVSS
SDTI1
SDTI2
SDTI3
LRCK
SMUTE
CCLK
CDTI
CS
DFS0
CKS0
CKS1
CKS2
DIF0
DIF1
DIF2
DZFE
DZFR3
DZFL3
DZFR2
VREFH
AVDD
AVSS
ROUT3-
ROUT3+
LOUT3-
LOUT3+
ROUT2-
ROUT2+
LOUT2-
LOUT2+
ROUT1-
ROUT1+
+
C9
47u
JP3
REG L1
(short)12
+
C8
47u
L6
10u
12
U2
74AC541
2
3
4
5
6
7
8
9
1
19
18
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
A8
G1
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
T1
NJM78M05FA
1
2
3OUT
GND
IN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDGND
RCA OPT
AD/ROM
SDATA
MCLK
LRCK
BICK
THR
INV
XTL
BNC
DIR
x2
x1
32fs
64fs
128fs
x1/2
x1
for 74HCU04, 74HC14, 74AC74,
74AC541x2,74HC4040
DIF0
DIF1
DIF2
CAD0
CAD1
CKS0
CKS1
CKS2
DZFE
DFS0
ADC
DIR
DIR
ADC
DATA
DATA
DATA
GND
GND
GND
M0
M1
M2
MCLK
BICK
LRCK SDTI1
SDTI2
SDTI3
Interface
B
AKD4356
A3
23Tuesday, August 10, 1999
Title
Size Document Number Rev
Date: Sheet of
SDTI3
SDTI2
SDTI1
X_BICK
DIR_BICK
DIR_LRCK
LRCK
BICK
M0
M2
DIR_BICK
DIR_LRCK
X_LRCK
X_BICK
MCLK
DIF0
DIF1
CAD0
CAD1 CKS0
CKS1
CKS2
DZFE
DFS0
DIF2
M2
M0
M1
M1
X_LRCK
VD
VD
VD
VD
VD VD VD
PORT4
TORX174
1
3
4
2
6
5OUT
VCC
GND
GND
6
5C19
0.1u
+
C17
10u
C26
0.01u
C23
0.01u
JP17
RCA/OPT
1
2
3
D3
PREM
D2
VERF L2
10u
1 2
U5B
74HCU04
34
R12
1k
PORT3
ROM
1
2
3
4
5 6
7
8
9
10
JP11
SDTI2
1
2
3
JP13
SDATA
U5A
74HCU04
1 2 JP6
BICK2
1
2
3
C25
0.1u
R15
1k
C24
47n
R14
1k
+
C18 10u
C20 0.1u C22
(open)
R13
1M
J2
BNC
U5D
74HCU04
98 U5E
74HCU04
1110 JP16
XTE
R10
10k
JP14
DIR 1
2
3
L3
10u
12
C21
(open)
JP15
XTI
JP9
X_BICK
JP5
FS2
1
2
3
+
C10
47u C11
0.1u C12
0.1u C13
0.1u C14
0.1u C15
0.1u SW4
MODE2
1
2
3
4
5
10
9
8
7
6
RP2
47k
5
4
3
2
1
JP10
SDTI1
1
2
3
JP12
SDTI3
1
2
3
J1
RCA
X1
11.2896MHz
12
RP1
47k
1
2
3
4
5
6
7
8
9
SW3
MODE1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
U8
CS8414
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
C
Cd/F1
Cc/F0
Cb/E2
Ca/E1
C0/E0
VD+
DGND
RXP
RXN
FSYNC
SCK
CS12/FCK
U CBL
SEL
M3
M2
MCK
FILT
AGND
VA+
M0
M1
ERF
SDATA
Ce/F2
VREF
U7A
74AC74
2
3
5
6
41
D
CLK
Q
Q
PRCL
R11
1k
R16
75
U6
74HC4040
10
11
9
7
6
5
3
2
4
13
12
14
15
1
CLK
RST
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
JP8
FS1
1
2 3
4
C16
0.1u
R17
51
U5C
74HCU04
56
PORT2
AC3
1
2
3
4
5 6
7
8
9
10
JP4
LRCK
JP7
BICK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ON
OFF
ON
OFF
ON
OFFOFF
ON
OFF
ON
OFF
ON
for NJM5532D x3
for NJM5532D x3
(10k,10k) (10k,10k)
(10k,10k)
(10k,10k) (10k,10k)
(10k,10k)
(10k,10k)
(10k,10k)
(10k,10k) (10k,10k)
(10k,10k)
(10k,10k)
Analog out
B
AKD4356
A3
33Tuesday, August 10, 1999
Title
Size Document Number Rev
Date: Sheet of
LOUT1+
LOUT1-
DZFL1
ROUT1-
DZFR1
ROUT2+
ROUT2-
DZFR2
LOUT2+
LOUT2-
LOUT3+
DZFL3
ROUT3+
DZFR3
DZFL2
LOUT3- ROUT3-
ROUT1+
AVDD2
AVDD2
AVDD2AVDD2
AVDD2
AVDD2
12V_P
12V_N
12V_P
12V_N
12V_N
12V_P
12V_N
12V_P
12V_N
12V_P
12V_N
12V_P
12V_N
12V_P
REG
+12V
-12V
+
-
U9A
NJM5532D
3
21
8 4
R29
200
R34
4.7k
R28
4.7k
R21
4.7k
R32
10k
C37
470p
R24
200
R20
4.7k
C31
3300p C33
22u C35
(open)
J3
LOUT1
R18
10k
JP18
DZFL1
1
2 3
4
C27
(open)
+
-
U9B
NJM5532D
5
67
8 4
R31
200
R35
4.7k
R30
4.7k
R23
4.7k
R33
10k
C38
470p
C30
470p
R25
200
R22
4.7k
C32
3300p C34
22u C36
(open)
J4
ROUT1
R19
10k
JP19
DZFR1
1
2 3
4
C28
(open)
+
-
U10B
NJM5532D
5
67
8 4
R49
200
R41
4.7k
R51
10k
C57
470p
C49
470p
R43
200
R40
4.7k
C53
22u C55
(open)
J6
ROUT2
R37
10k
JP21
DZFR2
1
2 3
4
C47
(open)
C52
22u
R52
4.7k
C46
(open)
R42
200
+
-
U10A
NJM5532D
3
21
8 4
R39
4.7k
R47
200
J5
LOUT2
C54
(open)
C50
3300p
R38
4.7k C48
470p
C56
470p
R36
10k
R50
10k
R46
4.7k
JP20
DZFL2
1
2 3
4
C73
(open)
C71
22u
+
-
U11A
NJM5532D
3
21
8 4
R70
4.7k
R65
200 R68
10k
J7
LOUT3
R57
4.7k
R56
4.7k
JP22
DZFL3
1
2 3
4
C65
(open)
R60
200
R64
4.7k C75
470p
R54
10k
C69
3300p
C67
470p
C74
(open)
C72
22u
+
-
U11B
NJM5532D
5
67
8 4
R71
4.7k
R67
200 R69
10k
J8
ROUT3
R59
4.7k
R58
4.7k
JP23
DZFR3
1
2 3
4
C66
(open)
R61
200
R66
4.7k C76
470p
R55
10k
C70
3300p
C68
470p
C45
0.1u
C43
0.1u
C44
0.1u
+
C41
10u
+
C42
10u
+
C40
10u
C64
0.1u
C62
0.1u
L5
10u
1 2
TR13
RN1202
1
3
2
TR14
RN1202
1
3
2
TR2
RN1202
1
3
2
TR8
RN1202
1
3
2
TR7
RN1202
1
3
2
TR1
RN1202
1
3
2
TR3
RN2202
1
3
2
TR9
RN2202
1
3
2
TR15
RN2202
1
3
2
TR16
RN2202
1
3
2
TR10
RN2202
1
3
2
TR4
RN2202
1
3
2
+
C59
10u
+
C61
10u
+
C58
47u
+
C63
10u
C60
0.1u
R26
220
R44
220
R62
220 R63
220
R45
220
R27
220
C29
470p
C78
(short)
C79
(short)
C82
(short)
C83
(short)
C86
(short)
C87
(short)
C80
(short)
C81
(short)
C84
(short)
C51
3300p
R53
4.7k
R48
4.7k
C88
(short)
C89
(short)
+
C39
47u
L4
10u
1 2
C77
0.1u
C85
(short)
TR5
2SC3327
1
3
2
TR6
2SC3327
1
3
2
TR11
2SC3327
1
3
2
TR12
2SC3327
1
3
2
TR17
2SC3327
1
3
2
TR18
2SC3327
1
3
2
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before
considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM)
sales office or authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right
in the application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export
license or other official approval under the law and regulations of the country of export
pertaining to customs and tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any
safety, life support, or other hazard related device or system, and AKM assumes no
responsibility relating to any such use, except with the express written consent of the
Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or
maintenance of safety or for applications in medicine, aerospace, nuclear energy, or
other fields, in which its failure to function or perform may reasonably be expected to
result in loss of life or in significant injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be
expected to result, whether directly or indirectly, in the loss of the safety or effectiveness
of the device or system containing it, and which must therefore meet very high standards
of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes
of, or otherwise places the product with a third party to notify that party in advance of the
above content and conditions, and the buyer or distributor agrees to assume any and all
responsibility and liability for and hold AKM harmless from any and all claims arising from
the use of said product in the absence of such notification.
