ARA2005 Reverse Amplifier with Step Attenuator PRELIMINARY DATA SHEET - Rev 1.3 FEATURES * * * * * * * Low cost integrated monolithic GaAs amplifier with step attenuator Attenuation Range: 0-58 dB, adjustable in 4dB increments via a 4 wire parallel control Meets DOCSIS distortion requirements at a +60dBmV output signal level Low distortion and low noise Frequency range: 5-100MHz 5 Volt operation -40 to +85 0C temperature range APPLICATIONS * * * * * MCNS/DOCSIS Compliant Cable Modems CATV Interactive Set-Top Box Telephony over Cable Systems OpenCable Set-Top Box Residential Gateway S8 Package 28 Pin SSOP PRODUCT DESCRIPTION The ARA2005 is a monolithic GaAs device designed to provide the reverse path amplification and output level control functions in a Cable TV Set Top Box or Cable Modem. It incorporates a digitally controlled precision step attenuator, which is preceded by an ultra low noise amplifier stage and followed by an ulta-linear output driver amplifier. The ARA2005 uses a balanced circuit design that exceeds the MCNS/ DOCSIS requirement for harmonic performance at a +60 dBmV output level while requiring only a single 4 Balun +5V supply. Both the input and output of the device are matched to 75 Ohms with an appropriate transformer. The precision attenuator provides up to 58 dB of attenuation in 4 dB increments, programmable via a four-bit digital control interface. With external passive components, this device meets IEC 1000-4-12 and ANSI/IEEE C62.41-1991 100KHz ringwave tests, as well as IEC1000-4-5 1.2/50mS surge tests. The ARA2005 is offered in a 28-pin SSOP package. Attenuation Control Low Pass Filter ARA2005 Upstream QPSK/16QAM Modulator RAM Clock Data Transmit Enable/Disable 5-42 MHz Microcontroller with Ethernet MAC MAC Clock ROM Data 44 MHz Diplexer 54-860 MHz DoubleConversion Tuner SAW Filter QAM Receiver with FEC 10Base-T Transceiver Figure 1: Cable Modem or Set Top Box Application Diagram 08/2001 RJ45 Connector ARA2005 ATTOUT (+) ATTIN (+) A1OUT (+) A2IN (+) A1IN (+) 32 dB ISET1 16 dB 8 dB A2OUT (+) 4 dB ISET2 EFET EFET Vg2 Vg1 A2OUT (-) A1IN (-) A1OUT (-) A2IN (-) ATTIN (-) ATTOUT (-) 32 dB 16 dB 8 dB 4 dB Figure 2: Functional Block Diagram 1 GND GND 28 2 VATTN GND 27 3 ATTIN (+) ATTOUT (+) 26 4 A1OUT (+) A2IN (+) 25 5 GND GND 24 6 A1IN (+) A2OUT (+) 23 7 Vg1 Vg2 22 8 ISET1 ISET2 21 9 A1IN (-) A2OUT (-) 20 10 GND GND 19 11 A1OUT (-) A2IN (-) 18 12 ATTIN (-) ATTOUT (-) 17 13 32 dB 4 dB 16 14 16 dB 8 dB 15 Figure 3: Pin Out 2 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 ARA2005 Table 1: Pin Description PIN N AME 1 GND 2 D ESC R IPTION PIN N AME Ground 15 8 dB 8 dB Attenuati on C ontrol Bi t VATTN Supply for Attenuator 16 4 dB 4 dB Attenuati on C ontrol Bi t 3 ATTIN (+) Attenuator Input (+) (1) 17 ATTOUT (-) Attenuator (-) Output 4 A1OUT (+) Ampli fi er A1 (+) Output 18 A2IN (-) Ampli fi er A2 (-) Input 5 GND Ground 19 GND 6 A1IN (+) 20 A2OUT (-) 7 V g1 Ampli fi er A1 (+/-) C ontrol 21 ISET2 Ampli fi er A2 (+/-) C urrent Adjust 8 ISET1 Ampli fi er A1 (+/-) C urrent Adjust 22 V g2 Ampli fi er A2 (+/-) C ontrol 9 A1IN (-) Ampli fi er A1 (-) Input 23 A2OUT (+) 10 GND Ground 24 GND 11 A1OUT (-) Ampli fi er A1 (-) Output 25 A2IN (+) Ampli fi er A2 (+) Input 12 ATTIN (-) Attenuator Input (-) 26 ATTOUT (+) Attenuator (+) Output 13 32 dB 32 dB Attenuati on C ontrol Bi t 27 GND Ground 14 16 dB 16 dB Attenuati on C ontrol Bi t 28 GND Ground Ampli fi er A1 (+) Input (1) (1) (1) D ESC R IPTION (1) (1) Ground Ampli fi er A2 (-) Output Ampli fi er A2 (+) Output Ground (1) (1) Notes: (1) Pins should be AC-coupled. No external DC bias should be applied. PRELIMINARY DATA SHEET - Rev 1.3 08/2001 3 ARA2005 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PAR AMETER MIN MAX U N IT Analog Supply (pi ns 2, 4, 11, 20, 23) 0 9 VD C Ampli fi er C ontrols Vg1, Vg2 (pi ns 7, 22) -5 2 V RF Power at Inputs (pi ns 6, 9) - +60 dBmV Attenuator C ontrols (pi ns 13, 14, 15, 16) 0 6 V -55 +200 0 C Solderi ng Temperature - 260 0 C Solderi ng Ti me - 5 Storage Temperature S ec Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Notes: 1. Pins 3, 6, 9, 12, 17, 18, 25 and 26 should be AC-coupled. No external DC bias should be applied. 2. Pins 8 and 21 should be grounded or pulled to ground through a resistor. No external DC bias should be applied. Table 3: Operating Ranges PAR AMETER MIN TYP MAX U N IT Ampli fi er Supply: VDD (pi ns 4, 11, 20, 23) 4.5 5 7 VD C VDD-0.5 5 7 VD C Attenuator C ontrols (pi ns 13, 14, 15, 16) 0 - VDD+0.5 V Ampli fi er C ontrols Vg1, Vg2 (pi ns 7, 22) -5 1 2 V C ase Temperature -40 25 85 Attenuator Supply: VATTN (pi n 2) 0 C The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. 4 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 ARA2005 Table 4: DC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC; Vg1, Vg2 = +1.0 V (Tx enabled); Vg1, Vg2 = 0 V (Tx disabled) PAR AMETER MIN TYP MAX U N IT C OMMEN TS Ampli fi er A1 C urrent (pi ns 4, 11) - 48 2.4 80 6 mA Tx enabled Tx di sabled Ampli fi er A2 C urrent (pi ns 20, 23) - 70 3.7 110 9 mA Tx enabled Tx di sabled Attenuator C urrent (pi n 2) - 2 5 mA Total Power C onsumpti on - 600 40 900 100 mW Tx enabled Tx di sabled Table 5: AC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC; Vg1, Vg2 = +1.0 V (Tx enabled); Vg1, Vg2 = 0 V (Tx disabled) PAR AMETER MIN TYP MAX U N IT Gai n (10 MHz) 27.5 29.3 30.5 dB 0 dB attenuati on setti ng Gai n Flatness - 0.75 1.5 - dB 5 to 42 MHz 5 to 65 MHz Gai n Vari ati on over Temperature - -0.006 - dB/C 3.6 7.5 15.0 30.2 3.75 7.75 15.4 30.75 4.0 8.0 15.8 31.3 56.3 57.8 59.1 dB 2nd Harmoni c D i storti on Level (10 MHz) - -75 -53 dB c +60 dBmV i nto 75 Ohms 3rd Harmoni c D i storti on Level (10 MHz) - -60 -53 dB c +60 dBmV i nto 75 Ohms 78 - - dBmV 1 dB Gai n C ompressi on - 68.5 - dBmV Noi se Fi gure - 3.0 4.0 dB Attenuati on Steps 4 dB 8 dB 16 dB 32 dB Maxi mum Attenuati on 3rd Order Output Intercept dB C OMMEN TS Monotoni c Includes i nput balun loss Note: As measured in ANADIGICS test fixture PRELIMINARY DATA SHEET - Rev 1.3 08/2001 5 ARA2005 continued: AC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC; Vg1, Vg2 = +1.0 V (Tx enabled); Vg1, Vg2 = 0 V (Tx disabled) PAR AMETER MIN TYP MAX U N IT C OMMEN TS Output Noi se Power Acti ve / No Si gnal / Mi n. Atten. Set. Acti ve / No Si gnal / Max. Atten. Set. - - -38.5 -53.8 dBmV Any 160 kHz bandwi dth from 5 to 42 MHz Isolati on i n Tx di sable mode - 52 - dB D i fferenti al Input Impedance - 300 - Ohms between pi ns 6 and 9 (Tx enabled) Input Impedance - 75 - Ohms wi th transformer (Tx enabled) Input Return Loss (75 Ohm characteri sti c i mpedance) - -20 -5 -12 - dB D i fferenti al Output Impedance - 300 - Ohms between pi ns 20 and 23 Output Impedance - 75 - Ohms wi th transformer Output Return Loss (75 Ohm characteri sti c i mpedance) - -17 -15 -12 -10 dB Output Voltage Transi ent Tx enable / Tx di sable - 4 100 7 mVp-p Note: As measured in ANADIGICS test fixture 6 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 Tx enabled Tx di sabled Tx enabled Tx di sabled 0 dB attenuator setti ng 24 dB attenuator setti ng Control A1 0 / +3 V Control A2 0 / +3 V +5 V +5 V 1uF 2K Ohms 2K Ohms 1uF 0.1uF 2K Ohms Figure 4: Test Circuit PRELIMINARY DATA SHEET - Rev 1.3 08/2001 1K Ohms 2 470pF 1000pF RF Input (75 Ohms) Turns Ratio 1:2 1 10uH 1000pF 1.2K Ohms 1.2K Ohms 1000pF 1000pF 28 GND 27 ATTIN (+) ATTOUT (+) 26 A1OUT (+) A2IN (+) 25 GND 24 GND 6 A1IN (+) A2OUT (+) 23 7 Vg1 Vg2 22 8 ISET1 ISET2 21 9 A1IN (-) A2OUT (-) 20 10 GND GND 19 11 A1OUT (-) A2IN (-) 18 12 ATTIN (-) ATTOUT (-) 17 13 32 dB 4 dB 16 8 dB 15 14 16 dB 1K Ohms 0.1uF 4 10uH 1uF VATTN GND 3 5 3.9 Ohms GND 2K Ohms 470pF 470pF Turns Ratio 2:1 1500pF RF Output (75 Ohms) Toko Balun 616PT-1030 470pF ARA2005 4 dB 8 dB 16 dB +5 V 32 dB 0.1uF Note: Tx Enable: Control A1 and Control A2 = +3V Tx Disable: Control A1 and Control A2 = 0V ARA2005 7 ARA2005 PERFORMANCE DATA Figure 5: Gain & Noise Figure vs Frequency Noise Figure 8 30 7 25 6 20 5 15 4 10 3 5 NF (dB) Gain (dB) Gain 35 2 10 30 50 70 90 Frequency (MHz) Figure 6: Gain & Noise Figure vs VDD GAIN (dB) Noise Figure 6 32 5 29 4 26 3 23 2 NF (dB) Gain 35 Measured @ 30 MHz 20 1 3 4 5 6 7 VDD ( Volts ) Figure 7: Gain & Noise Figure vs Temperature GAIN (dB) Noise Figure 6 32 5 29 4 26 3 23 2 Measured @ 30 MHz 20 1 -40 -25 -10 5 20 35 50 65 o Temperature (C ) 8 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 80 NF (dB) Gain 35 ARA2005 Figure 8: Harmonic Distortion vs VDD POUT = 58dBmV 2nd Harmonic 3rd Harmonic -20 Harmonic Level (dBc) -30 -40 -50 -60 -70 Measured @ 5 MHz -80 3 4 5 6 7 VDD ( Volts ) Figure 9: Harmonic Distortion vs VDD POUT = 58dBmV 2nd Harmonic 3rd Harmonic -20 Harmonic Level (dBc) -30 -40 -50 -60 -70 Measured @ 12 MHz -80 3 4 5 6 7 VDD ( Volts ) Figure 10: Harmonic Distortion vs Temperature POUT = 58dBmV 2nd Harmonic 3rd Harmonic -40 Harmonic level (dBc) -45 -50 -55 -60 -65 -70 -75 Measured @ 5 MHz -80 -40 -25 -10 5 20 35 50 65 80 Temperature (Co) PRELIMINARY DATA SHEET - Rev 1.3 08/2001 9 ARA2005 Figure 11: Harmonic Distortion vs Power Out 2nd 3rd -30 -35 Harmonics (dBc) -40 -45 -50 -55 -60 -65 -70 -75 49 51 53 55 57 59 61 63 65 67 Pout (dBmV) Figure 12: Transients vs Attenuation POUT = 55dBmV at 0dB attenuation ARA2005 ARA2001 DOCSIS 1.1 Spec. 100 90 Transient (mV) 80 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 Power Attenuation (dB) Figure 13: Harmonic Performance over Frequency POUT = +62dBmV 2nd Harmonic 3rd Harmonic -50 Harmonic Level (dBc) -52 -54 -56 -58 -60 -62 -64 -66 -68 -70 -72 0 10 5 10 15 20 Frequency (MHz) 25 30 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 35 40 ARA2005 Figure 14: IIP2 & IIP3 vs Frequency IIP3 14 36 12 32 10 28 8 24 IIP3 (dBm) IIP2 (dBm) IIP2 40 6 Measured @ V DD = 5 Volts Pin = -20 dBm per tone 20 4 5 15 25 35 45 55 65 Frequency (MHz) 75 85 95 Figure 15: IIP2 & IIP3 vs VDD IIP3 15 36 11 32 7 28 3 24 IIP3 (dBm) IIP2 (dBm) IIP2 40 -1 Measured @ 65 MHz Two tones @ 29.5 MHz 20 -5 3 4 5 VDD (Volts) 6 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 7 11 ARA2005 APPLICATION INFORMATION Transmit Enable / Disable The ARA2005 includes two amplification stages that each can be shut down through external control pins Vg1 and Vg2 (pins 7 and 22, respectively.) By applying a slightly positive bias of typically +1.0 Volts, the amplifier is enabled. In order to disable the amplifier, the control pin needs to be pulled to ground. A practical way to implement the necessary control is to use bias resistor networks similar to those shown in the test circuit schematic (Figure 4.) Each network includes a resistor shunted to ground that serves as a pull-down to disable the amplifier when no control voltage is applied. When a positive voltage is applied, the network acts as a voltage divider that presents the required +1.0 Volts to enable the amplifier. By selecting different resistor values for the voltage divider, the network can accommodate different control voltage inputs. The Vg1 and Vg2 pins may be connected together directly, and controlled through a single resistor network from a common control voltage. Amplifier Bias Current The ISET pins (8 and 21) set the bias current for the amplification stages. Grounding these pins results in the maximum possible current. By placing a resistor from the pin to ground, the current can be reduced. The recommended bias conditions use the configuration shown in the test circuit schematic in Figure 4. Output Transformer Matching the output of the ARA2005 to a 75 Ohm load is accomplished using a 2:1 turns ratio transformer. In addition to providing an impedance transformation, this transformer provides the bias to the output amplifier stage via the center tap. The transformer also cancels even mode distortion products and common mode signals, such as the voltage transients that occur while enabling and disabling the amplifiers. As a result, care must be taken when selecting the transformer to be used at the output. It must be capable of handling the RF and DC power requirements without saturating the core, and it must have adequate isolation and good phase and amplitude balance. It also must operate over the desired frequency and temperature range for the intended application. ESD Sensitivity Electrostatic discharges can cause permanent damage to this device. Electrostatic charges accumulate on test equipment and the human body, and can discharge without detection. Although the ARA2005 has some built-in ESD protection, proper precautions and handling are strongly recommended. Refer to the ANADIGICS application note on ESD precautions. Attenuator Control Each of the four internal attenuation stages of the ARA2005 is controlled by a TTL-compatible logic input at one of the attenuator control pins (13 - 16). A logic high will enable a given attenuator stage, and a logic low will bypass it. 12 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 ARA2005 PACKAGE OUTLINE Figure 16: S8 Package Outline - 28 Pin SSOP PRELIMINARY DATA SHEET - Rev 1.3 08/2001 13 ARA2005 COMPONENT PACKAGING Volume quantities of the ARA2005 are supplied on tape and reel. Each reel holds 3,500 pieces. Smaller quantities are available in plastic tubes of 50 pieces. Figure 17: Reel Dimensions DIRECTION OF FEED Figure 18: Tape Dimensions 14 PRELIMINARY DATA SHEET - Rev 1.3 08/2001 ARA2005 NOTES PRELIMINARY DATA SHEET - Rev 1.3 08/2001 15 ARA2005 ORDERING INFORMATION OR D ER N U MB ER TEMPER ATU R E R AN GE PAC K AGE D ESC R IPTION ARA2005S8P1 -40 to 85 0C 28 Pi n SSOP 3,500 pi ece tape and reel ARA2005S8P0 -40 to 85 0C 28 Pi n SSOP Plasti c tubes (50 pi eces per tube) C OMPON EN T PAC K AGIN G ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. WARNING ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 16 PRELIMINARY DATA SHEET - Rev 1.3 08/2001