© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 19
1Publication Order Number:
MC74VHC1G132/D
MC74VHC1G132
2-Input NAND
Schmitt-Trigger
The MC74VHC1G132 is a single gate CMOS Schmitt NAND
trigger fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The MC74VHC1G132 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G132 to be used to interface 5 V circuits to 3 V
circuits.
The MC74VHC1G132 can be used to enhance noise immunity or to
square up slowly changing waveforms.
Features
•High Speed: tPD = 3.6 ns (Typ) at VCC = 5 V
•Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C
•Power Down Protection Provided on Inputs
•Balanced Propagation Delays
•Pin and Function Compatible with Other Standard Logic Families
•Chip Complexity: FETs = 68; Equivalent Gates = 16
•These Devices are Pb−Free and are RoHS Compliant
Figure 1. Pinout (Top View)
VCC
IN B
IN A
OUT Y
GND
IN A
IN B OUT Y
&
Figure 2. Logic Symbol
1
2
34
5
PIN ASSIGNMENT
1
2
3 GND
IN B
IN A
4
5V
CC
OUT Y
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs Output
AB
H
H
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
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SC−88A / SOT−353 / SC−70
DF SUFFIX
CASE 419A
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
CASE 483
MARKING
DIAGRAMS
1
5
1
5
1
5
VD M G
G
VD = Device Code
M = Date Code*
G= Pb−Free Package
1
5
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
VD M G
G
M
MC74VHC1G132
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage *0.5 to )7.0 V
VIN DC Input Voltage −0.5 to +7.0 V
VOUT DC Output Voltage *0.5 to VCC )0.5 V
IIK DC Input Diode Current −20 mA
IOK DC Output Diode Current $20 mA
IOUT DC Output Sink Current $12.5 mA
ICC DC Supply Current per Supply Pin $25 mA
TSTG Storage Temperature Range *65 to )150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds 260 °C
TJJunction Temperature Under Bias )150 °C
qJA Thermal Resistance SC70−5/SC−88A (Note 1)
TSOP−5
350
230
°C/W
PDPower Dissipation in Still Air at 85°CSC70−5/SC−88A
TSOP−5
150
200
mW
MSL Moisture Sensitivity Level 1
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
VESD ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
ILATCHUP Latchup Performance Above VCC and Below GND at 125°C (Note 5) $500 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage 2.0 5.5 V
VIN DC Input Voltage 0.0 5.5 V
VOUT DC Output Voltage 0.0 VCC V
TAOperating Temperature Range *55 )125 °C
tr , tfInput Rise and Fall Time VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
−
−
No Limit
No Limit
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature °CTime, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100 1000
TIME, YEARS
NORMALIZED FAILURE RATE
TJ= 80 C°
TJ= 90 C°
TJ= 100 C°
TJ= 110 C°
TJ= 130 C°
TJ= 120 C°
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 3. Failure Rate vs. Time Junction Temperature
MC74VHC1G132
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3
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
VCC
(V)
TA = 25°C TA ≤ 85°C−55 ≤ TA ≤ 125°C
Unit
Min Typ Max Min Max Min Max
VT+ Positive Threshold
Voltage
3.0
4.5
5.5
1.50
2.35
2.80
1.88
2.66
3.21
2.25
3.10
3.70
1.50
2.35
2.80
2.25
3.10
3.70
1.50
2.35
2.80
2.25
3.10
3.70
V
VT−Negative Threshold
Voltage
3.0
4.5
5.5
0.65
1.10
1.45
1.03
1.62
2.02
1.40
2.10
2.60
0.65
1.10
1.45
1.40
2.10
2.60
0.65
1.10
1.45
1.40
2.10
2.60
V
VHHysteresis Voltage 3.0
4.5
5.5
0.30
0.40
0.50
0.85
1.05
1.20
1.60
2.00
2.25
0.30
0.40
0.50
1.60
2.00
2.25
0.30
0.40
0.50
1.60
2.00
2.25
V
VOH Minimum High−Level
Output Voltage
IOH = −50mA
VIN = VCC or GND 2.0 1.9 2.0 1.9 1.9 V
VIN = VIH or VIL
IOH = −50 mA
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.5
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
VOL Maximum Low−Level
Output Voltage
VIN = VIH or VIL
IOL = 50 mA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN Maximum Input
Leakage Current
VIN = 5.5 V or GND 0 to
5.5
±0.1 ±1.0 ±1.0 mA
ICC Maximum Quiescent
Supply Current
VIN = VCC or GND 5.5 1.0 20 40 mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr/tf = 3.0 ns
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
TA = 25°C
ÎÎÎÎ
ÎÎÎÎ
TA ≤ 85°C
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
−55 ≤ TA ≤ 125°C
ÎÎ
ÎÎ
ÎÎ
Unit
ÎÎÎ
ÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Typ
ÎÎÎ
ÎÎÎ
Max
ÎÎ
ÎÎ
Min
ÎÎÎ
ÎÎÎ
Max
ÎÎÎ
ÎÎÎ
Min
ÎÎÎÎ
ÎÎÎÎ
Max
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLH,
tPHL
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Propagation
Delay, A or B to Y
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.6
6.1
ÎÎÎ
ÎÎÎ
ÎÎÎ
11.9
15.4
ÎÎ
ÎÎ
ÎÎ
1.0
1.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
14.0
17.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
16.1
19.6
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
3.6
4.3
ÎÎÎ
ÎÎÎ
ÎÎÎ
7.7
9.7
ÎÎ
ÎÎ
ÎÎ
1.0
1.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
9.0
11.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
1.0
1.0
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
10.3
12.3
ÎÎÎÎ
ÎÎÎÎ
CIN
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Maximum Input Capacit-
ance
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
5.5
ÎÎÎ
ÎÎÎ
10
ÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
10
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
10
ÎÎ
ÎÎ
pF
CPD Power Dissipation Capacitance (Note 6)
Typical @ 25°C, VCC = 5.0 V
pF
11
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
MC74VHC1G132
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4
VCC
GND
50%
50% VCC
A or B
Y
tPHL
tPLH
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4. Switching Waveforms
Figure 5. Test Circuit
ORDERING INFORMATION
Device Package Shipping†
M74VHC1G132DFT1G SC70−5/SC−88A/SOT−353
(Pb−Free)
3000 Units / Tape & Reel
M74VHC1G132DFT2G SC70−5/SC−88A/SOT−353
(Pb−Free)
M74VHC1G132DTT1G SOT23−5/TSOP−5SC59−5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MC74VHC1G132
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5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
MC74VHC1G132
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6
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
DIM MIN MAX
MILLIMETERS
A3.00 BSC
B1.50 BSC
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
L1.25 1.55
M0 10
S2.50 3.00
123
54 S
A
G
L
B
D
H
C
J
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
T
SEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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Phone: 81−3−5773−3850
MC74VHC1G132/D
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