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©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
Parameter Conditions Typical Units
Operation Frequency1 DC - 3000 MHz
Inser t io n Los s 1000 MH z
2000 MH z 0.50
0.65 dB
dB
Isolation (RFC - RF1/RF2) 1000 MH z
2000 MH z 34.5
25 dB
dB
Return Loss 1000 MH z
2000 MH z 18.5
14 dB
dB
‘ON’ Switching Time3 50% CTRL to 0.1 dB of final value, 1 GHz 0.725 µs
‘OFF’ Switching Time3 50% CTRL to 25 dB isolation, 1 GHz 0.625 µs
Video F eedthrough2,3 < 2 mVpp
Input 1 dB Co mpr ess io n3 1000 MHz 32 dBm
Input IP3 3 1000 MH z , 19 dB m inp ut power 53 dBm
Isolation (RF1 - RF2) 10 00 MHz
2000 MH z 40.5
28 dB
dB
Min
DC
32.5
23
38.5
26
30
Max
3000
0.60
0.75
1.5
1.3
RFC
RF1 RF2
CMOS
Control
Driver
V1 V2
The PE4273 RF Switch is designed for the TV tuner, PCTV, set
top box, DTV, DVR and general broadband applications. This
device offers industry leading broadband linearity, 1.5 kV ESD
tolerance and a simple CMOS interface. It offers a simple
alternative solution to pin diode and mechanical relay switches.
The PE4273 SPDT B roadband RF Switch is manufac tured on
Peregrine’s UltraCMOS™ process, a patented variation of
silicon -on-insulator (SOI ) technology on a sapphire sub s t rate,
off eri ng th e per formance of GaAs wit h th e eco no m y and
integration of conventional CMOS.
Pro duct Specificat ion
SPDT Broadband UltraCMOS™
DC – 3 GHz RF Switch
Product Description
Figure 1. Functional Diagram
PE4273
Features
Single-pin or complementary CMOS logic
control inputs
High ESD tolerance of 1.5 kV
Low insertion loss: 0.50 dB at 1000 MHz,
0.65 dB at 20 00 MH z
Iso l ation of 34.5 dB at 1000 MHz, 25 dB at
2000 MHz
Typical input 1 dB compression point of
+32 dBm
Ultra -s mall SC-70 package
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 75 )
Fig ur e 2. Pa ck ag e Typ e
6-lead SC- 70
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. Me as ur ed wit h a 1 ns ris et i m e, 0/3 V puls e and 50 0 MH z ban dw i dt h.
3. Measured in a 50 system.
Product Specification
PE4273
Page 2 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 UltraCMOS™ RFIC Solutions
Table 2 . Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When hand ling this UltraCMOS ™ devi ce, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latc h-Up Avoidance
Unlike conventional CMO S device s, UltraCMOS™
devices are immune to latch-up.
Table 4. DC Electrical Specifications Figure 3. Pin Configuration (Top View)
1
2
3 4
5
6V2
RFC
V1
RF1
GND
RF2
273
pin 1
Pin
No. Pin
Name Description
1 RF1
RF Port14
2 GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
3 RF2
RF Port24
4 V1 Sw itch control inpu t, CMOS lo gic leve l.
5 RFC
RF Common4
6 V2
This pin su pp or ts tw o int er f ac e op t i ons :
Single-pin control mode. A no mi na l 3-
volt supply connection is required.
Complementary-pin control mode. A
complementary CMOS control signal
to V1 is supplied to this pin.
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any input -0.3 VDD+
0.3 V
TST Storage temperature
range -65 150 °C
TOP Operating temperature
range -40 85 °C
PIN Input po wer (5 0) +34 dBm
VESD
ESD Voltage (HBM,
M L_STD 883 Method
3015.7) 1500 V
ESD Voltage (MM,
JEDEC, JESD22- A114-B) 100 V
Parameter Min Typ Max Units
VDD Power Supply
Voltage 2.7 3.0 3.3 V
IDD Powe r Supply Curre nt
(V1 = 3V, V2 = 3V) 8 50 µA
Control Voltage High 0.7x VDD V
Control Voltage Low 0.3x VDD V
Note: 4. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Absolute Ma ximum Ratings are those values
listed in the above table. Exceeding these values
may c aus e permanent dev i ce damag e.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposu re t o ab solut e maximu m rat i ngs for
exten de d perio ds may affect device reliability.
Figure 4. Maximum Operating Input Power5
Note: 5. Operating within DC limits (Table 4).
Product Specification
PE4273
Page 3 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
Control Voltages Signal Path
Pin 6 (V2) = VDD
Pin 4 (V1) = High RFC to RF1
Pin 6 (V2) = VDD
Pin 4 (V1) = Low RFC to RF2
Table 5. Single-pin Control Logic Truth Table
Table 6. Complementary-pin Control Logic
Truth Table
Control Voltages Signal Path
Pin 6 (V2) = Low
Pin 4 (V1) = High RFC to RF1
Pin 6 (V2) = High
Pin 4 (V1) = Low RFC to RF2
Control Logic Input
The PE4273 is a versatile RF CMOS switch that
supports two operating control modes; single-pin
control mode and complementary-pin control
mode.
Single-pi n control m od e enables the swit ch to
operate with a single control pin (pin 4) supporting
a +3 -volt CMOS logic input, and requires a
dedicated +3-volt powe r supply connection (pin 6).
Thi s mo de of op er ation red uc e s the number of
control lines required and simp lifies the switch
control interface typically derived from a CMOS
µProcessor I/O port.
Complementary-pin control mode allows the
switch to operate using complementary control
pins V1 and V2 ( pi ns 4 & 6), that c a n be di r ectl y
driven by +3-volt CMOS logic or a suitable
µProcessor I/O port. This enables the PE4273 to
operate in positive control voltage mode within the
PE4273 oper ating li m i ts.
Product Specification
PE4273
Page 4 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 UltraCMOS™ RFIC Solutions
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4273 SPDT switch. The RF common port is
connected through a 75 transmission line to the
bottom F connector, J2. Port 1 and Port 2 are
connected through 75 transmission lines to two F
connectors on either side of the board, J3 and J1. A
through transmission line connects F connectors J4
and J5. This transmission line can be used to
estimate the loss of the PCB over the environmental
conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model using
a trace width of 0.021”, trace gaps of 0.030”,
dielectric thickness of 0.028”, copper thickness of
0.0021” and r of 4.3.
J6 and J7 provide a means for controlling the DC
inputs to the device. The lower left header (J6) is
connected to the device V1 input. The lower right
header (J7) is connected to the device V2 input.
Series resistors (R1 and R2) are provided to reduce
the package resonance between RF and DC lines.
Footprints for decoupling capacitors (100 pF) are
provided on both V1 and V2 traces. It is the
responsibility of the customer to determine proper
supply decoupling for their design application.
Removing these components from the evaluation
board has not been shown to degrade RF
performance.
Figure 5. Evaluation Board Layouts
Figure 6. Evaluation Board Sche mati c
Peregr ine S pec ificat ion 102/0311
Peregr ine S pec ificat ion 101/0245
Product Specification
PE4273
Page 5 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
Typical Performance Data
Figure 8. Isolation: RF1 - RF2 @ 3.0 V
Figure 10. Isolation: RFC - RF1/RF2 @ 3.0 V
Figure 7. Isolation: RF1 - RF2 @ 25 °C
Figure 9. Isolation: RFC - RF1/RF2 @ 25 °C
Product Specification
PE4273
Page 6 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 UltraCMOS™ RFIC Solutions
Typical Performance Data
Figure 11. Insertion Loss @ 25 °C Figure 12. Insertion Loss @ 3. 0 V
Figure 13. Return Loss: RF1/RF2 @ 25 °C Figure 14. Return Loss: RF1/RF2 @ 3.0 V
Product Specification
PE4273
Page 7 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
Figure 16. Return Loss: RFC/RF1 @ 3.0 V
Typical Performance Data
Figure 18. Return Loss: RFC/RF2 @ 3.0 V
Figure 15. Return Loss: RFC/RF1 @ 25 °C
Figure 17. Return Loss: RFC/RF2 @ 25 °C
Product Specification
PE4273
Page 8 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 UltraCMOS™ RFIC Solutions
Figure 19. Input 1 dB Compression and IIP3
Typical Performance Data
Product Specification
PE4273
Page 9 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
Figure 20. Package Drawing
6-lead SC-70
1.80
2.20
0.65
BSC
1.80
2.40
1.15
1.35
0.15
0.30
0.80
1.10
0.80
1.00
0.10
0.30
0.10
0.40 0.10
0.18
0.00
0.10
Product Specification
PE4273
Page 10 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 UltraCMOS™ RFIC Solutions
Table 7. Ordering Information
Or der Code Part Marking Description Package Shipping Method
4273-01 273 PE4273-06SC70-7680A 6-lead SC-70 7680 units / Canister
4273-02 273 PE4273-06SC70-3000C 6-lead SC-70 3000 units / T&R
4273-00 PE4273-EK PE4273-06SC70-EK Evaluation Kit 1 / Box
4273-51 273 PE4273G-06SC70-7680A Green 6-lead SC-70 7680 units / Canister
4273-52 273 PE4273G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R
Figure 21. Tape and Reel Specification s
Pin 1
Tape Feed Dire c t ion
Product Specification
PE4273
Page 11 of 11
©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0174-04 www. pse mi.com
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For a lis t of r epresentatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design st age. The data
sheet cont ains design target specifications for product
development. Spec ifications and feat ures may change in
any manner without notice.
Preliminary Specification
The data sheet cont ains preliminary data. Additional data
may be added at a later date. Peregr ine reserves the right
to change specifications at any tim e without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data . In the event Peregrine
dec ide s to cha nge the spe c ific a tions, Pereg rine will not ify
cust omers of the intended changes by issu ing a DCN
(Document Change Notice).
The inform ation in this dat a sheet is believed to be reliable.
Howeve r, Peregrine assum es no liability f or th e use of this
information. Use shall be entirely at the user’s own r isk.
No pat ent rights or licenses t o any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregr ine product could
create a situat ion in which personal injury or deat h might occur.
Peregr ine assum es no liability for damages, including
consequential or incidental damages, arising out of the use of
its product s in such applications.
The Per egrine name, logo, and UTSi are registered t r ademarks
and UltraCMOS and HaRP ar e trademarks of Peregrine
Semiconduct or Corp.
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Peregrine Semiconductor, China
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
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