TLE42994GMV33 - Infineon Technologies

Type Ordering Code Package

TLE 4299 G Q67006-A9417 P-DSO-8-3

TLE 4299 GM Q67006-A9441 P-DSO-14-8

5-V Low Drop Fixed Voltage Regulator

TLE 4299

P-DSO-8-3, -6, -7, -8, -9

P-DSO-14-3, -8, -9, -11, 14

Data Sheet 1 Rev. 1.1, 2004-01-01

Features

• Output voltage 5 V ± 2%

• 150 mA Output current

• Extreme low current consumption typical 65 µA

in ON state

• Inhibit function: Below 1 µA current consumption

in off mode

• Early warning

• Reset output low down to VQ = 1 V

• Adjustable reset threshold

• Overtemperature protection

• Reverse polarity proof

• Wide temperature range

Functional Description

The TLE 4299 is a monolithic voltage regulator with fixed

5-V output, supplying loads up to 150 mA. It is especially

designed for applications that may not be powered down

while the motor is off. It only needs a quiescent current of

typical 65 µA. In addition the TLE 4299 GM includes an inhibit function. When the inhibit

signal is removed, the device is switched off and the quiescent current is less than 1 µA.

To achieve proper operation of the µ-controller, the device supplies a reset signal. The

reset delay time is selected application-specific by an external delay capacitor. The reset

threshold is adjustable. An early warning signal supervises the voltage at pin SI. The

TLE 4299 is pin-compatible to the TLE 4269 and functional similar with the additional

inhibit function. The TLE 4299 is designed to supply microcontroller systems even under

automotive environment conditions. Therefore it is protected against overload, short

circuit and overtemperature.

Data Sheet 2 Rev. 1.1, 2004-01-01

TLE 4299

Circuit Description

The TLE 4299 is a PNP based very low drop linear voltage regular. It regulates the

output voltage to VQ = 5 V for an input voltage range of 5.5 V ≤ VI ≤ 45 V. The control

circuit protects the device against potential caused by damages overcurrent and

overtemperature.

The internal control circuit achieves a 5 V output voltage with a tolerance of ±2%.

The device includes a power on reset and an under voltage reset function with adjustable

reset delay time and adjustable reset switching threshold as well as a sense control/early

warning function. The device includes an inhibit function to disable it when the ECU is

not used for example while the motor is off.

The reset logic compares the output voltage VQ to an internal threshold. If the output

voltage drops below this level, the external reset delay capacitor CD is discharged. When

VD is lower than VLD, the reset output RO is switched Low. If the output voltage drop is

very short, the VLD level is not reached and no reset-signal is asserted. This feature

avoids resets at short negative spikes at the output voltage e.g. caused by load changes.

As soon as the output voltage is more positive than the reset threshold, the delay

capacitor is charged with constant current. When the voltage reaches VUD the reset

output RO is set High again.

The reset threshold is either the internal defined VRT voltage (typical 4.6 V) or can be

lowered by a voltage level at the RADJ input down to 3.5 V. The reset delay time and the

reset reaction time are defined by the external capacitor CD. The reset function is active

down to VI = 1 V.

In addition to the normal reset function, the device gives an early warning. When the SI

voltage drops below VSI,low, the devices asserts the SI output Low to indicate the logic

and the µ-processor that this voltage has dropped. The sense function uses a hysteresis:

When the SI-voltage reaches the VSI,high level, SO is set high again. This feature can be

used as early warning function to notice the µ-controller about a battery voltage drop and

a possible reset in a short time. Of cause also any other voltage can be observed by this

feature.

The user defines the threshold by the resistor-values RSI1 and RSI2.

For the exact timing and calculation of the reset and sense timing and thresholds, please

refer to the application section.

TLE 4299

Data Sheet 3 Rev. 1.1, 2004-01-01

Figure 1 Block Diagram TLE 4299 G

AEB03103

Current

and

Saturation

Control

Band-

Gap-

Reference

Reset

Control

Reference

GND

RADJ

Data Sheet 4 Rev. 1.1, 2004-01-01

TLE 4299

Figure 2 Block Diagram TLE 4299 GM

AEB03104

Current

and

Saturation

Control

Band-

Gap-

Reference

TLE 4299

Reset

Control

Reference

Inhibit

Control R

GND

RADJ

INH

TLE 4299

Data Sheet 5 Rev. 1.1, 2004-01-01

Figure 3 Pin Configuration (top view)

Table 1 Pin Definitions and Functions (TLE 4299 G)

Pin No. Symbol Function

1I Input; block directly to GND on the IC with a ceramic capacitor.

2SISense Input; if not needed connect to Q.

3RADJReset Threshold; if not needed connect to GND.

4DReset Delay; to select delay time, connect to GND via external

capacitor.

5GNDGround

6ROReset Output; the open-collector output is internally linked to Q

via a 20 kΩ pull-up resistor. Keep open, if the pin is not needed.

7SOSense Output; the open-collector output is internally linked to

the output via a 20 kΩ pull-up resistor. Keep open, if the pin is not

needed.

8Q5-V Output; connect to GND with a 22 µF capacitor, ESR < 5 Ω.

AEP02832

SI 2 7

RADJ 3 6

D4 5

GND

P-DSO-8-3

Data Sheet 6 Rev. 1.1, 2004-01-01

TLE 4299

Figure 4 Pin Configuration (top view)

Table 2 Pin Definitions and Functions (TLE 4299 GM)

Pin No. Symbol Function

1RADJReset Threshold; if not needed connect to GND.

2DReset Delay; connect to GND via external delay capacitor for

setting delay time.

3, 4, 5 GND Ground

6INH

Inhibit; If not needed connect to input pin I; a high signal switches

the regulator ON.

7ROReset Output; open-collector output, internally connected to Q

via a pull-up resistor of 20 kΩ. Keep open, if the pin is not needed.

8SOSense Output; open-collector output, internally connected to Q

via a 20 kΩ pull-up resistor. Keep open, if the pin is not needed.

9Q5-V Output; connect to GND with a 22 µF capacitor, ESR < 5 Ω.

10, 11, 12 GND Ground

13 I Input; block to GND directly at the IC by a ceramic capacitor.

14 SI Sense Input; if not needed connect to Q.

AEP02831

141RADJ SI

D2 13

GND 3 12

GND 4 11

GND 5

INH

RO 7 8

GND

P-DSO-14-8

TLE 4299

Data Sheet 7 Rev. 1.1, 2004-01-01

Table 3 Absolute Maximum Ratings

Tj = -40 to 150 °C

Parameter Symbol Limit Values Unit Notes

Min. Max.

Input I

Input voltage VI-40 45 V –

Inhibit Input INH

Input voltage VINH -40 45 V –

Sense Input SI

Input voltage VSI -0.3 45 V –

Input current ISI 11mA–

Reset Threshold RADJ

Voltage VRE -0.3 7 V –

Current IRE -10 10 mA –

Reset Delay D

Voltage VD-0.3 7 V –

Reset Output RO

Voltage VR-0.3 7 V –

Sense Output SO

Voltage VSO -0.3 7 V –

5-V Output Q

Output voltage VQ-0.3 7 V –

Output current IQ-5 –mA –

Temperature

Junction temperature Tj–150 °C–

Storage temperature TStg -50 150 °C–

Operating Range

Input voltage VI4.5 45 V –

Junction temperature Tj-40 150 °C–

Data Sheet 8 Rev. 1.1, 2004-01-01

TLE 4299

Note: Stresses above those listed here may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

In the operating range, the functions given in the circuit description are fulfilled.

Thermal Data

Junction-ambient Rthja –

–

200

K/W

P-DSO-8-3

P-DSO-14-8

Junction-pin Rthjp –

–

K/W

P-DSO-8-3

P-DSO-14-81)

1) Measured to pin 4.

Table 3 Absolute Maximum Ratings (cont’d)

Tj = -40 to 150 °C

Parameter Symbol Limit Values Unit Notes

Min. Max.

TLE 4299

Data Sheet 9 Rev. 1.1, 2004-01-01

Table 4 Characteristics

VI = 13.5 V; Tj = -40 °C < Tj < 150 °C

Parameter Symbol Limit Values Unit Measuring Condition

Min. Typ. Max.

Output voltage VQ4.90 5.00 5.10 V 1 mA ≤ IQ ≤ 100 mA;

6 V ≤ VI ≤ 16 V

Output voltage VQ4.85 5.00 5.15 V IQ ≤ 150 mA;

6 V ≤ VI ≤ 16 V

Current limit IQ250 400 500 mA –

Current consumption;

Iq = II - IQ

Iq–65 105 µA Inhibit ON;

IQ ≤ 1 mA, Tj < 85 °C

Current consumption;

Iq = II - IQ

Iq–65 100 µA Inhibit ON;

IQ ≤ 1 mA, Tj = 25 °C

Current consumption;

Iq = II - IQ

Iq–170 500 µA Inhibit ON;

IQ = 10 mA

Current consumption;

Iq = II - IQ

Iq–0.7 2 mA Inhibit ON;

IQ = 50 mA

Current consumption;

Iq = II - IQ

Iq––1µAVINH = 0 V;

Tj = 25 °C

Drop voltage Vdr –0.22 0.5 V IQ = 100 mA1)

Load regulation ∆VQ–530mVIQ = 1 mA to 100 mA

Line regulation ∆VQ–10 25 mV VI = 6 V to 28 V;

IQ = 1 mA

Power Supply Ripple

Rejection

PSRR –66 –dB fr = 100 Hz; Vr = 1 Vpp;

IQ = 100 mA

Inhibit (TLE 4299 GM only)

Inhibit OFF voltage range VINH OFF ––0.8 V TLE 4299 GM; VQ off

Inhibit ON voltage range VINH ON 3.5 –– V TLE 4299 GM; VQ on

High input current IINH ON –35 µA TLE 4299 GM;

VINH = 5 V

Low input current IINH OFF –0.5 2 µA TLE 4299 GM;

VINH = 0 V

Data Sheet 10 Rev. 1.1, 2004-01-01

TLE 4299

Reset Generator

Switching threshold Vrt 4.50 4.60 4.80 V –

Reset pull-up RRO 10 20 40 kΩ–

Reset low voltage VR–0.17 0.40 V VQ < 4.5 V;

internal RRO; IR = 1 mA

External reset pull-up VR ext 5.6 –– kΩPull-up resistor to Q

Delay switching threshold VDT 1.5 1.85 2.2 V –

Switching threshold VST 0.35 0.50 0.60 V –

Reset delay low voltage VD––0.1 V VQ < VRT

Charge current Ich 4.0 8.0 12.0 µAVD = 1 V

Reset delay time td17 28 35 ms CD = 100 nF

Reset reaction time trr 0.5 1.2 3.0 µsCD = 100 nF

Reset adjust switching

threshold

VRADJ TH 1.26 1.36 1.44 V VQ > 3.5 V

Input Voltage Sense

Sense threshold high VSI high 1.34 1.45 1.54 V –

Sense threshold low VSI low 1.26 1.36 1.44 V –

Sense input switching

hysteresis

VSI HYST 50 90 130 mV VSI HYST = VSI high - VSI low

Sense output low voltage VSO low –0.1 0.4 V VSI < 1.20 V; Vi > 4.2 V;

ISO = 0

External SO pull-up

resistor

RSO ext 5.6 –– kΩ–

Sense pull-up RSO 10 20 40 kΩ–

Sense input current ISI -10.11 µA–

Sense high reaction time tpd SO LH –2.4 2.9 µs–

Sense low reaction time tpd SO HL –1.7 2.1 µs–

1) Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value

obtained at 13.5 V input.)

Table 4 Characteristics (cont’d)

VI = 13.5 V; Tj = -40 °C < Tj < 150 °C

Parameter Symbol Limit Values Unit Measuring Condition

Min. Typ. Max.

TLE 4299

Data Sheet 11 Rev. 1.1, 2004-01-01

Note: The listed characteristics are ensured over the operating range of the integrated

circuit. Typical characteristics specify mean values expected over the production

spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and

the given supply voltage.

Figure 5 Measurement Circuit

AES02835

TLE 4299

GND

100 nF

GND

INH

RADJ

SI SO

(TLE 4299 GM only)

Data Sheet 12 Rev. 1.1, 2004-01-01

TLE 4299

Application Information

Figure 6 Application Diagram TLE 4299 G

AES03105

Current

and

Saturation

Control

Band-

Gap-

Reference

TLE 4299

Reset

Control

CI1

VBAT

GND

RADJ1

RSI1

RSI2 Reference

RSO

RRO

RADJ2

RADJ

CI2

CQ1

22 FCQ2

TLE 4299

Data Sheet 13 Rev. 1.1, 2004-01-01

Figure 7 Application Diagram with Inhibit Function

The TLE 4299 supplies a regulated 5 V output voltage with an accuracy of 2% from an

input voltage between 5.5 V and 45 V in the temperature range of Tj = -40 to 150 °C.

The device is capable to supply 150 mA. For protection at high input voltage above 25 V,

the output current is reduced (SOA protection).

An input capacitor is necessary for compensating line influences and to limit steep input

edges. A resistor of approx. 1 Ω in series with CI, can damp the LC of the input inductivity

and the input capacitor.

The voltage regulator requires for stability an output capacitor CQ of at least 22 µF with

an ESR below 5 Ω.

AES03106

Current

and

Saturation

Control

Band-

Gap-

Reference

TLE 4299

Reset

Control

CI1

VBAT

GND

RADJ1

RSI1

RSI2 Reference

RSO

RRO

RADJ2

RADJ

CI2

Inhibit

Logic

INH

From

KI. 15

CQ1

22 FCQ2

Data Sheet 14 Rev. 1.1, 2004-01-01

TLE 4299

Reset

The power on reset feature is necessary for a defined start of the microprocessor when

switching on the application. For the reset delay time after the output voltage of the

regulator is above the reset threshold, the reset signal is set High again. The reset delay

time is defined by the reset delay capacitor CD at pin D.

The under-voltage reset circuitry supervises the output voltage. In case VQ decreases

below the reset threshold the reset output is set LOW after the reset reaction time. The

reset LOW signal is generated down to an output voltage VQ to 1 V. Both the reset

reaction time and the reset delay time is defined by the capacitor value.

The power on reset delay time is defined by the charging time of an external delay

capacitor CD.

CD = (td × ID) / ∆V(1)

Definitions:

•CD = reset delay capacitor

•td = reset delay time

•∆V = VUD, typical 1.8 V for power up reset

•∆V = VUD - VLD, typical 1.35 V for undervoltage reset

•ID = charge current, typical 6.5 µA

For a delay capacitor CD = 100 nF the typical power on reset delay time is 28 ms.

The reset reaction time tRR is the time it takes the voltage regulator to set reset output

LOW after the output voltage has dropped below the reset threshold. It is typically 1 µs

for delay capacitor of 100 nF. For other values for CD the reaction time can be estimated

using the following equation:

tRR = 10 ns / nF × CD(2)

TLE 4299

Data Sheet 15 Rev. 1.1, 2004-01-01

Figure 8 Reset Timing Diagram

The reset output is an open collector output with a pull-up resistor of typical 20 kΩ to Q.

An external pull-up can be added with a resistor value of at least 5.6 kΩ.

In addition the reset switching threshold can be adjusted by an external voltage divider.

The feature is useful for microprocessors which guarantee safe operation down to

voltages below the internally set reset threshold of 4.65 V typical.

If the internal used reset threshold of typical 4.65 V is used, the pin RADJ has to be

connected to GND.

If a lower reset threshold is required by the system, a voltage divider defines the reset

threshold VRth between 3.5 V and 4.60 V:

VRth = VRADJ TH × (RADJ1 + RADJ2) / RADJ2 (3)

VRADJ TH is typical 1.36 V.

Early Warning

The early warning function compares a voltage defined by the user to an internal

reference voltage. Therefore the supervised voltage has to be scaled down by an

AED03107

Thermal

Power-on-Reset Voltage Dip Secondary Overload

at OutputSpike

RO, SAT

at Input Undervoltage

Shutdown

Data Sheet 16 Rev. 1.1, 2004-01-01

TLE 4299

external voltage divider in order to compare it to the internal sense threshold of typical

1.35 V. The sense output pin is set low, when the voltage at SI falls below this threshold.

A typical example where the circuit can be used is to supervise the input voltage VI to

give the microcontroller a prewarning of low battery condition.

Calculation to the voltage divider can be easily done since the sense input current can

be neglected.

Figure 9 Sense Timing Diagram

VthHL = (RSI1 + RSI2)/RSI2 × VSI low (4)

VthLH = (RSI1 + RSI2)/RSI2 × VSI high (5)

The sense in comparator uses a hysteresis of typical 100 mV. This hysteresis of the

supervised threshold is multiplied by the resistor dividers amplification (RSI1 + RSI2)/RSI1.

The sense in comparator can also be used for receiving data with a threshold of typical

1.35 V and a hysteresis of 100 mV. Of course also the data signal can be scaled down

with a resistive divider as shown above. With a typical delay time of 2.4 µs for positive

transitions and 1.7 µs for negative transitions receiving data of up to 100 kBaud are

possible.

AED02559

Sense

SI, High

SI, Low

Input

Voltage

High

Low

Output

Sense t

PD SO LH PD SO HL

Data Sheet 17 Rev. 1.1, 2004-01-01

TLE 4299

The sense output is an open collector output with a pull-up resistor of typical 20 kΩ to Q.

An external pull-up can be added with a resistor value of at least 5.6 kΩ.

Typical Performance Characteristics

Output Voltage VQ versus

Temperature Tj

Output Voltage VQ versus

Input Voltage VI

AED01671

-40

04080

120 C 160

4.6

4.7

4.8

4.9

5.0

5.1

V= 13.5 V

5.2

AED01808

2468V10

=50

Ω

Data Sheet 18 Rev. 1.1, 2004-01-01

TLE 4299

Charge Current Ich versus

Temperature Tj

Switching Voltage Vdt and Vst versus

Temperature Tj

Drop Voltage Vdr versus

Output Current IQ

Reset Adjust Switching Threshold

VRADJTH versus Temperature Tj

-40

µA

AED03108

0 40 80 120 160

˚C

= 13.5 V

= 1 V

AED01804

-40

04080120 C160

V= 13.5 V

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

VLD

AED02929

50 100 150 200

100

150

200

250

300

400

25 ˚C

125 ˚C

0.9

-40

AED03109

1.0

1.1

1.2

1.3

1.4

1.5

400 80 160120 ˚C

RADJTH

Data Sheet 19 Rev. 1.1, 2004-01-01

TLE 4299

Sense Threshold Vsi versus

Temperature Tj

Current Consumption Iq versus

Output Current IQ

Output Current Limit IQ versus

Input Voltage VI

Current Consumption Iq versus

Output Current IQ

1.0-40

AED02933

1.1

1.2

1.3

1.4

1.5

1.6

400 80 160120 ˚C

Sense Output High

Sense Output Low

AED02931

0.2

0.4

0.6

0.8

1.0

10 20 30 40 60mA

AED03110

10 20 30 40 V50

=25C

100

150

200

250

300

350

C125=

AED02932

50 100 150 200

Data Sheet 20 Rev. 1.1, 2004-01-01

TLE 4299

Package Outlines

Figure 10 P-DSO-8-3 (Plastic Dual Small Outline)

Does not include plastic or metal protrusion of 0.15 max. per side

-0.05

-0.2

+0.1

0.41

Index Marking (Chamfer)

1.27

0.1

0.2

(1.5)

0.1 MIN.

1.75 MAX.

±0.2

0.64

0.33

-0.2

-0.01

0.2

+0.05

x 45˚

±0.08

±0.25

MAX.8˚

Index

Marking

GPS09032

You can find all of our packages, sorts of packing and others in our

Infineon Internet Page “Products”: http://www.infineon.com/products.

Dimensions in mm

SMD = Surface Mounted Device

TLE 4299

Data Sheet 21 Rev. 1.1, 2004-01-01

Figure 11 P-DSO-14-8 (Plastic Dual Small Outline)

±0.08

±0.2

Does not include plastic or metal protrusion of 0.15 max. per side

Index Marking

-0.06

1.27

+0.1

0.41 C

0.1

-0.2

8.75

0.2

0.1 MIN.

(1.5)

14x 6

1.75 MAX.

-0.2

0.33

±0.25

0.64

0.2

+0.05

-0.01

x 45˚

MAX.8˚

GPS09033

You can find all of our packages, sorts of packing and others in our

Infineon Internet Page “Products”: http://www.infineon.com/products.

Dimensions in mm

SMD = Surface Mounted Device

Edition 2004-01-01

Published by Infineon Technologies AG,

St.-Martin-Strasse 53,

81669 München, Germany

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of

characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding

circuits, descriptions and charts stated herein.

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For further information on technology, delivery terms and conditions and prices please contact your nearest

Infineon Technologies Office (www.infineon.com).

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