2N5564/5565/5566
Siliconix
P-37406—Rev. C, 25-Jul-94 1
Matched N-Channel JFET Pairs
Product Summary
Part Number VGS(off) (V) V(BR)GSS Min (V) gfs Min (mS) IG Typ (pA) VGS1 – VGS2Max (mV)
2N5564 –0.5 to –3 –40 7.5 –3 5
2N5565 –0.5 to –3 –40 7.5 –3 10
2N5566 –0.5 to –3 –40 7.5 –3 20
Features Benefits Applications
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 3 pA
Low Noise: 12 nV⁄√Hz @ 10 Hz
Good CMRR: 76 dB
Minimum Parasitics
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
Maximum High Frequency Performance
Wideband Differential Amps
High-Speed, Temp-Compensated,
Single-Ended Input Amps
High-Speed Comparators
Impedance Converters
Matched Switches
Description
The 2N5564/5565/5566 are matched pairs of JFETs
mounted in a TO-71 package. This two-chip design reduces
parasitics for good performance at high frequency while
ensuring extremely tight matching. This series features high
breakdown voltage (V(BR)DSS typically > 55 V), high gain
(typically > 9 mS), and <5-mV offset between the two die.
The hermetically-sealed TO-71 package is available with
full military processing (see Military Information).
For similar products see the low-noise U/SST401 series,
and the low-leakage 2N5196/5197/5198/5199 data sheets.
TO-71
Top View
G1
S1
D1
G2
D2
S2
1
2
3
6
5
4
Absolute Maximum Ratings
Gate-Drain, Gate-Source Voltage –40 V. . . . . . . . . . . . . . . . . . . . . . . .
Gate-Gate Voltage 80 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (1/16” from case for 10 sec.) 300 C. . . . . . . . . . . .
Storage Temperature –65 to 200C. . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature –55 to 150C. . . . . . . . . . . . . . . . . .
Power Dissipation : Per Sidea325 mW. . . . . . . . . . . . . . . . .
Totalb650 mW. . . . . . . . . . . . . . . . . . . .
Notes
a. Derate 2.6 mW/C above 25C
b. Derate 5.2 mW/C above 25C
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70254.
2N5564/5565/5566
2 Siliconix
P-37406—Rev. C, 25-Jul-94
Specificationsa
Limits
2N5564 2N5565 2N5566
Parameter Symbol Test Conditions TypbMin Max Min Max Min Max Unit
Static
Gate-Source
Breakdown Voltage V(BR)GSS IG = –1 A, VDS = 0 V –55 –40 –40 –40
V
Gate-Source
Cutoff Voltage VGS(off) VDS = 15 V, ID = 1 nA –2 –0.5 –3 –0.5 –3 –0.5 –3
V
Saturation Drain
CurrentcIDSS VDS = 15 V, VGS = 0 V 20 5 30 5 30 5 30 mA
Gate Reverse Current
IGSS
VGS = –20 V, VDS = 0 V –5 –100 –100 –100 pA
Gate
Reverse
Current
I
GSS TA = 150C –10 –200 –200 –200 nA
Gate Operating Currentd
IG
VDG = 15 V, ID = 2 mA –3 pA
Gate
Operating
Currentd
I
GTA = 125C –1 nA
Drain-Source
On-Resistance rDS(on) VGS = 0 V, ID = 1 mA 50 100 100 100
Gate-Source VoltagedVGS VDG = 15 V, ID = 2 mA –1.2
Gate-Source
Forward Voltage VGS(F) IG = 2 mA , VDS = 0 V 0.7 1 1 1 V
Dynamic
Common-Source
Forward Transconductance gfs VDS = 15 V, ID = 2 mA 97.5 12.5 7.5 12.5 7.5 12.5 mS
Common-Source
Output Conductance gos
S
f = 1 kHz 35 45 45 45 S
Common-Source
Forward Transconductance gfs VDS = 15 V, ID = 2 mA
f = 100 MHz 8.5 7 7 7 mS
Common-Source
Input Capacitance Ciss
VDS =15VI
D=2mA
10 12 12 12
Common-Source
Reverse Transfer
Capacitance Crss
VDS
=
15
V
,
ID
=
2
mA
f = 1 MHz 2.5 3 3 3 pF
Equivalent Input
Noise Voltage enVDS = 15 V, ID = 2 mA
f = 10 Hz 12 50 50 50 nV⁄
√Hz
Noise Figure NF RG = 10 M1 1 1 dB
Matching
Differential
Gate-Source Voltage |VGS1–VGS2|VDG = 15 V, ID = 2 mA 5 10 20 mV
Gate-Source Voltage
Differential Change
with Temperature
|VGS1–VGS2|
T
VDG = 15 V, ID = 2 mA
TA = –55 to 125C10 25 50 V/
C
Saturation Drain
Current RatiodIDSS1
IDSS2 VDS = 15 V, VGS = 0 V 0.98 0.95 1 0.95 1 0.95 1
Transconductance Ratio 

VDS = 15 V, ID = 2 mA
f = 1 kHz 0.98 0.95 1 1 1
Common Mode
Rejection RatiodCMRR VDG = 10 to 20 V
ID = 2 mA 76 dB
Notes
a. TA = 25C unless otherwise noted. NCBD
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. Pulse test: PW v300 s duty cycle v3%.
d. This parameter not registered with JEDEC.
2N5564/5565/5566
Siliconix
P-37406—Rev. C, 25-Jul-94 3
Typical Characteristics
On-Resistance and Drain Current
vs. Gate-Source Cutoff Voltage On-Resistance vs. Drain Current
100
0 –10
0
200
160
0
– Saturation Drain Current (mA)
IDSS
rDS IDSS
rDS @ ID = 1 mA, VGS = 0
IDSS @ VDS = 15 V, VGS = 0
100
0
1 10 100
VGS(off) = –2 V
TA = 25C
VGS(off) – Gate-Source Cutoff Voltage (V) ID – Drain Current (mA)
80
60
40
20
80
60
40
20
–2 –4 –6 –8
120
80
40
Turn-On Switching
5
0 –10
4
3
2
1
0
tr
Switching T ime (ns)
td(on) @
ID = 3 mA
td(on) @
ID = 12 mA
tr approximately independent of ID
VDG = 5 V, RG = 50
VGSL = –10 V
VGS(off) – Gate-Source Cutoff Voltage (V)
–2 –4 –6 –8
Turn-Off Switching
30
010
24
18
12
6
0
VGS(off) = –2 V
td(off)
td(off) independent of device VGS(off)
VDG = 5 V, VGSL = –10 V
ID – Drain Current (mA)
2468
Switching T ime (ns)
Forward Transconductance and Output Conductance
vs. Gate-Source Cutoff Voltage
50
0
0–2 –10
500
200
0
gfs – Forward Transconductance (mS)
gfs gos
gfs and gos @ VDS = 15 V
VGS = 0 V, f = 1 kHz
VGS(off) – Gate-Source Cutoff Voltage (V)
40
30
20
10
–4 –6 –8
400
200
100
160
120
On-Resistance vs. Temperature
200
–55 25 125
0–15 85
ID = 1 mA
rDS changes Y 0.7%/C
VGS(off) = –2 V
TA – Temperature (C)
80
40
–35 5 45 65 105
tf
rDS(on) – Drain-Source On-Resistance ( )rDS(on) – Drain-Source On-Resistance ( )
rDS(on) – Drain-Source On-Resistance ( )
S)g – Output Conductance (
2N5564/5565/5566
4 Siliconix
P-37406—Rev. C, 25-Jul-94
Typical Characteristics (Cont’d)
40
32
24
16
8
0
0 –0.4 –0.8 –1.2 –1.6 –2
VDS = 15 V
– Drain Current (mA)
ID
VGS – Gate-Source Voltage (V)
TA = –55C
25C
125C
Transfer Characteristics
14
12
10
8
6
4
2
00 4 8 12 16 20
Output Characteristics
VDS – Drain-Source Voltage (V)
– Drain Current (mA)
ID
VGS(off) = –1.5 V VGS = 0 V
–0.1 V
–0.2 V
–0.3 V
–0.4 V
–0.5 V
–0.6 V
–0.7 V
Output Characteristics
VDS – Drain-Source Voltage (V)
– Drain Current (mA)
ID
5
010.80.60.40.2
4
3
2
0
1
VGS(off) = –1.5 V
–0.2 V
–0.3 V
–0.4 V
–0.5 V
–0.6 V
–0.7 V
–0.8 V
–0.9 V
Capacitance vs. Gate-Source Voltage
30
–20
24
18
12
6
0
Capacitance (pF)
f = 1 MHz
VDS = 0 V
Ciss
Crss
0
VGS – Gate-Source Voltage (V)
–4 –8 –12 –16
Gate Leakage Current
030
– Gate Leakage
IG
TA = 125C
TA = 25C
1 mA
IGSS @ 25C
ID = 10 mA
Common-Gate Input Admittance
100
10
1
0.1100 1000200 500
(mS)
gig
big
VDG = 15 V
ID = 10 mA
TA = 25C
VDG – Drain-Gate Voltage (V) f – Frequency (MHz)
IGSS @ 25C
10 mA
1 mA
6121824
IG(on) @ ID
0.1 pA
1 pA
10 pA
100 pA
1 nA
10 nA
–0.1 V
VGS(off) = –2 V
VGS = 0 V
2N5564/5565/5566
Siliconix
P-37406—Rev. C, 25-Jul-94 5
Typical Characteristics (Cont’d)
Common-Gate Forward Admittance Common-Gate Reverse Admittance
100
10
1
0.1100 1000200 500
(mS)
–gfg bfg
gfg
VDG = 15 V
ID = 10 mA
TA = 25C
10
1
0.1
0.01100 1000200 500
VDG = 15 V
ID = 10 mA
TA = 25C
–grg
–brg
+grg
(mS)
f – Frequency (MHz) f – Frequency (MHz)
Common-Gate Output Admittance
100
10
1
0.1100 1000200 500
(mS)
VDG = 15 V
ID = 10 mA
TA = 25C
gog
bog
f – Frequency (MHz)
Noise Voltage vs. Frequency
100
10
110 100 1 k 100 k10 k
ID = 1 mA
ID = 10 mA
VDS = 15 V
f – Frequency (Hz)
Transconductance vs. Drain Current
100
10
10.1 1.0 10
ID – Drain Current (mA)
gfs – Forward Transconductance (mS)
TA = –55C
25C
125C
Output Conductance vs. Drain Current
1000
100
100.1 1.0 10
ID – Drain Current (mA)
TA = –55C
25C
125C
VDS = 15 V
f = 1 kHz
VGS(off) = –2 V VDS = 15 V
f = 1 kHz
VGS(off) = –2 V
S)g – Output Conductance (
nVen/Hz
√)(– Noise Voltage