This is information on a product still in production but not recommended for new designs. For further information contact
your local STMicroelectronics sales office.
November 2016 DocID030079 Rev 1 1/4
ST25RU3992
UHF RFID Single Chip Reader EPC Class1 Gen2 Compatible
Data brief - not recommended for new design
Features
•Supply voltage: 4.1 V to 5.5 V
•Filters dedicated to 250 kHz and 320 kHz M4
and M8 DRM operation.
•Available RX modes:
– BLF = 40 kHz or 160 kHz with FM0, M2,
M4, M8
– BLF = 250 kHz, 320 kHz, 640 kHz with M4,
M8
•ISO18000-6C (EPC Gen2) full protocol support
•ISO18000-6A/B compatibility in direct mode
•Programmable dense reader mode filters on
chip offering a worldwide shippable device
•Improved RX sensitivity down to -86dBm
•On chip TX pre-distortion
•Integrated low level transmission encoding
•Integrated low level decoders
•Integrated data framing
•Integrated CRC checking
•Parallel 8-bit or serial 4-pin SPI interface to
MCU using 24 bytes FIFO
•Voltage range for communication to MCU
between 1.8 V and 5.5 V
•Can be powered by USB with no need for step
conversion from 4.1 V to 5.5 V
•Configurable clock output for MCU
•Integrated supply voltage regulator (20mA) for
external circuitry
•Integrated supply voltage regulator for the RF
output stage improving power supply noise
rejection
•Internal power amplifier (20 dBm) for short
range applications
•ASK or PR-ASK TX modulation
•Adjustable ASK modulation index
•AM & PM demodulation avoiding
communication holes with automatic I/Q
selection
•Configurable RX gain
•Automatic gain control for reception
•AD converter for measuring TX power using an
external RF power detector
•DA converter for controlling an external power
amplifier
•Frequency hopping support
•On-board VCO and PLL covering complete
RFID frequency range 840 MHz to 960 MHz
•Oscillator using 20 MHz crystal
•Power down, standby and active mode
available
QFN64
www.st.com
ST25RU3992
2/4 DocID030079 Rev 1
Description
The ST25RU3992 is an UHF RFID Reader chip
comprising of an integrated analog front-end and
protocol handling for ISO18000-6c/b. Equipped
with multiple built-in programming options, the
device is suitable for a wide range of UHF RFID
applications.
The ST25RU3992 is pin to pin and firmware
compatible with the previous ST25RU3991 IC. It
offers improved receive sensitivity down to
-86 dB, a programmable Rx Dense Reader Mode
(DRM) filters on chip and a TX pre-distortion
feature.
Fully scalable, the ST25RU3992 is ideal for
longer range and higher power applications.
Offering DRM filtering on chip, combined with
improved RX sensitivity and TX pre-distortion
allows the ST25RU3992 to be a worldwide
shippable IC.
The reader configuration and fine tuning is
achieved by setting up control registers The
ST25RU3992 reader IC complies with EPC
Class 1 Generation 2 protocol (ISO 18000-6C)
and ISO 18000-6A/B (in direct mode).
For communication between the host system
(MCU) and the reader IC a parallel or serial
interface can be selected. When the hardware
encoder and decoder are used for transmission
and reception, base band data is transferred via a
24 bytes FIFO register. In case of direct
transmission or reception, the encoder and
decoder are bypassed and the host system can
service the analog front end in real time.
The transmitter generates 20 dBm output power
when matched to a 50 Ω load and is capable of
ASK or PR-ASK modulation. The integrated
power supply voltage regulators ensure supply
noise rejection of the complete reader system.
The transmission system comprises of a low level
data coding. Automatic generation of Frame-
Sync, Preamble, and CRC check is supported.
The receiver system allows AM and PM
demodulation. The receiver features an automatic
gain control option (patent pending), selectable
gain and signal bandwidth to cover a range of
different back scatter link frequencies and coding
options. The signal strength of AM and PM
modulation can be measured and the result is
accessible through dedicated RSSI registers. The
receiver output is selectable between digitized
sub-carrier signal and decoded sub-carrier signal.
The selected decoders deliver bit stream and data
clock as outputs. The receiver system also
comprises of a framing system. This system
performs a CRC check and organizes the data in
bytes. The base band data is then accessible to
the host system through a 24 byte FIFO register.
To support an external MCU and other circuitries
a 3.3 V regulated supply voltage is available
along with a clock output. This voltage regulator
has a current capability of 20 mA.
The ST25RU3992 is available in a 64-pin QFN
(9 mm x 9 mm), ensuring the smallest possible
footprint.
DocID030079 Rev 1 3/4
ST25RU3992 Revision history
3
1 Revision history
Table 1. Document revision history
Date Revision Changes
29-Nov-2016 1 Initial release.
ST25RU3992
4/4 DocID030079 Rev 1
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