SN54F10, SN74F10
TRIPLE 3-INPUT POSITIVE-NAND GATES
SDFS039A – MARCH 1987 – REVISED OCTOBER 1993
Copyright 1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These devices contain three independent 3-input
NAND gates. They perform the Boolean functions
Y = A B C or Y = A + B + C in positive logic.
The SN54F10 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F10 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS OUTPUT
A B C Y
H H H L
LXX H
XLX H
XXL H
logic symbol
&
Y
1
1A 2
1B 13
1C
1Y
12
3
2A 4
2B 5
2C
2Y
6
9
3A 10
3B 11
3C
3Y
8
A
B
C
logic diagram, each gate (positive logic)
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54F10 ...J PACKAGE
SN74F10 ...D OR N PACKAGE
(TOP VIEW)
SN54F10 . . . FK PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
1Y
NC
3C
NC
3B
2A
NC
2B
NC
2C
1B
1A
NC
3Y
3A V
1C
2Y
GND
NC CC
NC – No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2C
2Y
GND
VCC
1C
1Y
3C
3B
3A
3Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54F10, SN74F10
TRIPLE 3-INPUT POSITIVE-NAND GATES
SDFS039A – MARCH 1987 – REVISED OCTOBER 1993
2–2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) 1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range 30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state 0.5 V to VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54F10 55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F10 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F10 SN74F10
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IIK Input clamp current –18 –18 mA
IOH High-level output current –1 –1 mA
IOL Low-level output current 20 20 mA
TAOperating free-air temperature –55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54F10 SN74F10
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYPMAX MIN TYPMAX
UNIT
VIK VCC = 4.5 V, II = –18 mA 1.2 1.2 V
VOH
VCC = 4.5 V, IOH = – 1 mA 2.5 3.4 2.5 3.4
V
V
OH VCC = 4.75 V, IOH = – 1 mA 2.7
V
VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL VCC = 5.5 V, VI = 0.5 V 0.6 0.6 mA
IOS§VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA
ICCH VCC = 5.5 V, VI = 0 1.4 2.1 1.4 2.1 mA
ICCL VCC = 5.5 V, VI = 4.5 V 5.1 7.7 5.1 7.7 mA
All typical values are at VCC = 5 V, TA = 25°C.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
SN54F10, SN74F10
TRIPLE 3-INPUT POSITIVE-NAND GATES
SDFS039A – MARCH 1987 – REVISED OCTOBER 1993
2–3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics (see Note 2)
PARAMETER FROM
(
INPUT
)
TO
(
OUTPUT
)
VCC = 5 V,
CL = 50 pF,
RL = 500 ,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500,
TA = MIN to MAXUNIT
(INPUT)
(OUTPUT)
F10 SN54F10 SN74F10
MIN TYP MAX MIN MAX MIN MAX
tPLH
ABorC
Y
1.6 3.3 5 1.2 7 1.6 6
ns
tPHL
A
,
B
,
or
C
Y
1 2.8 4.3 1 6.5 1 5.3
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9757901Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9757901Q2A
SNJ54F
10FK
5962-9757901QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757901QC
A
SNJ54F10J
JM38510/33003B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
33003B2A
JM38510/33003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
33003BCA
JM38510/33003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
33003BDA
M38510/33003B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
33003B2A
M38510/33003BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
33003BCA
M38510/33003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
33003BDA
SN54F10J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54F10J
SN74F10D ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F10
SN74F10DR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F10
SN74F10N ACTIVE PDIP N 14 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F10N
SN74F10NSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F10
SNJ54F10FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9757901Q2A
SNJ54F
10FK
SNJ54F10J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757901QC
A
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SNJ54F10J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54F10, SN74F10 :
Catalog: SN74F10
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 3
Military: SN54F10
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74F10DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74F10NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74F10DR SOIC D 14 2500 367.0 367.0 38.0
SN74F10NSR SO NS 14 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
14X .008-.014
[0.2-0.36]
TYP
-15
0
AT GAGE PLANE
-.314.308 -7.977.83[ ]
14X -.026.014 -0.660.36[ ]
14X -.065.045 -1.651.15[ ]
.2 MAX TYP
[5.08] .13 MIN TYP
[3.3]
TYP-.060.015 -1.520.38[ ]
4X .005 MIN
[0.13]
12X .100
[2.54]
.015 GAGE PLANE
[0.38]
A
-.785.754 -19.9419.15[ ]
B -.283.245 -7.196.22[ ]
CDIP - 5.08 mm max heightJ0014A
CERAMIC DUAL IN LINE PACKAGE
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
78
14
1
PIN 1 ID
(OPTIONAL)
SCALE 0.900
SEATING PLANE
.010 [0.25] C A B
www.ti.com
EXAMPLE BOARD LAYOUT
ALL AROUND
[0.05] MAX.002
.002 MAX
[0.05]
ALL AROUND
SOLDER MASK
OPENING
METAL
(.063)
[1.6]
(R.002 ) TYP
[0.05]
14X ( .039)
[1]
( .063)
[1.6]
12X (.100 )
[2.54]
(.300 ) TYP
[7.62]
CDIP - 5.08 mm max heightJ0014A
CERAMIC DUAL IN LINE PACKAGE
4214771/A 05/2017
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE: 5X
SEE DETAIL A SEE DETAIL B
SYMM
SYMM
1
78
14
DETAIL A
SCALE: 15X
SOLDER MASK
OPENING
METAL
DETAIL B
13X, SCALE: 15X
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