S-24C01C/02C 2-WIRE SERIAL E2PROM www.sii-ic.com Rev.4.0_00_C (c) Seiko Instruments Inc., 2008-2011 The S-24C01C/02C is a 2-wire, low current consumption and wide range operation serial E2PROM. The S-24C01C/02C has the capacity of 1 K-bit and 2 K-bit, and the organization is 128 words x 8-bit, 256 words x 8-bit, respectively. Page write and sequential read are available. Features * Operating voltage range Read: 1.6 V to 5.5 V Write: 1.7 V to 5.5 V 16 bytes / page * Page write: * Sequential read * Operation frequency: 400 kHz (VCC = 1.6 V to 5.5 V) * Write time: 5.0 ms max. * Noise suppression: Schmitt trigger and noise filter on input pins (SCL, SDA) * Write protect function during the low power supply voltage * Endurance: 106cycles / word*1 (Ta = +25C) * Data retention: 100 years (Ta = +25C) * Memory capacity S-24C01C: 1 K-bit S-24C02C: 2 K-bit * Write protect: 100% * Initial shipment data: FFh * Lead-free (Sn 100%), halogen-free*2 *1. For each address (Word: 8-bit) *2. Refer to " Product Name Structure" for details. Packages * 8-Pin SOP (JEDEC) * 8-Pin TSSOP * TMSOP-8 * SNT-8A Caution This product is intended to use in general electronic devices such as consumer electronics, office equipment, and communications devices. Before using the product in medical equipment or automobile equipment including car audio, keyless entry and engine control unit, contact to SII is indispensable. Seiko Instruments Inc. 1 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Pin Configurations 1. 8-Pin SOP (JEDEC) 8-Pin SOP (JEDEC) Top view Table 1 Pin No. 1 8 2 7 3 6 4 5 Figure 1 S-24C01CI-J8T1U S-24C02CI-J8T1U 1 2 3 4 5 6 Symbol A0*1 A1*1 A2*1 GND SDA*1 SCL*1 Description Slave address input Slave address input Slave address input Ground Serial data I/O Serial clock input Write protect input 7 WP Connected to VCC: Protection valid Open or connected to GND: Protection invalid 8 VCC Power supply *1. Do not use it in high impedance. 2. 8-Pin TSSOP 8-Pin TSSOP Top view Table 2 Pin No. 1 2 3 4 8 7 6 5 Figure 2 S-24C01CI-T8T1U S-24C02CI-T8T1U 2 1 2 3 4 5 6 Symbol A0*1 A1*1 A2*1 GND SDA*1 SCL*1 Description Slave address input Slave address input Slave address input Ground Serial data I/O Serial clock input Write protect input 7 WP Connected to VCC: Protection valid Open or connected to GND: Protection invalid 8 VCC Power supply *1. Do not use it in high impedance. Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 3. TMSOP-8 TMSOP-8 Top view Table 3 Pin No. 1 2 3 4 8 7 6 5 Figure 3 S-24C01CI-K8T3U S-24C02CI-K8T3U 1 2 3 4 5 6 Symbol A0*1 A1*1 A2*1 GND SDA*1 SCL*1 Description Slave address input Slave address input Slave address input Ground Serial data I/O Serial clock input Write protect input 7 WP Connected to VCC: Protection valid Open or connected to GND: Protection invalid 8 VCC Power supply *1. Do not use it in high impedance. 4. SNT-8A SNT-8A Top view Table 4 Pin No. 1 2 3 4 8 7 6 5 Figure 4 S-24C01CI-I8T1U S-24C02CI-I8T1U 1 2 3 4 5 6 Symbol A0*1 A1*1 A2*1 GND SDA*1 SCL*1 Description Slave address input Slave address input Slave address input Ground Serial data I/O Serial clock input Write protect input 7 WP Connected to VCC: Protection valid Open or connected to GND: Protection invalid 8 VCC Power supply *1. Do not use it in high impedance. Remark Refer to the "Package drawings" for the details. Seiko Instruments Inc. 3 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Block Diagram VCC WP SCL GND Start / Stop Detector SDA Voltage Detector Serial Clock Controller High-Voltage Generator LOAD Device Address Comparator COMP Data Register LOAD INC A2 R/W A1 Address Counter X Decoder Memory Cell Array A0 Y Decoder Data Output ACK Output Controller DIN DOUT Figure 5 4 Selector Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Absolute Maximum Ratings Table 5 Item Power supply voltage Input voltage Output voltage Operation ambient temperature Storage temperature Symbol VCC VIN VOUT Topr Tstg Absolute Maximum Ratings -0.3 to +6.5 -0.3 to +6.5 -0.3 to +6.5 -40 to +85 -65 to +150 Unit V V V C C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Recommended Operating Conditions Table 6 Item Symbol Power supply voltage VCC High level input voltage Low level input voltage VIH VIL Condition Read Operation Write Operation VCC = 1.6 V to 5.5 V VCC = 1.6 V to 5.5 V Ta = -40C to +85C Min. Max. 1.6 1.7 5.5 5.5 0.7 x VCC -0.3 5.5 0.3 x VCC Unit V V V V Pin Capacitance Table 7 Item Input capacitance I/O capacitance Symbol Condition CIN VIN = 0 V (SCL, A0, A1, A2, WP) CI / O VI / O = 0 V (SDA) (Ta = +25C, f = 1.0 MHz, VCC = 5.0 V) Min. Max. Unit - 10 pF - 10 pF Endurance Table 8 Item Symbol Operation Ambient Temperature Endurance NW Ta = +25C *1. For each address (Word: 8 bits) Min. 106 Max. - Unit cycles / word*1 Min. 100 Max. - Unit year Data Retention Table 9 Item Data retention Symbol - Operation Ambient Temperature Ta = +25C Seiko Instruments Inc. 5 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C DC Electrical Characteristics Table 10 Item Symbol Current consumption (READ) Ta = -40C to +85C VCC = 1.6 V to 5.5 V fSCL = 400 kHz Min. Max. - 0.8 Condition - ICC1 Unit mA Table 11 Item Symbol Ta = -40C to +85C VCC = 1.7 V to 5.5 V fSCL = 400 kHz Min. Max. Condition - Current consumption (WRITE) ICC2 - 2.5 Unit mA Table 12 Ta = -40C to +85C Item Symbol Standby current consumption ISB Input leakage current ILI Output leakage current ILO Input current 1 IIL Input current 2 IIH Input Impedance 1 ZIL Input Impedance 2 ZIH Low level output voltage VOL 6 VCC = 2.5 V to 5.5 V VCC = 1.8 V to 5.5 V VCC = 1.6 V to 1.8 V Unit Condition VIN = VCC or GND SCL, SDA, A0, A1, A2 VIN = GND to VCC SDA VOUT = GND to VCC WP VIN < 0.3 x VCC WP VIN > 0.7 x VCC WP VIN = 0.3 x VCC WP VIN = 0.7 x VCC IOL = 3.2 mA IOL = 1.5 mA IOL = 0.7 mA Min. Max. Min. Max. Min. Max. - 3.5 - 3.5 - 2.0 A - 1.0 - 1.0 - 1.0 A - 1.0 - 1.0 - 1.0 A - 50.0 - 50.0 - 50.0 A - 2.0 - 2.0 - 2.0 A 30 - 30 - 30 - k 500 - 500 - 500 - k - - - 0.4 0.3 0.2 - - - - 0.3 0.2 - - - - 0.3 0.2 V V V Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C AC Electrical Characteristics Table 13 Measurement Conditions Input pulse voltage Input pulse rising / falling time Output reference voltage Output load Input pulse voltage 0.2 x VCC to 0.8 x VCC 20 ns or less 0.3 x VCC to 0.7 x VCC 100 pF Output reference voltage 0.8 x VCC 0.7 x VCC 0.3 x VCC 0.2 x VCC Figure 6 Input / Output Waveform during AC Measurement Table 14 Item Ta = -40C to +85C VCC = 1.6 V to 5.5 V Min. Max. 0 400 1.3 - 0.6 - 0.1 0.9 50 - 0.6 - 0.6 - 100 - 0 - 0.6 - - 0.3 - 0.3 0 - 0 - 0 - 0 - 1.3 - - 50 Symbol SCL clock frequency SCL clock time "L" SCL clock time "H" SDA output delay time SDA output hold time Start condition setup time Start condition hold time Data input setup time Data input hold time Stop condition setup time SCL, SDA rising time SCL, SDA falling time WP setup time WP hold time WP release setup time WP release hold time Bus release time Noise suppression time fSCL tLOW tHIGH tAA tDH tSU.STA tHD.STA tSU.DAT tHD.DAT tSU.STO tR tF tWS1 tWH1 tWS2 tWH2 tBUF tI tHIGH tF tLOW Unit kHz s s s ns s s ns ns s s s s s s s s ns tR SCL tHD.STA tHD.DAT tSU.STA tSU.DAT tSU.STO SDA ( input ) tAA tDH tBUF SDA ( output ) Figure 7 Bus Timing Seiko Instruments Inc. 7 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Table 15 Item Write time Start Condition Symbol tWR Ta = -40C to +85C VCC = 1.7 V to 5.5 V Min. Max. - 5.0 Acknowledgment Signal Write data Stop Condition SCL D0 SDA tWS1 tWH1 tWS2 tWH2 WP (valid) WP (invalid) Figure 8 Write Cycle Timing 8 Seiko Instruments Inc. Unit ms tWR Start Condition 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Pin Functions 1. A0, A1 and A2 (Slave address input) pins In the S-24C01C/02C, to set the slave address, connect each pin of A0, A1, A2 to GND or VCC. Therefore the users can set 8 types of slave address by a combination of A0, A1, A2 pins. Comparing the slave address transmitted from the master device and one that you set, makes possible to select the S-24C01C/02C from other devices connected onto the bus. Be sure to connect to fix the address input pin to GND or VCC. 2. SDA (Serial data input / output) pin The SDA pin is used for the bi-directional transmission of serial data. This pin is a signal input pin, and an Nch open drain output pin. In use, generally, connect the SDA line to any other device which has the open-drain or open-collector output with Wired-OR connection by pulling up to VCC by a resistor (Figure 9 shows the relation with an output load). 3. SCL (Serial clock input) pin The SCL pin is used for the serial clock input. Since the signals are processed at a rising or falling edge of the SCL clock, pay attention to the rising and falling time and comply with the specification. 4. WP (Write protect input) pin The write protect is enabled by connecting the WP pin to VCC. When not using the write protect, connect this pin to GND or set in open. 20 18 16 14 Maximum value of 12 pull-up resistor 10 [k] 8 fSCL = 400 kHz 6 4 2 0 100 10 Value of load capacity [pF] Figure 9 Output Load Initial Shipment Data Initial shipment data of all addresses is "FFh". Seiko Instruments Inc. 9 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Operation 1. Start condition Start is identified by a high to low transition of the SDA line while the SCL line is stable at high. Every operation begins from a start condition. 2. Stop condition Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high. When a device receives a stop condition during a read sequence, the read operation is interrupted, and the device enters standby mode. When a device receives a stop condition during a write sequence, the reception of the write data is halted, and the S24C01C/02C initiates a write cycle. tSU.STA tHD.STA tSU.STO SCL SDA Start Condition Stop Condition Figure 10 Start / Stop Conditions 10 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 3. Data transmission Changing the SDA line while the SCL line is low, data is transmitted. Changing the SDA line while the SCL line is high, a start or stop condition is recognized. tSU.DAT tHD.DAT SCL SDA Figure 11 Data Transmission Timing 4. Acknowledge The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down the SDA line to acknowledge the receipt of the 8-bit data. When an internal write cycle is in progress, the device does not generate an acknowledge. SCL (E2PROM Input) 1 8 9 SDA (Master Output) Acknowledge Output SDA (E PROM Output) 2 Start Condition tAA tDH Figure 12 Acknowledge Output Timing Seiko Instruments Inc. 11 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 5. Device addressing To start communication, the master device on the system generates a start condition to the bus line. Next, the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus. The higher 4 bits of the device address are the "Device Code", and are fixed to "1010". In the S-24C01C/02C, successive 3 bits are the "Slave Address". These 3 bits are used to identify a device on the system bus and are compared with the predetermined value which is defined by the address input pins (A2, A1, A0). When the comparison result matches, the slave device responds with an acknowledge during the 9th clock cycle. Slave Address Device Code S-24C01C/02C 1 0 1 0 A2 MSB A0 R/W LSB Figure 13 Device Address 12 A1 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 6. Write 6. 1 Byte write When the master sends a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start condition, the S-24C01C/02C acknowledges it. The S-24C01C/02C then receives an 8-bit word address and responds with an acknowledge. After the S-24C01C/02C receives 8-bit write data and responds with an acknowledge, it receives a stop condition and that initiates the write cycle at the addressed memory. During the write cycle all operations are forbidden and no acknowledge is generated. S T A R T SDA LINE DEVICE ADDRESS 1 M S B Remark W R I T E 0 1 0 A2 A1 A0 0 WORD ADDRESS DATA W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0 L R A S / C B W K A A C C K K S T O P A C K In the S-24C01C, W7 = Don't care. Figure 14 Byte Write Seiko Instruments Inc. 13 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 6. 2 Page write The page write mode allows up to 16 bytes to be written in a single write operation in the S-24C01C/02C. Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving 8bit write data as much data as the page size has. When the S-24C01C/02C receives a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start condition, it generates an acknowledge. Then the S-24C01C/02C receives an 8-bit word address, and responds with an acknowledge. After the S-24C01C/02C receives 8-bit write data and responds with an acknowledge, it receives 8-bit write data corresponding to the next word address, and generates an acknowledge. The S-24C01C/02C repeats reception of 8-bit write data and generation of acknowledge in succession. The S24C01C/02C can receive as many write data as the maximum page size. Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and having the page size equal to the received write data. S T A R T SDA LINE W R I T E WORD ADDRESS (n) DATA (n) 1 0 1 0 A2 A1 A0 0 W7W6 W5W4 W3 W2 W1W0 D7 D6 D5 D4 D3 D2 D1 D0 DEVICE ADDRESS M S B Remark L R A S / C BWK A C K DATA (n + 1) D7 A C K S T O P DATA (n + x) D0 D7 A C K D0 A C K In the S-24C01C, W7 = Don't care. Figure 15 Page Write In the S-24C01C, the lower 4 bits of the word address are automatically incremented every time when the S24C01C receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 3 bits (W6 to W4) of the word address remain unchanged, and the lower 4 bits are rolled over and the last 16-byte data that the S-24C01C received will be overwritten. In the S-24C02C, the lower 4 bits of the word address are automatically incremented every time when the S24C02C receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits (W7 to W4) of the word address remain unchanged, and the lower 4 bits are rolled over and the last 16-byte data that the S-24C02C received will be overwritten. 14 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 6. 3 Write protect Write protect is available in the S-24C01C/02C. When the WP pin is connected to the VCC, write operation to memory area is forbidden at all. When the WP pin is connected to GND or set in open, the write protect is invalid, and write operation in all memory area is available. Fix the level of the WP pin from start condition in the write operation (byte write, page write) until stop condition. If the WP pin changes during this time, the address data being written at this time is not guaranteed. Regarding the timing of write protect, refer to Figure 8. In not using the write protect, connect the WP pin to GND or set it open. The write protect is valid in the range of operation power supply voltage. As seen in Figure 16 when the write protect is valid, the S-24C01C/02C does not generate an acknowledgment signal after data input. S T A R T SDA LINE DEVICE ADDRESS 1 M S B W R I T E 0 1 0 A2 A1 A0 0 WORD ADDRESS DATA W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0 L R A S / C B W K A A C C K K S T O P N A C K WP Remark In the S-24C01C, W7 = Don't care. Figure 16 Write Protect Seiko Instruments Inc. 15 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 6. 4 Acknowledge polling Acknowledge polling is used to know the completion of the write cycle in the S-24C01C/02C. After the S-24C01C/02C receives a stop condition and once starts the write cycle, all operations are forbidden and no response is made to the signal transmitted by the master device. Accordingly the master device can recognize the completion of the write cycle in the S-24C01C/02C by detecting a response from the slave device after transmitting the start condition, the device address and the read / write instruction code to the S-24C01C/02C, namely to the slave devices. That is, if the S-24C01C/02C does not generate an acknowledge, the write cycle is in progress and if the S24C01C/02C generates an acknowledge, the write cycle has been completed. It is recommended to use the read instruction "1" as the read / write instruction code transmitted by the master device. Acknowledge polling during write DATA SDA LINE S T O P W R I T E S T A R T S T A R T DEVICE ADDRESS 0 D2 D1 D0 W R I T E DEVICE ADDRESS 0 R N / A W C K WORD ADDRESS A C K R A / C WK tWR Acknowledge polling during read DATA SDA LINE D2 D1 D0 S T O P S T A R T R E A D DEVICE ADDRESS 1 R N / A W C K S T A R T NO ACK from R Master Device E A D DEVICE ADDRESS 1 DATA R A / C WK S T O P S T A R T DEVICE ADDRESS R A / C WK tWR Remark Users are able to input word address and data after ACK output in acknowledge polling during write. Users are able to read data after ACK output in acknowledge polling during read. However, after that users input the write instruction, a start condition may not be input during data output. Input a stop condition and the next instruction after data output and ACK output. Figure 17 Usage Example of Acknowledge Polling 16 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 7. Read 7. 1 Current address read Either in writing or in reading the S-24C01C/02C holds the last accessed memory address. The memory address is maintained as long as the power voltage does not decrease less than the operating voltage. The master device can read the data at the memory address of the current address pointer without assigning the word address as a result, when it recognizes the position of the address pointer in the S-24C01C/02C. This is called "Current Address Read". In the following the address counter in the S-24C01C/02C is assumed to be "n". When the S-24C01C/02C receives a 7-bit device address and a 1-bit read / write instruction code set to "1" following a start condition, it responds with an acknowledge. Next an 8-bit data at the address "n" is sent from the S-24C01C/02C synchronous to the SCL clock. The address counter is incremented and the content of the address counter becomes n+1. The master device outputs stop condition not an acknowledge, the reading of S-24C01C/02C is ended. S T A R T SDA LINE NO ACK from Master Device R E A D DEVICE ADDRESS 1 M S B 0 1 S T O P DATA 0 A2 A1 A0 1 L R S / B W D7 D6 D5 D4 D3 D2 D1 D0 A C K Figure 18 Current Address Read Attention should be paid to the following point on the recognition of the address pointer in the S-24C01C/02C. In Read, the memory address counter in the S-24C01C/02C is automatically incremented after output of the 8th bit of the data. In Write, on the other hand, the upper bits of the memory address (the upper bits of the word address)*1 are left unchanged and are not incremented. 1. In the S-24C01C, the upper 3 bits (W6 to W4) of the word address In the S-24C02C, the upper 4 bits (W7 to W4) of the word address Seiko Instruments Inc. 17 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 7. 2 Random read Random read is used to read the data at an arbitrary memory address. A dummy write is performed to load the memory address into the address counter. When the S-24C01C/02C receives a 7-bit device address and a 1-bit read / write instruction code set to "0" following a start condition, it responds with an acknowledge. The S-24C01C/02C then receives an 8-bit word address and responds with an acknowledge. The memory address is loaded to the address counter in the S24C01C/02C by these operations. Reception of write data does not follow in a dummy write whereas reception of write data follows in byte write and in page write. Since the memory address is loaded into the memory address counter by dummy write, the master device can read the data starting from the arbitrary memory address by transmitting a new start condition and performing the same operation in the current address read. That is, when the S-24C01C/02C receives a 7-bit device address and a 1-bit read / write instruction code set to "1", following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the S24C01C/02C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the reading of S-24C01C/02C is ended. S T A R T SDA LINE DEVICE ADDRESS W R I T E 1 0 1 0 A2 A1 A0 0 M S B S T A R T WORD ADDRESS (n) 1 0 1 0 A2 A1 A0 1 W7 W6 W5 W4 W3 W2 W1 W0 L R A S / C B W K DEVICE ADDRESS A C K M S B DUMMY WRITE Remark In the S-24C01C, W7 = Don't care. Figure 19 Random Read 18 R E A D Seiko Instruments Inc. L R A S / C B W K NO ACK from Master Device DATA D7 D6 D5 D4 D3 D2 D1 D0 S T O P 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 7. 3 Sequential read When the S-24C01C/02C receives a 7-bit device address and a 1-bit read / write instruction code set to "1" following a start condition both in current address read and random read, it responds with an acknowledge. When an 8-bit data is output from the S-24C01C/02C synchronous to the SCL clock, the address counter is automatically incremented. When the master device responds with an acknowledge, the data at the next memory address is transmitted. Response with an acknowledge by the master device has the memory address counter in the S-24C01C/02C incremented and makes it possible to read data in succession. This is called "Sequential Read". The master device outputs stop condition not an acknowledge, the reading of S-24C01C/02C is ended. Data can be read in succession in the sequential read mode. When the memory address counter reaches the last word address, it rolls over to the first word address. NO ACK from Master Device R E DEVICE A ADDRESS D SDA LINE 1 R A / C W K A C K D7 D0 DATA (n) A C K D7 D0 DATA (n + 1) S T O P A C K D7 D0 DATA (n + 2) D7 D0 DATA (n + x) Figure 20 Sequential Read Seiko Instruments Inc. 19 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Write Protect Function during the Low Power Supply Voltage The S-24C01C/02C has a built-in detection circuit which operates with the low power supply voltage, cancels Write when the power supply voltage drops and power-on. Its detection and release voltages are 1.20 V typ. (Refer to Figure 21). The S-24C01C/02C cancels Write by detecting a low power supply voltage when it receives a stop condition. In the data trasmission and the Write operation, data in the address written during the low power supply voltage is not assurable. Power Supply Voltage Detection Voltage (-VDET) 1.20 V typ. Release Voltage (+VDET) 1.20 V typ. Write Instruction cancel Figure 21 Operation during Low Power Supply Voltage 20 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Using S-24C01C/02C 1. Adding a pull-up resistor to SDA I/O pin and SCL input pin In consideration of I2C-bus protocol function, the SDA I/O pins should be connected with a pull-up resistor. The S-24C01C/02C cannot transmit normally without using a pull-up resistor. In case that the SCL input pin of the S-24C01C/02C is connected to the Nch open drain output pin of the master device, connect the SCL pin with a pull-up resistor. As well, in case the SCL input pin of the S-24C01C/02C is connected to the tri-state output pin of the master device, connect the SCL pin with a pull-up resistor in order not to set it in high impedance. This prevents the S-24C01C/02C from error caused by an uncertain output (high impedance) from the tri-state pin when resetting the master device during the voltage drop. 2. Equivalent circuit of input and I/O pin Each pin (SCL, SDA, A0, A1, A2) of the S-24C01C/02C does not have a built-in pull-down or pull-up resistor. The WP pin includes a pull-down resistor. The SDA line has an open-drain output. The followings are equivalent circuits of the pins. SCL Figure 22 SCL Pin SDA Figure 23 SDA Pin Seiko Instruments Inc. 21 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C WP Figure 24 WP Pin A0, A1, A2 Figure 25 A0, A1, A2 Pins 22 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 3. Phase adjustment during S-24C01C/02C access The S-24C01C/02C does not have a pin to reset (the internal circuit). The users cannot forcibly reset it externally. If the communication to the S-24C01C/02C interrupted, the users need to handle it as you do for software. In the S-24C01C/02C, users are able to reset the internal circuit by inputting a start condition and a stop condition. Although the reset signal is input to the master device, the S-24C01C/02C's internal circuit does not go in reset, but it does by inputting a stop condition to the S-24C01C/02C. The S-24C01C/02C keeps the same status thus cannot do the next operation. Especially, this case corresponds to that only the master device is reset when the power supply voltage drops. If the power supply voltage restored in this status, input the instruction after resetting (adjusting the phase with the master device) the S-24C01C/02C. How to reset is shown below. [How to reset S-24C01C/02C] The S-24C01C/02C is able to be reset by a start and stop instructions. When the S-24C01C/02C is reading data "0" or is outputting the acknowledgment signal, outputs "0" to the SDA line. In this status, the master device cannot output an instruction to the SDA line. In this case, terminate the acknowledgment output operation or the Read operation, and then input a start instruction. Figure 26 shows this procedure. First, input a start condition. Then transmit 9 clocks (dummy clock) of SCL. During this time, the master device sets the SDA line to "H". By this operation, the S-24C01C/02C interrupts the acknowledgment output operation or data output, so input a start condition*1. When a start condition is input, the S-24C01C/02C is reset. To make doubly sure, input the stop condition to the S-24C01C/02C. The normal operation is then possible. Start Condition Start Condition Dummy Clock 1 2 8 Stop Condition 9 SCL SDA Figure 26 Resetting S-24C01C/02C *1. After 9 clocks (dummy clock), if the SCL clock continues to being output without inputting a start condition, S24C01C/02C may go in the write operation when it receives a stop condition. To prevent this, input a start condition after 9 clocks (dummy clock). Remark Regarding this reset procedure with dummy clock, it is recommended to perform at the system initialization after applying the power supply voltage. Seiko Instruments Inc. 23 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 4. Acknowledge check The I2C-bus protocol includes an acknowledge check function as a handshake function to prevent a communication error. This function allows detection of a communication failure during data communication between the master device and S-24C01C/02C. This function is effective to prevent malfunction, so it is recommended to perform an acknowledge check with the master device. 5. Built-in power-on-clear circuit The S-24C01C/02C has a built-in power-on-clear circuit that initializes itself at the same time during power-on. Unsuccessful initialization may cause a malfunction. To operate the power-on-clear circuit normally, the following conditions must be satisfied to raise the power supply voltage. 5. 1 Raising power supply voltage Shown in Figure 27, raise the power supply voltage from 0.2 V max., within the time defined as tRISE which is the time required to reach the power supply voltage to be set. For example, if the power supply voltage is 5.0 V, tRISE = 200 ms seen in Figure 28. The power supply voltage must be raised within 200 ms. tRISE max. Power Supply Voltage (VCC) VINIT max. 0.2 V 0V *1 *2 tINIT max. *1. 0 V means there is no difference in potential between the VCC pin and the GND pin of the S-24C01C/02C. *2. tINIT is the time required to initialize the S-24C01C/02C. No instructions are accepted during this time. Figure 27 Raising Power Supply Voltage 24 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 5.0 4.0 Power Supply Voltage (VCC) [V] 3.0 2.0 50 100 150 200 Rise Time (tRISE) max. [ms] For example: If the supply voltage = 5.0 V, raise the power supply voltage to 5.0 V within 200 ms. Figure 28 Rise Time of Power Supply Voltage When initialization is successfully completed by the power-on-clear circuit, the S-24C01C/02C enters the standby status. If the power-on-clear circuit does not operate; The S-24C01C/02C has not completed initialization, an instruction previously input is still valid or an instruction may be inappropriately recognized. In this case, S-24C01C/02C may perform the Write operation. The voltage drops due to power off while the S-24C01C/02C is being accessed. Even if the master device is reset due to the low power voltage, the S-24C01C/02C may malfunction unless the power-on-clear operation conditions of S-24C01C/02C are satisfied. When not using this rise time seen in Figure 28, adjust the phase (reset) to reset the internal circuit in the S24C01C/02C normally. Seiko Instruments Inc. 25 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 5. 2 Initialization time The S-24C01C/02C initializes at the same time when the power supply voltage is raised. Input instructions to the S-24C01C/02C after initialization. S-24C01C/02C does not accept any instruction during initialization. Figure 29 shows the initialization time of the S-24C01C/02C. 100 m 10 m Initialization Time (tINIT) max. [s] 1.0 m 100 10 1.0 1.0 10 100 1.0 m 10 m 100 m Rise Time (tRISE) [s] Figure 29 Initialization Time of S-24C01C/02C 26 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 6. Data hold time (tHD.DAT = 0 ns) If SCL and SDA of the S-24C01C/02C are changed at the same time, it is necessary to prevent a start / stop condition from being mistakenly recognized due to the effect of noise. The S-24C01C/02C may error if it does not recognize a start / stop condition correctly during transmission. In the S-24C01C/02C, it is recommended to set the delay time of 0.3 s minimum from a falling edge of SCL for the SDA. This is to prevent S-24C01C/02C from going in a start / stop condition due to the time lag caused by the load of the bus line. tHD.DAT = 0.3 s min. SCL SDA Figure 30 S-24C01C/02C Data Hold Time 7. SDA pin and SCL pin noise suppression time The S-24C01C/02C includes a built-in low-pass filter at the SDA and SCL pins to suppress noise. This means that if the power supply voltage is 5.0 V, noise with a pulse width of 100 ns or less can be suppressed. For details of the assurable value, refer to noise suppression time (tl) in Table 14. 300 Noise Suppression Time (tI) Max. 200 [ns] 100 2 3 4 5 Power Supply Voltage (VCC) [V] Figure 31 Noise Suppression Time for SDA and SCL Pins Seiko Instruments Inc. 27 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C 8. Operation when input stop condition during input write data The S-24C01C/02C does the write operation only when it receives data of 1 byte or more and receives a stop condition immediately after ACK output. Refer to Figure 32 regarding details. Write valid by stop condition Write invalid by stop condition S T A R T SDA LINE Write invalid by stop condition W R I T E WORD ADDRESS (n) DATA (n) 1 0 1 0 A2 A1 A0 0 W7W6 W5W4 W3 W2 W1W0 D7 D6 D5 D4 D3 D2 D1 D0 DEVICE ADDRESS M S B Remark L R A S / C BWK Write valid by stop condition A C K Write invalid by stop condition DATA (n + 1) D7 A C K Write valid by stop condition S T O P DATA (n + x) D0 D7 A C K D0 A C K In the S-24C01C, setting W7 is arbitrary. Figure 32 Write Operation by Inputting Stop Condition during Write 9. Command cancel by start condition By a start condition, users are able to cancel command which is being input. However, adjust the phase while the S24C01C/02C is outputting "L" because users are not able to input a start condition. When users cancel the command, there may be a case that the address will not be identified. Use random read for the read operation, not current address read. 10. Precaution for use Absolute maximum ratings: Do not operate these ICs in excess of the absolute maximum ratings (as listed on the data sheet). Exceeding the supply voltage rating can cause latch-up. Operations with moisture on the S-24C01C/02C pins may occur malfunction by short-circuit between pins. Especially, in occasions like picking the S-24C01C/02C up from low temperature tank during the evaluation. Be sure that not remain frost on the S-24C01C/02C pin to prevent malfunction by short-circuit. Also attention should be paid in using on environment, which is easy to dew for the same reason. 28 Seiko Instruments Inc. 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Precautions Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products including this IC upon patents owned by a third party. Seiko Instruments Inc. 29 2-WIRE SERIAL E2PROM S-24C01C/02C Rev.4.0_00_C Product Name Structure 1. Product name S-24C0xC I - xxxx U Environmental code U: Lead-free (Sn 100%), halogen-free Package name (abbreviation) and IC packing specification J8T1: 8-Pin SOP (JEDEC), Tape T8T1: 8-Pin TSSOP, Tape K8T3: TMSOP-8, Tape I8T1: SNT-8A, Tape Fixed Product name S-24C01C: 1 Kbit S-24C02C: 2 Kbit 2. Packages Package name 8-Pin SOP (JEDEC) 8-Pin TSSOP TMSOP-8 SNT-8A 30 Drawing code Package FJ008-Z-P-SD FT008-Z-P-SD FM008-A-P-SD PH008-A-P-SD Tape FJ008-Z-C-SD FT008-Z-C-SD FM008-A-C-SD PH008-A-C-SD Seiko Instruments Inc. Reel FJ008-Z-R-SD FT008-Z-R-SD FM008-A-R-SD PH008-A-R-SD Land - - - PH008-A-L-SD +0.20 5.02 -0.35 8 5 1 4 1.27 0.200.05 +0.11 0.4 -0.07 No. FJ008-Z-P-SD-2.0 TITLE No. SOP8J-Z-PKG Dimensions FJ008-Z-P-SD-2.0 SCALE UNIT mm Seiko Instruments Inc. 4.00.1(10 pitches:40.00.2) 2.00.05 o1.550.05 0.30.05 o1.5 min. 8.00.1 2.10.1 +0.30 6.5 -0.25 1 8 4 5 Feed direction No. FJ008-Z-C-SD-1.0 TITLE SOP8J-Z-Carrier Tape No. FJ008-Z-C-SD-1.0 SCALE UNIT mm Seiko Instruments Inc. 17.51.5 13.41.0 Enlarged drawing in the central part o210.8 20.5 o130.2 No. FJ008-Z-R-SD-1.0 TITLE SOP8J-Z-Reel No. FJ008-Z-R-SD-1.0 SCALE UNIT QTY. mm Seiko Instruments Inc. 4,000 +0.3 3.00 -0.2 8 5 1 4 0.150.07 0.20.1 0.65 No. FT008-Z-P-SD-1.0 TITLE TSSOP8-Z-PKG Dimensions FT008-Z-P-SD-1.0 No. SCALE UNIT mm Seiko Instruments Inc. 4.00.1 2.00.05 0.30.05 o1.550.05 +0.2 8.00.1 o1.55 -0.05 +0.4 6.6 -0.2 1 8 4 5 Feed direction No. FT008-Z-C-SD-1.0 TITLE TSSOP8-Z-Carrier Tape FT008-Z-C-SD-1.0 No. SCALE UNIT mm Seiko Instruments Inc. 13.41.0 17.51.0 Enlarged drawing in the central part o210.8 20.5 o130.2 No. FT008-Z-R-SD-1.0 TSSOP8-Z-Reel TITLE FT008-Z-R-SD-1.0 No. SCALE UNIT QTY. mm Seiko Instruments Inc. 4,000 2.900.2 8 5 1 4 0.130.1 0.20.1 0.650.1 No. FM008-A-P-SD-1.0 TITLE TMSOP8-A-PKG Dimensions No. FM008-A-P-SD-1.0 SCALE UNIT mm Seiko Instruments Inc. 2.000.05 4.000.1 4.000.1 1.000.1 +0.1 1.55 -0 1.050.05 0.300.05 3.250.05 4 1 5 8 Feed direction No. FM008-A-C-SD-1.0 TITLE TMSOP8-A-Carrier Tape FM008-A-C-SD-1.0 No. SCALE UNIT mm Seiko Instruments Inc. 16.5max. 13.00.3 Enlarged drawing in the central part 130.2 (60) (60) No. FM008-A-R-SD-1.0 TMSOP8-A-Reel TITLE FM008-A-R-SD-1.0 No. SCALE UNIT QTY. 4,000 mm Seiko Instruments Inc. 1.970.03 8 7 6 5 3 4 +0.05 1 0.5 2 0.08 -0.02 0.480.02 0.20.05 No. PH008-A-P-SD-2.0 TITLE SNT-8A-A-PKG Dimensions PH008-A-P-SD-2.0 No. SCALE UNIT mm Seiko Instruments Inc. +0.1 o1.5 -0 5 2.250.05 4.00.1 2.00.05 o0.50.1 0.250.05 0.650.05 4.00.1 4 321 5 6 78 Feed direction No. PH008-A-C-SD-1.0 TITLE SNT-8A-A-Carrier Tape PH008-A-C-SD-1.0 No. SCALE UNIT mm Seiko Instruments Inc. 12.5max. 9.00.3 Enlarged drawing in the central part o130.2 (60) (60) No. PH008-A-R-SD-1.0 TITLE SNT-8A-A-Reel No. PH008-A-R-SD-1.0 SCALE UNIT QTY. mm Seiko Instruments Inc. 5,000 0.52 2.01 0.52 0.3 0.2 0.3 0.2 0.3 0.2 0.3 Caution Making the wire pattern under the package is possible. However, note that the package may be upraised due to the thickness made by the silk screen printing and of a solder resist on the pattern because this package does not have the standoff. No. PH008-A-L-SD-3.0 TITLE SNT-8A-A-Land Recommendation PH008-A-L-SD-3.0 No. SCALE UNIT mm Seiko Instruments Inc. www.sii-ic.com * * * * * * * The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. The products described herein are not designed to be radiation-proof. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.