For price, delivery and to place orders: Hittite Microwave Corporation, 20 Alpha Road, Chelmsford, MA 01824
Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
CLOCK GENERATORS - SMT
2
HMC1032LP6GE
v01.0712
CLOCK GENERATOR WITH FRACTIONAL-N PLL
& INTEGRATED VCO, 125 - 350 MHz
General Description
The HMC1032LP6GE is a low-noise, wide-band clock generator IC with a fractional-N Phase Locked Loop (PLL) that
features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between
125 and 350 MHz range. The HMC1032LP6GE features low noise Phase Detector (PD) and Delta-Sigma modulator,
capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.
The HMC1032LP6GE features industry leading phase noise and jitter performance, across the operating range,
that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior
noise oor (<-165 dBc/Hz) makes the HMC1032LP6GE an ideal source for a variety of applications –such as clock
references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SERDES) circuits,
FPGAs and processors. The HMC1032LP6GE can also be used as reference clock and LO for 1G/10G Ethernet line
cards as well as jitter attenuation and frequency translation.
The differential output of the HMC1032LP6GE includes a 2-bit output amplitude control which may be set via the
SPI serial programming interface, and an output Mute function. The Delta-Sigma Modulator of the HMC1032LP6GE
features Hittite’s Exact Frequency Mode, which enables users to generate output frequencies with close to 0 Hz
frequency error.
For theory of operation and register map refer to the “PLLs with Integrated VCOs - RF VCOs Operating Guide”. To
view the Operating Guide, please visit www.hittite.com and choose HMC1032LP6GE from the “Search by Part
Number” pull down menu.
Electrical Specications, VPPCP, VDDLS, VCC1, VCC2 = 5V; RVDD, AVDD,
DVDD3V, VCCPD, VCCHF, VCCPS = 3.3V Min & Max Specied across Temperature -40 °C to 85 °C
Parameter Condition Min. Typ. Max. Units
RF Output Characteristics
Output Frequency 125 350 MHz
Output Specications
Output Voltage Single-Ended Swing (peak-to-
peak), 50 Ohm termination 0.25 1.35 Vpp
Output Amplitude Control Gain Setting = 00, F=350 MHz 330 mVpp
Gain Setting = 01, F=350 MHz 450 mVpp
Gain Setting = 10, F=350 MHz 675 mVpp
Gain Setting = 11, F=350 MHz 1.01 Vpp
Output Common Mode Voltage AC Coupling Recommended
VCO Output Divider
VCO RF Divider Range 1,2,4,6,8,...,62 162
PLL RF Divider Characteristics
19-Bit N-Divider Range (Integer) Max = 219 - 1 16 524,287
19-Bit N-Divider Range (Fractional) Fractional Nominal Divide Ratio
Varies (-3 / +4) Dynamically Max 20 524,283
REF Input Characteristics
Max Ref Input Frequency 350 MHz
Ref Input Voltage AC Coupled [1] 1 2 3.3 Vp-p
Ref Input Capacitance 5pF
14-Bit R-Divider Range 116,383
[1] Measured with 100 external termination. See Hittite PLL w/ Integraged VCOs Operating Guide Reference Input Stage section for
more details.
[2] Slew rate of greater or equal to 0.5 ns/V is recommended, see PLL with Integrated RF VCOs Operating Guide for more details.
Frequency is guaranteed across process voltage and temperature from -40 °C to 85 °C.
[3] This maximum phase detector frequency can only be achieved if the minimum N value is respected. eg. In the case of fractional feedback
mode, the maximum PFD rate = fvco/20 or 100 MHz, whichever is less.