UC1705 UC2705, UC3705 www.ti.com SLUS370D - JULY 1995 - REVISED MARCH 2012 HIGH SPEED POWER DRIVER Check for Samples: UC1705, UC2705, UC3705 FEATURES 1 * * * * * 1.5 A Source/Sink Drive 100 nsec Delay 40 nsec Rise Fall into 1000 pF Inverting and Non-Inverting Inputs Low Cross-Conduction Current Spike * * * * Low Quiescent Current 5 V to 40 V Operation Thermal Shutdown Protection Minidip and Power Packages DESCRIPTION The UC1705 family of power drivers is made with a high sppeed Schottky process to interface between low-level control functions and high-power switching devices - particularly power MOSFETs. These devices are also an optimum choise for capacitive line drivers where up to 1.5 A may be switched in either direction. With both inverting and non-inverting inputs available, logic signals of either polarity may be accepted, or one input can be used to gate or strobe the other. Supply voltages for both VS and VC can independently range from 5 V to 40 V. For additional application details, see the UC1707/3707 data sheet (SLUS177). The UC1705 is packaged in an 8-pin hermetically sealed CERDIP for -55C to 125C operation. The UC3705 is specified for a temperature range of 0C to 70C and is available in either a plastic minidip or a 5-pin, power TO-220 package. TRUTH TABLE (1) (2) (1) (2) INV N.I OUT H H L L H H H L L L L L OUT = INV and N.I. OUT = INV and N.i. BLOCK DIAGRAM 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1995-2012, Texas Instruments Incorporated UC1705 UC2705, UC3705 SLUS370D - JULY 1995 - REVISED MARCH 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. CONNECTION DIAGRAMS DIL-8 MINIDIP, SOIC-8 (TOP VIEW) N, JG OR D PACKAGE xxx VS 1 8 N.I. IN VC 2 7 INV. IN N/C 3 OUT 4 6 5-PIN TO-220 (TOP VIEW) T PACKAGE xxx 5 4 3 2 1 N.I. IN INV. IN GND OUT VC + VS LOGIC GND 5 PWR GND N/C 5 17 PWR GND N/C 6 16 OUT N/C 7 15 VC N/C 8 14 9 10 11 12 13 Submit Documentation Feedback N/C N/C N/C N/C 1 20 19 18 N/C 4 VS N/C N/C 2 N/C 2 LOGIC GND INV. IN 3 N/C N.I. IN LCCC-20 (TOP VIEW) FK PACKAGE xxx Copyright (c) 1995-2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 UC1705 UC2705, UC3705 www.ti.com SLUS370D - JULY 1995 - REVISED MARCH 2012 ABSOLUTE MAXIMUM RATINGS (1) VALUE UNIT N-Pkg JG-Pkg T-Pkg Supply Voltage (VIN) 40 40 40 Collector Supply Voltage, VC 40 40 40 Steady-State 500 500 1 A Peak Transient 1.5 1 2 A J V Output current (source or sink) Capacitive Discharge Energy Digital Inputs (2) Power Dissipation at TA = 25C (1) Power Dissipation at TA (Lead/Case) = 25C (1) Operating Temperature Range Storage temperaturee (1) (2) 20 15 50 5.5 5.5 5.5 V 1 1 3 W 3 2 25 W 0 to 70 -55 to 125 0 to 70 C -65 to 150 -65 to 150 -65 to 150 C All currents are positive into, negative out of the specified terminal. Digital Drive can exceed 5.5 V if the input current is limited to 10 mA ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = -55C to +125C for the UC1705, -25C to +85C for the UC2707, and 0C to +70C for the UC3705; VIN = VC = 20 V. TA = TJ. PARAMETER TYP MAX VS = 40 V, outputs high, T package TEST CONDITIONS MIN 6 8 UNIT mA VS Supply current VC = 40 V, outputs low, T package 6 12 mA VC Supply current (N, JG Only) VC = 40 V, outputs low 2 4 mA VC Leakage current (N, JG Only) VS = 0, VC = 30 V 0.05 0.1 mA 0.8 V Digital input low level Digital input high level 2.2 VI = 0 -0.6 -1 mA Input leakage VI = 5 V 0.05 0.1 mA IO = -50 mA VC - VO Output high saturation VO V Input current Output low saturation 2 IO = -500 mA 2.5 IO = -50 mA 0.4 IO = -500 mA 2.5 Thermal shutdown 155 Copyright (c) 1995-2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 Submit Documentation Feedback V V C 3 UC1705 UC2705, UC3705 SLUS370D - JULY 1995 - REVISED MARCH 2012 www.ti.com TYPICAL SWITCHING CHARACTERISTICS VIN = VC = 20 V, TA = 25C. Delays measured to 10% output change. PARAMETER TEST CONDITIONS OUTPUT CL = From Inv. Input to Output UNIT open 1 2.2 nF Rise time delay 60 60 60 ns 10% to 90% rise 20 40 60 ns Fall time delay 60 60 60 ns 90% to 10% fall 25 40 50 ns Rise time delay 90 90 90 ns 10% to 90% rise 20 40 60 ns Fall time delay 60 60 60 ns 90% to 10% fall 25 40 50 ns From N.I. Input to Output VC cross-conduction current spike duration Output rise Output fall 4 Submit Documentation Feedback 25 ns 0 ns Copyright (c) 1995-2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 UC1705 UC2705, UC3705 www.ti.com SLUS370D - JULY 1995 - REVISED MARCH 2012 APPLICATION INFORMATION D1, D2: UC3611 Schottky Diodes Figure 1. Power MOSFET Drive Circuit D1, D2: UC3611 Schottky Diodes Figure 3. Transformer Coupled MOSFET DRIVE Circuit D1 D2 D1, D2: UC3611 Schottky Diodes Figure 2. Power MOSFET Drive Circuit Using Negative Bias Voltage and Level Shifting to Ground Referenced PWMs D1 D2 Figure 4. Charge Pump Circuit Copyright (c) 1995-2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 Submit Documentation Feedback 5 UC1705 UC2705, UC3705 SLUS370D - JULY 1995 - REVISED MARCH 2012 www.ti.com REVISION HISTORY Changes from Revision C (December, 2011) to Revision D * 6 Page Deleted SN54BCT373 from title for FK package image ....................................................................................................... 2 Submit Documentation Feedback Copyright (c) 1995-2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2012 PACKAGING INFORMATION Orderable Device (1) Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) (Requires Login) 5962-9579801M2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-9579801MPA ACTIVE CDIP JG 8 1 TBD Call TI Call TI 5962-9579801VPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type UC1705J ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type UC1705J883B ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type UC1705L883B ACTIVE LCCC FK 20 1 TBD UC2705D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2705DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2705N ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2705NG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3705D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3705DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3705DTR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3705DTRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3705J ACTIVE CDIP JG 8 1 TBD UC3705N ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3705NG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3705T ACTIVE TO-220 KC 5 50 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type UC3705TG3 ACTIVE TO-220 KC 5 50 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type The marketing status values are defined as follows: Addendum-Page 1 POST-PLATE N / A for Pkg Type A42 Samples N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2012 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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OTHER QUALIFIED VERSIONS OF UC1705, UC1705-SP, UC3705, UC3705M : * Catalog: UC3705, UC1705, UC3705M, UC3705 * Military: UC1705 * Space: UC1705-SP NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Military - QML certified for Military and Defense Applications * Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device UC3705DTR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UC3705DTR SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MCER001A - JANUARY 1995 - REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0-15 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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