PD - 9.1356E IRF7416 HEXFET(R) Power MOSFET l l l l l l l Generation V Technology Ultra Low On-Resistance P-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching A D S 1 8 S 2 7 D S 3 6 D G 4 5 D VDSS = -30V RDS(on) = 0.02 Top View Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application. SO-8 Absolute Maximum Ratings ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS EAS dv/dt TJ, TSTG Parameter Max. Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ - 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Peak Diode Recovery dv/dt Junction and Storage Temperature Range -10 -7.1 -45 2.5 0.02 20 370 -5.0 -55 to + 150 Units A W W/C V mJ V/ns C Thermal Resistance Ratings Parameter RJA Maximum Junction-to-Ambient Typ. Max. Units 50 C/W 12/21/05 http://store.iiic.cc/ IRF7416 Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -30 -1.0 5.6 Typ. Max. Units Conditions V VGS = 0V, ID = -250A -0.024 V/C Reference to 25C, ID = -1mA 0.020 VGS = -10V, ID = -5.6A 0.035 VGS = -4.5V, ID = -2.8A V VDS = VGS, ID = -250A S VDS = -10V, ID = -2.8A -1.0 VDS = -24V, VGS = 0V A -25 VDS = -24V, VGS = 0V, TJ = 125C -100 VGS = -20V nA 100 VGS = 20V 61 92 ID = -5.6A 8.0 12 nC VDS = -24V 22 32 VGS = -10V, See Fig. 6 and 9 18 VDD = -15V 49 ID = -5.6A ns 59 RG = 6.2 60 RD = 2.7, See Fig. 10 1700 VGS = 0V 890 pF VDS = -25V 410 = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units -3.1 -45 56 99 -1.0 85 150 A V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = -5.6A, VGS = 0V TJ = 25C, IF = -5.6A di/dt = 100A/s Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 25mH RG = 25, IAS = -5.6A. (See Figure 12) ISD -5.6A, di/dt 100A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board, t 10sec. http://store.iiic.cc/ D G S IRF7416 100 100 VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTTOM - 3.0V VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTTOM - 3.0V TOP -I D , Drain-to-Source Current (A) -I D , Drain-to-Source Current (A) TOP 10 -3.0V 20s PULSE WIDTH TJ = 25C A 1 0.1 1 10 -3.0V 20s PULSE WIDTH TJ = 150C A 1 0.1 10 1 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 2.0 R DS(on) , Drain-to-Source On Resistance (Normalized) -ID , Drain-to-Source Current (A) 100 TJ = 25C TJ = 150C 10 VDS = -10V 20s PULSE WIDTH 1 3.0 3.5 4.0 4.5 5.0 10 -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) 5.5 A -VGS , Gate-to-Source Voltage (V) I D = -5.6A 1.5 1.0 0.5 VGS = -10V 0.0 -60 -40 -20 0 20 40 60 80 TJ , Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature http://store.iiic.cc/ A 100 120 140 160 IRF7416 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = Cds + C gd -V GS , Gate-to-Source Voltage (V) C, Capacitance (pF) 4000 3000 Ciss Coss 2000 1000 Crss 0 1 10 100 I D = -5.6A VDS = -24V VDS = -15V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 9 0 A 0 20 VDS , Drain-to-Source Voltage (V) 60 80 A 100 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 OPERATION IN THIS AREA LIMITED BY RDS(on) -IID , Drain Current (A) -ISD , Reverse Drain Current (A) 40 TJ = 150C 10 TJ = 25C VGS = 0V 1 0.4 0.6 0.8 1.0 A 1.2 -VSD , Source-to-Drain Voltage (V) 100us 10 1ms 10ms TA = 25 C TJ = 150 C Single Pulse 1 0.1 1 10 -VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage http://store.iiic.cc/ 100 IRF7416 QG -10V QGS RD VDS VGS D.U.T. RG QGD VG - + VDD -10V Pulse Width 1 s Duty Factor 0.1 % Charge Fig 9a. Basic Gate Charge Waveform Fig 10a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. td(on) 50K 12V tr t d(off) tf VGS .2F .3F 10% +VDS D.U.T. VGS 90% -3mA VDS IG ID Current Sampling Resistors Fig 9b. Gate Charge Test Circuit Fig 10b. Switching Time Waveforms Thermal Response (Z thJA ) 100 D = 0.50 10 0.20 0.10 0.05 PDM 0.02 1 0.01 t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.1 0.0001 0.001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient http://store.iiic.cc/ 100 IRF7416 D.U.T RG -20V IAS tp VDD A DRIVER 0.01 15V Fig 12a. Unclamped Inductive Test Circuit I AS EAS , Single Pulse Avalanche Energy (mJ) 1000 L VDS ID -2.5A -4.5A BOTTOM -5.6A TOP 800 600 400 200 0 25 50 75 100 125 Starting TJ , Junction Temperatureo( C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms http://store.iiic.cc/ 150 IRF7416 Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + ** RG * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test VGS* + - * VDD * Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements Driver Gate Drive Period P.W. D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [ VDD] Forward Drop Inductor Curent Ripple 5% *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS http://store.iiic.cc/ [ ISD] IRF7416 SO-8 Package Details D DIM B 5 A 8 6 7 6 H E 1 2 3 0.25 [.010] 4 A MIN .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BAS IC 1.27 BAS IC e1 6X e e1 MAX .025 BAS IC 0.635 BAS IC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0 8 0 8 K x 45 C A1 8X b 0.25 [.010] A MILLIMETERS MAX A 5 INCHES MIN y 0.10 [.004] 8X L 8X c 7 C A B FOOTPRINT NOT ES : 1. DIMENSIONING & T OLERANCING PER AS ME Y14.5M-1994. 8X 0.72 [.028] 2. CONTROLLING DIMENS ION: MILLIMETER 3. DIMENSIONS ARE S HOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUS IONS. MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUS IONS. MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010]. 6.46 [.255] 7 DIMENSION IS THE LENGTH OF LEAD FOR S OLDERING T O A SUBST RATE. 3X 1.27 [.050] 8X 1.78 [.070] SO-8 Part Marking EXAMPLE: T HIS IS AN IRF7101 (MOS FET ) INT ERNAT IONAL RECT IFIER LOGO XXXX F7101 DAT E CODE (YWW) P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) Y = LAS T DIGIT OF THE YEAR WW = WEEK A = AS S EMBLY S IT E CODE LOT CODE PART NUMBER http://store.iiic.cc/ IRF7416 Tape & Reel Information SO8 Dimensions are shown in millimeters (inches) TERMINAL NUMBER 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 330.00 (12.992) MAX. 14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/05 http://store.iiic.cc/