LT3585-0/LT3585-1
LT3585-2/LT3585-3
1
3585f
Photofl ash Chargers with
Adjustable Input Current
and IGBT Drivers
The LT®3585 series are highly integrated ICs designed to
charge photofl ash capacitors in digital and fi lm cameras.
A new control technique allows for the use of extremely
small transformers. Each part contains an on-chip high
voltage NPN power switch. Output voltage detection is
completely contained within the part, eliminating the need
for any discrete zener diodes or resistors. The output volt-
age can be adjusted by simply changing the turns ratio
of the transformer.
The CHRG/IADJ pin gives full control of the part to the
user. Driving CHRG/IADJ low puts the part in low power
shutdown. The CHRG/IADJ pin can also be used to reduce
the input current of the charger, useful in extending battery
life. The DONE pin indicates when the part has completed
charging.
The LT3585 series of parts are housed in tiny 3mm ×
2mm DFN packages.
■ Digital/Film Camera Flash
■ PDA/Cell Phone Flash
■ Emergency Strobe
■ Adjustable Input Current
■ Integrated IGBT Driver
■ No Output Voltage Divider Needed
■ Uses Small Transformers: 5.8mm × 5.8mm × 3mm
■ Fast Photofl ash Charge Times
■ Charges Any Size Photofl ash Capacitor
■ Supports Operation from Single Li-Ion Cell, Two AA
Cells or any Supply from 1.5V Up to 16V
■ Small 10-Lead (3mm × 2mm) DFN Package
APPLICATIO S
U
FEATURES DESCRIPTIO
U
TYPICAL APPLICATIO
U
Fast Charge Time
VERSION
INPUT
CURRENT (mA)
NORMAL MODE
CHARGE TIME
(Sec)
REDUCED MODE
CHARGE TIME
(Sec)
LT3585-3 800/400 3.3 6.6
LT3585-0 550/275 4.6 9.2
LT3585-2 400/200 5.8 12.6
LT3585-1* 250/115 5.0 14.6
100µF capacitor, 320V, VIN = VBAT = 3.6V
*50µF capacitor, 320V, VIN = VBAT = 3.6V
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
A
C
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-1
320V
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
TO GATE OF IGBT
3585 TA01a
50µF
PHOTOFLASH
CAPACITOR
0.22µF
4.7µF
VIN
5V
VBAT
2 AA OR
1 TO 2 Li-Ion 1
2
4
5
1:10:2
20Ω TO
160Ω
•
•2.2µF
600V
1M
FLASHLAMP
TRIGGER T
1
2
3
LT3585-1 Photofl ash Charger Uses High Effi ciency
2mm Tall Transformers with Tunable IGBT Gate Drive
LT3585-1 Charging Waveform
Normal Input Current Mode
VOUT
50V/DIV
IIN
500mA/DIV
1sec/DIV 3585 TA01b
VBAT = 3.6V
COUT = 50µF
LT3585-0/LT3585-1
LT3585-2/LT3585-3
2
3585f
VIN Voltage ................................................................16V
VBATT Voltage ............................................................16V
SW Voltage ...............................................................60V
SW Pin Negative Current ...........................................–1A
CHRG/IADJ Voltage ...................................................10V
IGBTPWR Voltage .....................................................10V
IGBTIN Voltage .........................................................10V
IGBTPU Voltage ........................................................10V
IGBTPD Voltage ........................................................10V
DONE Voltage ...........................................................10V
Current Into DONE Pin ............................... 0.2mA/–1mA
Maximum Junction Temperature .......................... 125°C
Operating Temperature Range (Note 2) ... –40°C to 85°C
Storage Temperature Range ................... –65°C to 125°C
(Note 1)
The
● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifi cations
are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Quiescent Current VCHRG = 3V, Not Switching
VCHRG = 0V, In Shutdown
5
0
8
1
mA
µA
VIN Voltage Range ●2.5 16 V
VBAT Voltage Range ●1.5 16 V
Switch Current Limit LT3585-3 (Note 3)
LT3585-0 (Note 3)
LT3585-2 (Note 3)
LT3585-1 (Note 3)
1.55
1.1
0.75
0.45
1.7
1.2
0.85
0.55
1.85
1.3
0.95
0.65
A
A
A
A
Switch VCESAT LT3585-3, ISW = 1.4A
LT3585-0, ISW = 1A
LT3585-2, ISW = 700mA
LT3585-1, ISW = 400mA
485
330
230
140
mV
mV
mV
mV
VOUT Comparator Trip Voltage Measured as VSW – VBAT
●
31
30.5
31.5
31.5
32
32.5
V
V
VOUT Comparator Overdrive 300ns Pulse Width 200 400 mV
DCM Comparator Trip Voltage Measured as VSW – VBAT 80 130 180 mV
CHRG/IADJ Pin Current VCHRG = 3V
VCHRG = 0V
45
0
70
0.1
µA
µA
Switch Leakage Current VBAT = VSW = 5V, In Shutdown ●0.01 1 µA
CHRG/IADJ Minimum Enable Voltage ●1.1 V
ELECTRICAL CHARACTERISTICS
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
TOP VIEW
11
DDB PACKAGE
10-LEAD (3mm × 2mm) PLASTIC DFN
IGBTIN
IGBTPWR
GND
VIN
VBAT
IGBTPU
IGBTPD
SW
CHRG/IADJ
DONE
6
8
7
9
10
5
4
2
3
1
TJMAX = 125°C, θJA = 76°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER DDB PART MARKING
LT3585EDDB-0
LT3585EDDB-1
LT3585EDDB-2
LT3585EDDB-3
LCLK
LCLJ
LCLH
LCFX
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
LT3585-0/LT3585-1
LT3585-2/LT3585-3
3
3585f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Ratings are for DC levels only.
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifi cations
are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
CHRG/IADJ Three-State Voltage for Reduced Input
Current
CHRG/IADJ > 1.1V then Float 1.1 1.28 1.4 V
CHRG/IADJ Voltage Range for Normal Input Current ●1.6 10 V
CHRG/IADJ Low Voltage ●0.3 V
Delay Time for Reduced Input Current Mode CHRG/IADJ Pin Three Stated:
VBAT = 4.2V, Fresh Li-Ion Cell
VBAT = 2.8V, Dead Li-Ion Cell
VBAT = 3V, Fresh 2 AA Cells
VBAT = 2V, Dead 2 AA Cells
5.2
7.2
6.8
9.5
µs
µs
µs
µs
Minimum CHRG/IADJ Pin Low Time High→Low→High 20 µs
DONE Output Signal High 100kΩ from VIN to DONE 3 V
DONE Output Signal Low 33µA into DONE Pin 120 200 mV
DONE Leakage Current VDONE = 3V, DONE NPN Off 1 100 nA
IGBTPWR Voltage Range ●2.5 10 V
IGBT Input High Level ●1.5 V
IGBT Input Low Level ●0.5 V
IGBT Output Rise Time IGBTPU Pin, COUT = 4000pF,
IGBTPWR = 5V, IGBTIN = 0V→1.5V, 10%→90%
0.4 µs
IGBT Output Fall Time IGBTPD Pin, COUT = 4000pF,
IGBTPWR = 5V, IGBTIN = 1.5V→0V, 90%→10%
0.13 µs
Note 2: The LT3585 series is guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: Current limit is guaranteed by design and/or correlation to static
test.
LT3585-0/LT3585-1
LT3585-2/LT3585-3
4
3585f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT3585-0 Charging Waveform
Normal Input Current Mode
LT3585-1 Charging Waveform
Normal Input Current Mode
LT3585-2 Charging Waveform
Normal Input Current Mode
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
VOUT
50V/DIV
0.5s/DIV 3585 G01
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV
VOUT
50V/DIV
2s/DIV 3585 G02
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
500mA/DIV
VOUT
50V/DIV
1s/DIV 3585 G03
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV
LT3585-3 Charging Waveform
Normal Input Current Mode
LT3585-0 Charging Waveform
Reduced Input Current Mode
LT3585-1 Charging Waveform
Reduced Input Current Mode
VOUT
50V/DIV
0.5s/DIV 3585 G04
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV
VOUT
50V/DIV
0.5s/DIV 3585 G05
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV
VOUT
50V/DIV
2s/DIV 3585 G06
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
500mA/DIV
LT3585-2 Charging Waveform
Reduced Input Current Mode
LT3585-3 Charging Waveform
Reduced Input Current Mode
Charge Time*
Normal Input Current Mode
VOUT
50V/DIV
1s/DIV 3585 G07
VBAT = 3.6V
COUT = 50
m
F
AVERAGE
INPUT
CURRENT
1A/DIV
VOUT
50V/DIV
0.5s/DIV 3585 G08
VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV
VBAT (V)
2
CHARGE TIME (SECONDS)
4
6
10
3585 G09
2
046
*USING RUBYCON 330V, 50µF PHOTOFLASH
OUTPUT CAPACITOR (FW SERIES)
8
3579
8
3
5
1
7
LT3585-0
LT3585-1
LT3585-2
LT3585-3
LT3585-0/LT3585-1
LT3585-2/LT3585-3
5
3585f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
Charge Time*
Reduced Input Current Mode
LT3585-0 Input Current
Normal Input Current Mode
LT3585-1 Input Current
Normal Input Current Mode
LT3585-2 Input Current
Normal Input Current Mode
LT3585-3 Input Current
Normal Input Current Mode
LT3585-0 Input Current
Reduced Input Current Mode
LT3585-1 Input Current
Reduced Input Current Mode
LT3585-2 Input Current
Reduced Input Current Mode
LT3585-3 Input Current
Reduced Input Current Mode
VBAT (V)
2
CHARGE TIME (SECONDS)
15
20
25
57 10
3585 G10
10
5
0
34 689
*USING RUBYCON 330V, 50µF PHOTOFLASH
OUTPUT CAPACITOR (FW SERIES)
LT3585-0
LT3585-1
LT3585-2
LT3585-3
VOUT (V)
0
400
500
700
3585 G11
300
200
100 200 300
100
0
600
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
200
250
300
3585 G12
150
100
100 200 300
50
0
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
200
250
450
3585 G13
150
100
100 200 300
50
0
350
400
300
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
400
500
900
3585 G14
300
200
100 200 300
100
0
700
800
600
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
200
250
350
3585 G15
150
100
100 200 300
50
0
300
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
80
100
120
3585 G16
60
40
100 200 300
20
0
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
200
250
3585 G17
150
100
100 200 300
50
0
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VOUT (V)
0
200
250
500
450
3585 G18
150
100
100 200 300
50
0
350
400
300
INPUT CURRENT (mA)
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
LT3585-0/LT3585-1
LT3585-2/LT3585-3
6
3585f
LT3585-0 Effi ciency
Normal Input Current Mode
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G19
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6-1 TRANSFORMER
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G19
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6S-1 TRANSFORMER
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G21
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6-1 TRANSFORMER
LT3585-1 Effi ciency
Normal Input Current Mode
LT3585-2 Effi ciency
Normal Input Current Mode
LT3585-3 Effi ciency
Normal Input Current Mode
LT3585-0 Effi ciency
Reduced Input Current Mode
LT3585-1 Effi ciency
Reduced Input Current Mode
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G23
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6-1 TRANSFORMER
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G24
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6S-1 TRANSFORMER
LT3585-2 Effi ciency
Reduced Input Current Mode
LT3585-3 Effi ciency
Reduced Input Current Mode LT3585-0 Output Voltage
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G25
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING KIJIMA SBL-5.6-1 TRANSFORMER
VBAT (V)
2
322
VOUT (V)
324
326
328
330
3456
3585 G27
78
TA = –40°C
TA = 25°C
TA = 85°C
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G22
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING TDK LDT565630T-041
TRANSFORMER
VOUT (V)
50
50
EFFICIENCY (%)
60
70
80
90
100 150 200 250
3585 G26
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
USING TDK LDT565630T-041
TRANSFORMER
LT3585-0/LT3585-1
LT3585-2/LT3585-3
7
3585f
LT3585-1 Output Voltage LT3585-2 Output Voltage LT3585-3 Output Voltage
LT3585-0 Switch Waveform
Normal Input Current Mode
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
VBAT (V)
2
310
VOUT (V)
312
314
316
318
322
3456
3585 G28
78
320
TA = –40°C
TA = 25°C
TA = 85°C
VBAT (V)
2
314
VOUT (V)
316
318
330
322
326
3456
3585 G29
78
324
TA = –40°C
TA = 25°C
TA = 85°C
VBAT (V)
2
320
VOUT (V)
322
324
326
328
330
3456
3585 G30
78
TA = –40°C
TA = 25°C
TA = 85°C
VSW
10V/DIV
IPRI
1A/DIV
2µs/DIV 3585 G31
VBAT = 3.6V
VOUT = 100V
LT3585-0 Switch Waveform
Reduced Input Current Mode
VSW
10V/DIV
IPRI
1A/DIV
2µs/DIV 3585 G32
VBAT = 3.6V
VOUT = 100V
LT3585-0 Switch Waveform
Normal Input Current Mode
VSW
10V/DIV
IPRI
1A/DIV
2µs/DIV 3585 G33
VBAT = 3.6V
VOUT = 300V
LT3585-0 Switch Waveform
Reduced Input Current Mode Switch DC Current Limit*
LT3585-0/LT3585-1/LT3585-2/
LT3585-3 Switch Breakdown
Voltage
VSW
10V/DIV
IPRI
1A/DIV
2µs/DIV 3585 G34
VBAT = 3.6V
VOUT = 300V
TEMPERATURE (°C)
–50
0
CURRENT LIMIT (A)
0.3
0.6
0.9
1.2
–10 20
*DYNAMIC CURRENT LIMIT IS HIGHER
THAN DC CURRENT LIMIT
6040 80
3585 G35
1.5
1.8
–30 10 30
LT3585-3
LT3585-0
LT3585-2
LT3585-1
SWITCH VOLTAGE (V)
0
SWITCH CURRENT (mA)
6
8
10
80
3585 G36
4
2
5
7
9
3
1
02010 4030 60 70 90
50 100
TA = –40°C
TA = 25°C
TA = 85°C
SW PIN IS RESISTIVE UNTIL BREAKDOWN
VOLTAGE DUE TO INTEGRATED RESISTORS.
THIS DOES NOT INCREASE QUIESCENT
CURRENT OF THE PART
LT3585-0/LT3585-1
LT3585-2/LT3585-3
8
3585f
UU
U
PI FU CTIO S
IGBTIN (Pin 1): Logic Input for the IGBT Driver. When this
pin is driven higher than 1.5V, the output goes high. When
the pin is below 0.5V, the output will go low.
IGBTPWR (Pin 2): Supply Pin for the IGBT Driver. Must be
locally bypassed with a good quality ceramic capacitor. The
minimum operating voltage for the IGBT driver is 2.5V.
GND (Pin 3): Ground. Tie directly to local ground plane.
VIN (Pin 4): Input Supply Pin. Must be locally bypassed
with a good quality ceramic capacitor. The minimum
operating voltage for VIN is 2.5V.
VBAT (Pin 5): Battery Supply Pin. Must be locally bypassed
with a good quality ceramic capacitor. The minimum
operating voltage for VBAT is 1.5V.
DONE (Pin 6): Open NPN Collector Indication Pin. When
target output voltage is reached, NPN turns on. This pin
needs a proper pull-up resistor or current source.
CHRG/IADJ (Pin 7): Charge and Input Current Adjust Pin.
A low (<0.3V) to high (>1.1V) transition on this pin puts
the part into power delivery mode. Once the target output
voltage is reached, the part will stop charging the output.
Toggle this pin to start charging again. Ground to shut
down. To enter into the input current reduction mode, the
voltage on this pin should be driven high ( >1.1V ) and
then fl oated. (For more information refer to the Operation
section of this data sheet.) To enter normal mode, the
voltage should be driven higher than 1.6V.
SW (Pin 8): Switch Pin. This is the collector of the internal
NPN Power switch. Minimize the metal trace area connected
to this pin to minimize EMI. Tie one side of the primary
of the transformer to this pin. The target output voltage
is set by the turns ratio of the transformer.
Choose turns ratio N by the following equation:
NVOUT
=+2
31 5.
where VOUT is the desired output voltage.
IGBTPD (Pin 9): Pull-down Output for IGBT Gate. Connect
this pin to the IGBT Gate. Add a series resistor to increase
the turn-off time to protect the IGBT.
IGBTPU (Pin 10): Pull-up Output for IGBT Gate. Connect
this pin to the gate of the IGBT.
Exposed Pad (Pin 11): Ground. Tie directly to local ground
plane.
LT3585-0/LT3585-1
LT3585-2/LT3585-3
9
3585f
SI PLIFIED
W
BLOCK DIAGRA
W
–
+
–
+
–
+
–
+
1.25V
REFERENCE
VARIABLE
DELAY
SWITCH
LATCH
RESET
DOMINANT
S
DRIVER
20mV
RQ
VOUT
COMPARATOR
DCM
COMPARATOR
Q1
ENABLE
MASTER
LATCH
CHRG/IADJ
UVLO
UVLO
2.5V
MAX
VBAT
Q2
1.5V
MAX
CHIP
POWER
A5 A4
QQ
RS
ONE SHOT
IGBT DRIVE
CIRCUITRY
R1
2.5k
R2
60k
VIN
VIN
TO BATTERY
C2
46
DONE
7
IGBTPWR
2
IGBTIN
1
Q3
–
+
5SW
D1
VOUT
SECONDARY
PRIMARY
T1
•
•
+
–
+–
A3
A2
Q1
RM
LT3585-3, RM = 12mΩ
LT3585-0, RM = 17mΩ
LT3585-2, RM = 24mΩ
LT3585-1, RM = 36mΩ
130mV
GND 3
IGBTPU 10
IGBTPD
3585 F01
9
8
C1
+
COUT
A1
Figure 1
LT3585-0/LT3585-1
LT3585-2/LT3585-3
10
3585f
OPERATIO
U
The LT3585 series of parts operate on the edge of dis-
continuous conduction mode. When CHRG/IADJ is driven
higher than 1.1V, the master latch is set. This enables the
part to deliver power to the photofl ash capacitor. When
the power switch, Q1, is turned on, current builds up in
the primary of the transformer. When the desired current
level is reached, the output of comparator A1 goes high,
resetting the switch latch that controls the state of Q1, and
the output of the DCM comparator goes low. Q1 now turns
off and the fl yback waveform on the SW node quickly rises
to a level proportional to VOUT. The secondary current fl ows
through high voltage diode(s), D1, and into the photofl ash
capacitor. When the secondary current decays to zero,
the voltage on the SW node collapses. When this voltage
reaches 130mV higher than VBAT, the output of A3 goes
high. This sets the switch latch and the power switch, Q1,
turns back on. This cycle repeats until the target VOUT level
is reached. When the target VOUT is reached, the master
latch resets and the DONE pin goes low.
The input current of an LT3585 series circuit can be
reduced by changing the voltage of the CHRG/IADJ pin.
When this pin is between 1.1V and 1.4V, a time delay is
added between when A3 goes high and the switch latch
is set, see Figure 2. If the part is enabled, and the CHRG/
IADJ pin is fl oated, internal circuitry drives the voltage on
the pin to 1.28V. This allows a single I/O port pin, which
can be three-stated, to enable or disable the part as well
as place the part into the input current reduction mode.
This feature effectively reduces the average input current
into the fl yback transformer. The magnitude of the delay
decreases with increasing VBAT. This causes the reduced
average input current to remain relatively fl at with changes
in VBAT. When CHRG/IADJ is brought higher than 1.6V,
no delay is added. The CHRG/IADJ pin functionality is
shown in Figure 3.
Both VBAT and VIN have undervoltage lockout (UVLO). When
one of these pins goes below its UVLO voltage, the DONE
pin goes low. With an insuffi cient bypass capacitor on VBAT
or VIN, the ripple on the pin is likely to activate UVLO and
terminate the charge. The applications circuits in the data
sheet suggest values adequate for most applications.
The LT3585 series also includes an integrated IGBT driver.
There are two output pins, IGBTPU and IGBTPD. The
IGBTPU pin is used to pull the gate of the IGBT up. This
should be done quickly to guarantee proper Xenon lamp
ignition. Tie this pin directly to the gate of the IGBT. The
IGBTPD pin is pinned out separately to allow for greater
fl exibility in choosing a series resistor between the pin and
the gate of the IGBT. This resistor can be used to slow
down the turn off of the IGBT.
IPRI
VSW
TIME
VSW
TIME
3585 F02
TIME
IPRI
TIME
Extra Delay Added
(~5.2µs at VBAT = 4.2V)
Normal Operation
CHRG/IADJ ≥ 1.6V
Reduced Input Current
CHRG/IADJ Three Stated
Fi
gure
3
.
B
as
i
c
O
pera
ti
on
Fi
gure
2
.
N
orma
l
an
d
R
e
d
uce
d
I
npu
t
C
urren
t
W
ave
f
orms
VOUT
100V/DIV
DONE
2V/DIV
CHRG/IADJ
2V/DIV
LT3585-1
VBAT = 3.6V
COUT = 50µF
*MUST TAKE CHRG/IADJ PIN ABOVE 1.1V, THEN FLOAT
1sec/DIV
<0.3V <0.3V <0.3V3V 3V
THREE
STATE*
CHRG/IADJ PIN STATE
3585 F03
LT3585-0/LT3585-1
LT3585-2/LT3585-3
11
3585f
APPLICATIO S I FOR ATIO
WUUU
Choosing the Right Device
(LT3585-0/LT3585-1/LT3585-2/LT3585-3)
The only difference between the four versions of the
LT3585 series is the peak current level. For the fastest
possible charge time, use the LT3585-3. The LT3585-1
has the lowest peak current capability, and is designed
for applications that need a more limited drain on the
batteries. Due to the lower peak current, the LT3585-1
can use a physically smaller transformer. The LT3585-0
and LT3585-2 have a current limit in between that of the
LT3585-1 and the LT3585-3.
Transformer Design
The fl yback transformer is a key element for any LT3585-0/
LT3585-1/LT3585-2/LT3585-3 design. It must be designed
carefully and checked that it does not cause excessive cur-
rent or voltage on any pin of the part. The main parameters
that need to be designed are shown in Table 1. The fi rst
transformer parameter that needs to be set is the turns
ratio, N. The LT3585-0/LT3585-1/LT3585-2/LT3585-3
accomplish output voltage detection by monitoring the
fl yback waveform on the SW pin. When the SW voltage
reaches 31.5V higher than the VBAT voltage, the part halts
power delivery. Thus, the choice of N sets the target output
voltage and changes the amplitude gain of the refl ected
voltage from the output to the SW pin. Choose N according
to the following equation:
NVOUT
=+2
31 5.
where VOUT is the desired output voltage. The number 2
in the numerator is used to include the forward voltage
drop across the output diode(s). Thus, for a 320V output,
N should be 322/31.5 or 10.2. For a 300V output, choose
N equal to 302/31.5 or 9.6. The next parameter that needs
to be set is the primary inductance, LPRI. Choose LPRI
according to the following formula:
LV
NI
PRI OUT
PK
≥••
•
–
200 10 9
where VOUT is the desired output voltage. N is the trans-
former turns ratio. IPK is 1.4 (LT3585-0), 0.7 (LT3585-1),
1 (LT3585-2) and 2 (LT3585-3). LPRI needs to be equal
or larger than this value to ensure that the LT3585 series
has adequate time to respond to the fl yback waveform.
All other parameters need to meet or exceed the recom-
mended limits as shown in Table 1. A particularly important
parameter is the leakage inductance, LLEAK. When the
power switch of the LT3585 series turns off, the leakage
inductance on the primary of the transformer causes a
voltage spike to occur on the SW pin. The height of this
spike must not exceed 50V, even though the absolute
maximum rating of the SW pin is 60V. The 60V absolute
maximum rating is a DC blocking voltage specifi cation,
which assumes that the current in the power NPN is zero.
Figure 4 shows the SW voltage waveform for the circuit
of Figure 8 (LT3585-0). Note that the absolute maximum
rating of the SW pin is not exceeded. Make sure to check
the SW voltage waveform with VOUT near the target output
voltage, as this is the worst-case condition for SW volt-
age. Figure 5 shows the various limits on the SW voltage
during switch turn off.
Table 1. Recommended Transformer Parameters
PARAMETER NAME
TYPICAL RANGE
LT3585-0
TYPICAL RANGE
LT3585-1
TYPICAL RANGE
LT3585-2
TYPICAL RANGE
LT3585-3 UNITS
LPRI Primary Inductance >5 >10 >7 >3.5 µH
LLEAK Primary Leakage Inductance 100 to 300 200 to 500 200 to 500 100 to 300 nH
N Secondary/Primary Turns Ratio 8 to 12 8 to 12 8 to 12 8 to 12
VISO Secondary to Primary Isolation
Voltage
>500 >500 >500 >500 V
ISAT Primary Saturation Current >1.6 >0.8 >1.0 >2 A
RPRI Primary Winding Resistance <300 <500 <400 <200 mΩ
RSEC Secondary Winding Resistance <40 <80 <60 <30 Ω
LT3585-0/LT3585-1
LT3585-2/LT3585-3
12
3585f
APPLICATIO S I FOR ATIO
WUUU
It is important not to minimize the leakage inductance to
a very low level. Although this would result in a very low
leakage spike on the SW pin, the parasitic capacitance of the
transformer would become large. This will adversely affect
the charge time of the photofl ash circuit. Linear Technology
has worked with several leading magnetic component man-
ufacturers to produce predesigned fl yback transformers
for use with the LT3585-0 /LT3585-1/LT3585-2/LT3585-3.
Table 2 shows the details of several of these transformers.
Output Diode Selection
The rectifying diode(s) should be low capacitance type
with suffi cient reverse voltage and forward current rat-
ings. The peak reverse voltage that the diode(s) will see
is approximately:
V
PK(R) = VOUT + (N • VBAT)
The peak current of the diode is simply:
INLT
INLT
PK SEC
PK SEC
()
()
.
=
()
=
23585 3
14 358
-
55
13585 2
07
-0
-
()
=
()
=
INLT
IN
PK SEC
PK SEC
()
()
.LT3585 1-
()
For the circuit of Figure 8 with VBAT of 5V, VPK(R) is 371V
and IPK(SEC) is 137mA. The GSD2004S dual silicon diode
is recommended for most applications. Table 3 shows
the various diodes and relevant specifi cations. Use the
appropriate number of diodes to achieve the necessary
reverse breakdown voltage.
Capacitor Selection
For the input bypass capacitors, high quality X5R or X7R
types should be used. Make sure the voltage capability of
the part is adequate.
MUST BE
LESS THAN 60V
MUST BE
LESS THAN 50V
3585 F05
A
B
VSW
0V
Fi
gure
4
.
LT3585
SW
V
o
lt
age
W
ave
f
orm
Figure 5. New Transformer Design Check
Table 2. Predesigned Transformers—Typical Specifi cations Unless Otherwise Noted
FOR USE
WITH
TRANSFORMER
DESIGNATION
SIZE
(W × L × H) (mm)
LPRI
(µH)
LPRI LEAKAGE
(nH ) N
RPRI
(mΩ)
RSEC
(Ω) VENDOR
LT3585-1
LT3585-0/
LT3585-2
SBL-5.6S-1
SBL-5.6-1
5.6 × 8.5 × 3.0
5.6 × 8.5 × 4.0
24
10
400 Max
200 Max
10.2
10.2
305
103
55
26
Kijima Musen
Hong Kong Offi ce
852-2489-8266
LT3585-1
LT3585-0
LT3585-1
LT3585-2
LT3585-3
LDT565620ST-203
LDT565630T-001
LDT565630T-002
LDT565630T-003
LDT565630T-041
5.8 × 5.8 × 2.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
8.2
6
14.5
10.5
4.7
390 Max
200 Max
500 Max
550 Max
150 Max
10.2
10.4
10.2
10.2
10.4
370 Max
100 Max
240 Max
210 Max
90 Max
11.2 Max
10 Max
16.5 Max
14 Max
6.4 Max
TDK
Chicago Sales Offi ce
(847) 803-6100
www.components.tdk.com
LT3585-0
LT3585-1
LT3585-2
LT3585-3
TTRN-0530-000-T
TTRN-0530-012-T
TTRN-0530-021-T
TTRN-0530-022-T
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
6.6
16.0
11.8
4.0
200 Max
400 Max
300 Max
300 Max
10.3
10.3
10.3
10.3
128 Max
515 Max
256 Max
102 Max
28 Max
32 Max
37 Max
16 Max
Tokyo Coil Engineering
Japan Offi ce
0426-56-6262
VSW
10V/DIV
100ns/DIV 3585 F04
VBAT = 3.6V
VOUT = 320V
LT3585-0/LT3585-1
LT3585-2/LT3585-3
13
3585f
APPLICATIO S I FOR ATIO
WUUU
IGBT Drive
The IGBT is a high current switch for the 100A+ current
through the photofl ash lamp. To create a redeye effect or
to adjust the light output, the lamp current needs to be
stopped or quenched with an IGBT before discharging
the photofl ash capacitor fully. The IGBT device also con-
trols the 4kV trigger pulse required to ionize the Xenon
gas in the photofl ash lamp. Figure 8 is a schematic of a
fully functional photofl ash application with the LT3585-0
serving as the IGBT driver. An IGBT driver charges the
gate capacitance to start the fl ash. The IGBT driver does
not need to pull up the gate signifi cantly fast because of
the inherently slow nature of the IGBT. A rise time of 2µs
is suffi cient to charge the gate of the IGBT and create a
trigger pulse. With slower rise times, the trigger circuitry
will not have a fast enough edge to create the required
4kV pulse. The fall time of the IGBT driver is critical to the
Fi
gure
6
.
IGBT
D
r
i
ver
O
u
t
pu
t
w
ith
4000
p
F
L
oa
d
Fi
gure
7
.
IGBT
T
urn-
Off
D
e
l
ay vs
R
PD
Table 3. Recommended Output Diodes
PART
MAX REVERSE
VOLTAGE (V)
MAX CONTINUOUS
FORWARD CURRENT (mA) CAPACITANCE (pF) VENDOR
GSD2004S
(DUAL DIODE)
2 × 300 225 5 Vishay
(402) 563-6866
www.vishay.com
CMSD2004S
(DUAL DIODE)
2 × 300 225 5 Central Semiconductor
(631) 435-1110
www.centralsemi.con
MMBD3004S
(DUAL DIODE)
2 × 350 225 5 Diodes, Inc
(816) 251-8800
www.diodes.com
safe operation of the IGBT. The IGBT gate is a network of
resistors and capacitors, as shown in Figure 9. When the
gate terminal is pulled low, the capacitance closest to the
terminal goes low but the capacitance further from the
terminal remains high. This causes a smaller portion of
the device to handle a larger portion of the current, which
can damage the device. The pull-down circuitry needs to
pull down slower than the internal RC time constant in
the gate of the IGBT. This is easily accomplished with a
resistor placed in series with the IGBTPD pin.
The LT3585 series integrated IGBT drive circuit is indepen-
dent of the charging function and draws its power from
the IGBTPWR pin. The drive pulls high to within 200mV
of IGBTPWR and pulls down to 100mV. The circuit’s
switching waveform is shown in Figure 6. The rise and fall
times are measured using a 4000pF output capacitor. The
typical 10% to 90% rise time is 320ns when IGBTPWR
IGBTIN
1V/DIV
IGBTOUT
2V/DIV
500ns/DIV 3585 F06
IGBTPWR = 5V
COUT = 4000pF
RPD = 50ΩRPD (Ω)
0
0
FALL TIME (µs)
0.2
0.6
0.8
1.0
2.0
1.4
50 100
3585 F07
0.4
1.6
1.8
1.2
150 200
LT3585-0/LT3585-1
LT3585-2/LT3585-3
14
3585f
Table 4. Recommended IGBTs
PART DRIVE VOLTAGE (V) BREAKDOWN VOLTAGE (V)
COLLECTOR CURRENT
(PULSED) (A) VENDOR
CY25CAH-8F*
CY25CAJ-8F*
CY25BAH-8F
CY25BAJ-8F
2.5
4
2.5
4
400
400
400
400
150
150
150
150
Renesas
(408) 382-7500
www.renesas.com
GT8G133 4 400 150 Toshiba Semiconductor
(949) 623-2900
www.semicon.toshiba.co.jp/eng
*Packaged in 8-lead VSON-8 pacakge.
APPLICATIO S I FOR ATIO
WUUU
Figure 8. Complete Xenon Circuit
EMITTER
3585 F09
GATE
Figure 9. IGBT Gate
is 5V and IGBTIN is driven by a 5V signal. The typical
90% to 10% fall time is 125ns but varies with RPD given
by Figure 7. The IGBT driver pulls a peak of 50mA when
driving an IGBT with minimal quiescent current. In the
low state, an active pull-down network is used during the
initial transition but is deactivated after an internal time
constant. This allows the IGBT driver’s quiescent current
to drop to approximately 0.1µA during idle conditions.
The pull-down circuit will clamp the output below 0.8V for
currents not exceeding 10mA in its idle state. The pull-up
network is always active when the IGBTIN is greater than
1.5V. Table 4 is a list of recommended IGBT devices for
strobe applications. These devices are all packaged in
8-lead TSSOP packages unless otherwise noted.
A
C
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-0
320V
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
TO GATE OF IGBT
3585 F08
C2
50
m
F
PHOTOFLASH
CAPACITOR
C3
0.22
m
F
C1
4.7
m
F
VIN
5V
VBAT
2 AA OR
1 TO 2 Li-Ion
D1
1
2
4
5
T1
1:10:2
RPD
20
W
TO 160
W
•
•C4
2.2
m
F
600V
R1
1M
FLASHLAMP
TRIGGER T
1
2
3
LT3585-0/LT3585-1
LT3585-2/LT3585-3
15
3585f
APPLICATIO S I FOR ATIO
WUUU
Board Layout
The high voltage operation of these parts demand care-
ful attention to board layout. You will not get advertised
performance with careless layout. Figure 10 shows the
recommended component placement. Keep the area for the
high voltage end of the secondary as small as possible. Also
note the larger than minimum spacing for all high voltage
nodes in order to meet breakdown voltage requirements for
the circuit board. It is imperative to keep the electrical path
formed by C1, the primary of T1, and the LT3585 series IC
as short as possible. If this path is haphazardly made long,
Figure 10. LT3585 Suggested Layout
it will effectively increase the leakage inductance of T1,
which may result in an overvoltage condition on the SW
pin. The CHRG/IADJ pin trace should be kept as short as
possible while minimizing the adjacent edge with the SW
pin trace. This will eliminate false toggling of the CHRG/IADJ
pin during sharp transitions on the SW pin. Thermal vias
should be added underneath the Exposed Pad, Pin 11, to
enhance the LT3585’s thermal performance. These vias
should go directly to a large area of ground plane. Acting
as a heat sink, the thermal vias/ground plane will lower
the device’s operating temperature.
1
2
3
4
5
10
9
8
7
6
11
THERMAL
VIAS
IGBTIN
VOUT
D1 (DUAL DIODE)
PHOTOFLASH
CAPACITOR
IGBTPWR
GND
VIN
VBAT
VBAT
C2
C1
3585 F10
T1
R2
R1
GND DONE CHRG
•
•
TO GATE OF IGBT
LT3585-0/LT3585-1
LT3585-2/LT3585-3
16
3585f
Figure 11. LT3585-0 Photofl ash Charger Uses High Effi ciency 3mm Tall Transformer
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-0
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-001, LPRI = 6µH, N = 10.4
3585 F11
COUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
VIN
2.5V TO 8V
DONE
CHARGE
VBAT
1.5V TO 8V
D1
T1
1:10.4
R2
20Ω TO 160Ω
•
•
Figure 12. LT3585-1 Photofl ash Charger Uses High Effi ciency 2mm Tall Transformer
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-1
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: LTD565620ST-203, LPRI = 8.2µH, N = 10.2
3585 F12
COUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
VIN
2.5V TO 8V
DONE
CHARGE
VBAT
1.5V TO 8V
D1
T1
1:10.2
R2
20Ω TO 160Ω
•
•
TYPICAL APPLICATIO S
U
LT3585-0/LT3585-1
LT3585-2/LT3585-3
17
3585f
Figure 13. LT3585-2 Uses High Effi ciency 3mm Tall Transformers
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-2
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-003, LPRI = 10.5µH, N = 10.2
3585 F13
COUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
VIN
2.5V TO 8V
DONE
CHARGE
VBAT
1.5V TO 8V
D1
T1
1:10.2
R2
20Ω TO 160Ω
•
•
TYPICAL APPLICATIO S
U
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-3
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-041, LPRI = 4.7µH, N = 10.4
3585 F14
COUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
VIN
2.5V TO 8V
DONE
CHARGE
VBAT
1.5V TO 8V
D1
T1
1:10.4
R2
20Ω TO 160Ω
•
•
Figure 14. LT3585-3 Uses High Effi ciency 3mm Tall Transformers
LT3585-0/LT3585-1
LT3585-2/LT3585-3
18
3585f
TYPICAL APPLICATIO S
U
5
46
1 2 3
U1
VIN
3585 F15
TO
DONE
R3
100k
1/10W
0402
R1
5k
1/10W
0402
RT
100k
CT
0.1
m
F
ENABLE
TO
CHRG/IADJ
U1: PANASONIC UP04979 COMPOSITE TRANSISTORS
Figure 15. Auto Refresh Application
VOUT
100V/DIV
CHRG/IADJ
2V/DIV
ENABLE
2V/DIV
2sec/DIVLT3585-1
COUT = 50µF
ENABLE < 0.3V
ENABLE > 1.1V
NORMAL OP.
AUTO
REFRESH
AUTO
REFRESH
ENABLE
<0.3V
ENABLE
>1.1V
ENABLE < 0.3V
3585 F16
VOUT
2V/DIV
AC RIPPLE
CHRG/IADJ
2V/DIV
200ms/DIVLT3585-1
COUT = 50µF
3585 F17
Figure 16. Auto Refresh Basic Operation
Figure 17. VOUT AC Ripple in Auto Refresh Mode
The LT3585 series can be auto-refreshed using the addi-
tional circuitry shown in Figure 15 with its basic operation
shown in Figure 16. The ENABLE pin is used to enable
or disable the auto-refresh charging mode. Without an
auto-refresh circuit, the output voltage will droop due to
output capacitor and output diode leakage currents. The
circuit in Figure 15 uses the DONE and CHRG/IADJ pins
to form an open-loop control scheme. The output voltage
target is sensed through the DONE pin with the PFET of
U1, Panasonic UP04979 composite transistor. When the
DONE pin goes low during the VOUT trip condition, the
PFET charges the auto-refresh timing node comprised
of RT and CT, and in turn, pulls the CHRG/IADJ pin low
through a NFET and disables the LT3585 series part. The
DONE pin immediately goes high in shutdown, releasing
the timing node and allowing the voltage at Pins 2 and 3
to decay. After approximately a RTCT time constant, the
CHRG/IADJ pin is released and the LT3585 series part is
enabled. This cycle is repeated to maintain a constant DC
output voltage. The open-loop control method places a
constraint on the control loop dominant time constant,
RT • CT, given by:
RC IL
IV
TT PK PRI
LK BAT
>22
••
•
where ILK is the known leakage current, IPK is the trans-
former peak primary current, and LPRI is the transformer
primary inductance. If this condition is not met, a runaway
condition could occur. The LT3585 series part would
continue to charge the output voltage past the internal
output trip voltage. Figure 17 shows the AC ripple of a
typical auto-refresh circuit with the proper selection of
RT and CT.
LT3585-0/LT3585-1
LT3585-2/LT3585-3
19
3585f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1722 Rev Ø)
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.64 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.39 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
15
106
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB10) DFN 0905 REV Ø
0.25 ± 0.05
0.50 BSC
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
0.25 ± 0.05
2.39 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.64 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.50 BSC
LT3585-0/LT3585-1
LT3585-2/LT3585-3
20
3585f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 0706 • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
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DC/DC Converter
96% Effi ciency, VIN: 2.5V to 5.5V, VOUT: 0.6V to 5V, IQ = 40µA,
Converter ISD <1µA, 10-Lead MSE/10-Lead DFN Packages
LT3420/LT3420-1 1.4A/1A, Photofl ash Capacitor Chargers with Charges
Automatic Top-Off
Charges 220µF to 320V in 3.7 Seconds from 5V, Automatic Top-Off
VIN: 2.2V to 16V, IQ = 90µA, ISD < 1µA, 10-Lead MS/10-Lead DFN
Packages
LTC3425 3A (IOUT), 8MHz, 4-Phase Synchronous Step-Up
DC/DC Converter
95% Effi ciency, VIN: 0.5V to 4.5V, VOUT: 2.4V to 5.25V, IQ = 12µA,
ISD < 1µA, 32-Lead 5mm × 5mm QFN Package
LTC3440 600mA (IOUT), Synchronous Buck-Boost DC/DC
Converter
95% Effi ciency, VIN: 2.5V to 5.5V, VOUT: 2.5V to 5.5V,
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LT3463/LT3463A Dual Boost (250mA)/Inverting (250mA/400mA) DC/DC
Converter for CCD Bias
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Converter for CCD Bias, IQ = 40µA, ISD < 1µA, 10-LeadDFN Package
LT3468 Photofl ash Capacitor Charger in ThinSOTTM Package Charges 100µF to 320V in 4.6 Seconds from 3.6V, VIN: 2.5V to 16V,
IQ = 5mA, ISD < 1µA, 5-Lead TSOT-23 Package
LT3472 Dual ±34V, 1.2MHz Boost (350mA)/Inverting (400mA)
DC/DC Converter for CCD Bias
Integrated Schottkys, VIN: 2.2V to 16V, VOUT(MAX) = ±34V, DC/DC
Converter for CCD Bias IQ = 2.8mA, ISD < 1µA, 10-Lead DFN Package
LT3484-0/LT3484-1
LT3484-2
Photofl ash Capacitor Chargers Charges 100µF to 320V in 4.6 Seconds from 3.6V,
LT3484-0 VIN: 2.5V to 16V, VBAT: 1.8V to 16V, IQ = 5mA, ISD < 1µA,
6-lead 2mm × 3mm DFN Package
LT3485-0/LT3485-1
LT3485-2/LT3485-3
Photofl ash Capacitor Charger with Output Voltage
Monitor and Integrated IGBT Drive
Charges 100µF Capacitor to 320V in 2.5 Seconds from 3.6V.
VIN: 1.8V to 10V, IQ = 5mA, ISD < 1µA, 10-Lead 3mm × 3mm DFN
Package
ThinSOT is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Figure 18. LT3585-3 Typical Application
+
DONE
CHRG/IADJ
VIN
IGBTPWR
IGBTIN IGBTPU
IGBTPD
VBAT SW
GND
LT3585-3
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TOKYO COIL TTRN-0530-022-T, LPRI = 4µH, N = 10.3
3585 F18
COUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
VIN
2.5V TO 8V
DONE
CHARGE
VBAT
1.5V TO 8V
D1
T1
1:10.3
R2
20Ω TO 160Ω
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