HCS362 KEELOQ(R) Code Hopping Encoder FEATURES PACKAGE TYPES Security PDIP, SOIC S0 1 S1 2 S2 3 S3/RFEN 4 TSSOP Operation * * * * * * 2.0V - 6.3V operation Four button inputs 15 functions available Selectable baud rates and code word blanking Programmable minimum code word completion Battery low signal transmitted to receiver with programmable threshold * Non-volatile synchronization data * PWM and Manchester modulation S2 S3/RFEN VSS DATA * * * * * * * * 60-bit seed vs. 32-bit seed 2-bit CRC for error detection 28/32-bit serial number select Tunable oscillator (+/ -10% over specified voltage ranges) Time bits option Queue bits TSSOP package Programmable Time-out and Guard Time (c) 2011 Microchip Technology Inc. VDD 7 LED/SHIFT 6 DATA 5 VSS S1 S0 VDD LED/SHIFT Oscillator RESET Circuit LED RFEN LED Driver DATA VSS Power Latching and Switching Controller PLL Driver EEPROM RF Enable output - PLL interface Easy to use programming interface On-chip EEPROM On-chip tunable oscillator and timing components Button inputs have internal pull-down resistors Current limiting on LED output Minimum component count Enhanced Features Over HCS300 8 7 6 5 8 HCS362 BLOCK DIAGRAM Other * * * * * * * 1 2 3 4 HCS362 Programmable 28/32-bit serial number Two programmable 64-bit encryption keys Programmable 60-bit seed Each transmission is unique 69-bit transmission code length 32-bit hopping code 37-bit fixed code (28/32-bit serial number, 4/0-bit function code, 1-bit status, 2-bit CRC/time, 2-bit queue) * Encryption keys are read protected HCS362 * * * * * * * Encoder 32-bit Shift Register SHIFT VDD Button Input Port S3 S2 S1 S0 Typical Applications The HCS362 is ideal for Remote Keyless Entry (RKE) applications. These applications include: * * * * * * Automotive RKE systems Automotive alarm systems Automotive immobilizers Gate and garage door openers Identity tokens Burglar alarm systems DS40189E-page 1 HCS362 GENERAL DESCRIPTION The HCS362 is a code hopping encoder designed for secure Remote Keyless Entry (RKE) systems. The HCS362 utilizes the KEELOQ(R) code hopping technology, which incorporates high security, a small package outline and low cost, to make this device a perfect solution for unidirectional remote keyless entry systems and access control systems. The HCS362 combines a 32-bit hopping code generated by a nonlinear encryption algorithm, with a 28/32-bit serial number and 9/5 status bits to create a 69-bit transmission stream. The length of the transmission eliminates the threat of code scanning. The code hopping mechanism makes each transmission unique, thus rendering code capture and resend (code grabbing) schemes useless. The crypt key, serial number and configuration data are stored in an EEPROM array which is not accessible via any external connection. The EEPROM data is programmable but read protected. The data can be verified only after an automatic erase and programming operation. This protects against attempts to gain access to keys or manipulate synchronization values. The HCS362 provides an easy to use serial interface for programming the necessary keys, system parameters and configuration data. 1.0 SYSTEM OVERVIEW Key Terms The following is a list of key terms used throughout this data sheet. For additional information on KEELOQ and Code Hopping, refer to Technical Brief 3 (TB003). * RKE - Remote Keyless Entry * Button Status - Indicates what button input(s) activated the transmission. Encompasses the 4 button status bits S3, S2, S1 and S0 (Figure 3-2). * Code Hopping - A method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. * Code word - A block of data that is repeatedly transmitted upon button activation (Figure 3-2). * Transmission - A data stream consisting of repeating code words (Figure 8-1). * Crypt key - A unique and secret 64-bit number used to encrypt and decrypt data. In a symmetrical block cipher such as the KEELOQ algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. * Encoder - A device that generates and encodes data. * Encryption Algorithm - A recipe whereby data is scrambled using a crypt key. The data can only be interpreted by the respective decryption algorithm using the same crypt key. DS40189E-page 2 * Decoder - A device that decodes data received from an encoder. * Decryption algorithm - A recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. * Learn - Learning involves the receiver calculating the transmitter's appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. The KEELOQ product family facilitates several learning strategies to be implemented on the decoder. The following are examples of what can be done. - Simple Learning The receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code word's encrypted portion. - Normal Learning The receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code word's encrypted portion. - Secure Learn The transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to generate the transmitter's crypt key. The receiver uses this seed value to derive the same crypt key and decrypt the received code word's encrypted portion. * Manufacturer's code - A unique and secret 64bit number used to generate unique encoder crypt keys. Each encoder is programmed with a crypt key that is a function of the manufacturer's code. Each decoder is programmed with the manufacturer code itself. The HCS362 code hopping encoder is designed specifically for keyless entry systems; primarily vehicles and home garage door openers. The encoder portion of a keyless entry system is integrated into a transmitter, carried by the user and operated to gain access to a vehicle or restricted area. The HCS362 is meant to be a cost-effective yet secure solution to such systems, requiring very few external components (Figure 2-1). Most low-end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. The number of unique identification codes in a low-end system is usually a relatively small number. These shortcomings provide an opportunity for a sophisticated thief to create a device that `grabs' a transmission and retransmits it later, or a device that quickly `scans' all possible identification codes until the correct one is found. The HCS362, on the other hand, employs the KEELOQ code hopping technology coupled with a transmission length of 66 bits to virtually eliminate the use of code `grabbing' or code `scanning'. The high security level of (c) 2011 Microchip Technology Inc. HCS362 the HCS362 is based on the patented KEELOQ technology. A block cipher based on a block length of 32 bits and a key length of 64 bits is used. The algorithm obscures the information in such a way that even if the transmission information (before coding) differs by only one bit from that of the previous transmission, the next coded transmission will be completely different. Statistically, if only one bit in the 32-bit string of information changes, greater than 50 percent of the coded transmission bits will change. * A crypt key * An initial 16-bit synchronization value * A 16-bit configuration value The crypt key generation typically inputs the transmitter serial number and 64-bit manufacturer's code into the key generation algorithm (Figure 1-1). The manufacturer's code is chosen by the system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. As indicated in the block diagram on page one, the HCS362 has a small EEPROM array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of production. The most important of these are: * A 28-bit serial number, typically unique for every encoder FIGURE 1-1: CREATION AND STORAGE OF CRYPT KEY DURING PRODUCTION Production Programmer HCS362 Transmitter Serial Number EEPROM Array Serial Number Crypt Key Sync Counter Manufacturer's Code Key Generation Algorithm The 16-bit synchronization counter is the basis behind the transmitted code word changing for each transmission; it increments each time a button is pressed. Due to the code hopping algorithm's complexity, each increment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. Figure 1-2 shows how the key values in EEPROM are used in the encoder. Once the encoder detects a button press, it reads the button inputs and updates the synchronization counter. The synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. This data will change with every button press, its value appearing externally to `randomly hop around', hence it is referred to as the hopping portion of the code word. The 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. The code word format is explained in greater detail in Section 3.1. Crypt Key . . . A transmitter must first be `learned' by the receiver before its use is allowed in the system. Learning includes calculating the transmitter's appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. In normal operation, each received message of valid format is evaluated. The serial number is used to determine if it is from a learned transmitter. If from a learned transmitter, the message is decrypted and the synchronization counter is verified. Finally, the button status is checked to see what operation is requested. Figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. A receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firmware that allows the decoder to operate in conjunction with an HCS362 based transmitter. Section 6.0 provides detail on integrating the HCS362 into a system. (c) 2011 Microchip Technology Inc. DS40189E-page 3 HCS362 FIGURE 1-2: BUILDING THE TRANSMITTED CODE WORD (ENCODER) EEPROM Array KEELOQ(R) Encryption Algorithm Crypt Key Sync Counter Serial Number Button Press Information Serial Number 32 Bits Encrypted Data Transmitted Information FIGURE 1-3: BASIC OPERATION OF RECEIVER (DECODER) 1 Received Information EEPROM Array Button Press Information Serial Number 2 32 Bits of Encrypted Data Manufacturer Code Check for Match Serial Number Sync Counter Crypt Key 3 KEELOQ(R) Decryption Algorithm Decrypted Synchronization Counter 4 Check for Match Perform Function 5 Indicated by button press NOTE: Circled numbers indicate the order of execution. DS40189E-page 4 (c) 2011 Microchip Technology Inc. HCS362 2.0 DEVICE DESCRIPTION As shown in the typical application circuits (Figure 2-1), the HCS362 is a simple device to use. It requires only the addition of buttons and RF circuitry for use as the transmitter in your security application. See Table 2-1 for a description of each pin and Figure 2-1 for typical circuits. Figure 2-2 shows the device I/O circuits. TABLE 2-1: Pin Number S0 1 Switch input 0 S1 2 Switch input 1 S2 3 Switch input 2 / Clock pin when in Programming mode S3/ RFEN 4 Switch input 3 / RF enable output VSS 5 Ground reference connection 6 LED/ SHIFT 7 VDD 8 Description Data output pin / DATA I/O pin for Programming mode Cathode connection for LED and DUAL mode SHIFT input Positive supply voltage TYPICAL CIRCUITS VDD B0 S0 B1 S1 LED S2 DATA S3 VSS PIN DESCRIPTIONS Name DATA FIGURE 2-1: VDD Tx out a) Two button remote control VDD B0 S0 B1 S1 LED B2 S2 DATA B3 S3 VSS VDD Tx out b) Four button remote control with PLL output (Note) Note: Up to 15 functions can be implemented by pressing more than one button simultaneously or by using a suitable diode array. VDD B3 B2 B1 B0 S0 VDD S1 LED S2 DATA RFEN Tx out VSS PLL control c) Four button remote control with RF Enable VDD B3 B2 B1 B0 S0 VDD S1 LED/SHIFT S2 DATA S3 VSS Tx out 1 KW SHIFT d) DUAL key, four buttons remote control (c) 2011 Microchip Technology Inc. DS40189E-page 5 HCS362 FIGURE 2-2: 2.1 I/O CIRCUITS Architectural Overview 2.1.1 S0, S1, S2 Inputs The HCS362 has an onboard non-volatile EEPROM, which is used to store user programmable data. The data can be programmed at the time of production and include the security-related information such as encoder keys, serial numbers, discrimination and seed values. All the security related options are read protected. The HCS362 has built in protection against counter corruption. Before every EEPROM write, the internal circuitry also ensures that the high voltage required to write to the EEPROM is at an acceptable level. ESD RS VDD RFEN PFET ONBOARD EEPROM 2.1.2 INTERNAL RC OSCILLATOR The HCS362 has an onboard RC oscillator that controls all the logic output timing characteristics. The oscillator frequency varies within 10% of the nominal value (once calibrated over a voltage range of 2V - 3.5V or 3.5V - 6.3V). All the timing values specified in this document are subject to the oscillator variation. S3 Input/ RFEN Output ESD RS FIGURE 2-3: VDD PFET 1.10 TE 1.08 1.06 1.04 1.02 Typical TE 1.00 0.98 0.96 0.94 TE 0.92 0.90 -50-40-30-20-10 0 10 20 30 40 50 6070 80 90 DATA NFET DATA I/O ESD RDATA Temperature C Note: LED output SHIFT ESD RL RH LEDL DS40189E-page 6 NFET 2.1.3 VDD Legend = 2.0V = 3.0V = 6.0V Values are for calibrated oscillator LOW VOLTAGE DETECTOR A low battery voltage detector onboard the HCS362 can indicate when the operating voltage drops below a predetermined value. There are eight options available depending on the VLOW[0..2] configuration options. The options provided are: 000 - 2.0V 100 - 4.0V SHIFT input NFET HCS362 NORMALIZED TE VS. TEMPERATURE LEDH 001 - 2.1V 101 - 4.2V 010 - 2.2V 110 - 4.4V 011 - 2.3V 111 - 4.6V (c) 2011 Microchip Technology Inc. HCS362 FIGURE 2-4: HCS362 VLOW DETECTOR (TYPICAL) 2.7 VDD (V) 2.5 2.3 2.1 1.9 1.7 1.5 -40 -25 -10 5 20 35 50 65 80 2.2 Dual Encoder Operation The HCS362 contains two crypt keys (possibly derived from two different Manufacturer's Codes), but only one Serial Number, one set of Discrimination bits, one 16bit Synchronization Counter and a single 60-bit Seed value. For this reason the HCS362 can be used as an encoder in multiple (two) applications as far as they share the same configuration: transmission format, baud rate, header and guard settings. The SHIFT input pin (multiplexed with the LED output) is used to select between the two crypt keys. A logic 1 on the SHIFT input pin selects the first crypt key. A logic 0 on the SHIFT input pin will select the second crypt key. Temperature (C) VDD Legend = = = = VDD (V) FIGURE 2-5: 000 001 010 011 HCS362 VLOW DETECTOR (TYPICAL) 5.5 5.3 5.1 4.9 4.7 4.5 4.3 4.1 3.9 3.7 3.5 -40 -25 -10 5 20 35 50 65 80 Temperature (C) VDD Legend = = = = 000 001 010 011 The output of the low voltage detector is transmitted in each code word, so the decoder can give an indication to the user that the transmitter battery is low. Operation of the LED changes as well to further indicate that the battery is low and needs replacing. (c) 2011 Microchip Technology Inc. DS40189E-page 7 HCS362 3.0 DEVICE OPERATION FIGURE 3-1: The HCS362 will wake-up upon detecting a switch closure and then delay for switch debounce (Figure 3-1). The synchronization information, fixed information and switch information will be encrypted to form the hopping code. The encrypted or hopping code portion of the transmission will change every time a button is pressed, even if the same button is pushed again. Keeping a button pressed for a long time will result in the same code word being transmitted until the button is released or time-out occurs. START Sample Buttons Get Config. The time-out time can be selected with the Time-out (TIMOUT[0..1]) configuration option. This option allows the time-out to be disabled or set to 0.8 s, 3.2 s or 25.6 s. When a time-out occurs, the device will go into SLEEP mode to protect the battery from draining when a button gets stuck. Buttons removed will not have any effect on the code word unless no buttons remain pressed in which case the current code word will be completed and the power-down will occur. Yes Seed TX? Read Seed No Increment Counter If in the transmit process, it is detected that a new button is pressed, the current code word will be aborted. A new code word will be transmitted and the time-out counter will RESET. If all the buttons are released, the minimum code words will be completed. The minimum code words can be set to 1,2,4 or 8 using the Minimum Code Words (MTX[0..1]) configuration option. If the time for transmitting the minimum code words is longer than the time-out time, the device will not complete the minimum code words. Note: BASIC FLOW DIAGRAM OF THE DEVICE OPERATION Encrypt Transmit Time-out Yes No No A code that has been transmitted will not occur again for more than 64K transmissions. This will provide more than 18 years of typical use before a code is repeated based on 10 operations per day. Overflow information programmed into the encoder can be used by the decoder to extend the number of unique transmissions to more than 192K. MTX STOP Yes No Buttons Yes No Yes Seed Time No No Seed Button Yes No New Buttons Yes DS40189E-page 8 (c) 2011 Microchip Technology Inc. HCS362 3.1 Transmission Modulation Format The HCS362 transmission is made up of several code words. Each code word starts with a preamble and a header, followed by the data (see Figure 3-1 and Figure 3-2). The code words are separated by a Guard Time that can be set to 0 ms, 6.4 ms, 25.6 ms or 76.8 ms with the Guard Time Select (GUARD[0..1]) configuration option. All other timing specifications for the modulation formats are based on a basic timing element (TE). This Timing Element can be set to 100 s, 200 s, 400 s or 800 s with the Baud Rate Select (BSEL[0..1]) FIGURE 3-2: configuration option. The Header Time can be set to 3 TE or 10 TE with the Header Select (HEADER) Configuration option. There are two different modulation formats available on the HCS362 that can be set according to the Modulation Select (MOD) configuration option: * Pulse Width Modulation (PWM) * Manchester Encoding The various formats are shown in Figure 3-3 and Figure 3-4. CODE WORD TRANSMISSION SEQUENCE 1 CODE WORD Preamble FIGURE 3-3: Header Encrypt Fixed Guard Preamble Header Encrypt TRANSMISSION FORMAT (PWM) TE TE TE LOGIC "0" LOGIC "1" TBP 1 16 3-10 TE Header 31 TE Preamble FIGURE 3-4: Encrypted Portion Guard Time Fixed Code Portion TRANSMISSION FORMAT (MANCHESTER) TE TE LOGIC "0" LOGIC "1" TBP START bit bit 0 bit 1 bit 2 1 2 Preamble STOP bit 16 Header (c) 2011 Microchip Technology Inc. Encrypted Portion Fixed Code Portion Guard Time DS40189E-page 9 HCS362 3.1.1 CODE HOPPING DATA The hopping portion is calculated by encrypting the counter, discrimination value and function code with the Encoder Key (KEY). The counter is a 16-bit counter. The discrimination value is 10 bits long and there are 2 counter overflow bits (OVR) that are cleared when the counter wraps to 0. The rest of the 32 bits are made up of the function code also known as the button inputs. 3.1.2 3.1.3.3 Cyclic Redundancy Check (CRC) The CRC bits are calculated on the 65 previously transmitted bits. The decoder can use the CRC bits to check the data integrity before processing starts. The CRC can detect all single bit errors and 66% of double bit errors. The CRC is computed as follows: EQUATION 3-1: CRC Calculation CRC [ 1 ] n + 1 = CRC [ 0 ] n Di n FIXED CODE DATA The 32 bits of fixed code consist of 28 bits of the serial number (SER) and another copy of the function code. This can be changed to contain the whole 32-bit serial number with the Extended Serial Number (XSER) configuration option. and 3.1.3 and Din the nth transmission bit 0 n 64 STATUS INFORMATION The status bits will always contain the output of the Low Voltage detector (VLOW), the Cyclic Redundancy Check (CRC) bits (or TIME bits depending on CTSEL) and the Button Queue information. 3.1.3.1 Low Voltage Detector Status (VLOW) The output of the low voltage detector is transmitted with each code word. If VDD drops below the selected voltage, a logic `1' will be transmitted. The output of the detector is sampled before each code word is transmitted. 3.1.3.2 Button Queue Information (QUEUE) The queue bits indicate a button combination was pressed again within 2 s after releasing the previous activation. Queuing or repeated pressing of the same buttons (or button combination) is detected by the HCS362 button debouncing circuitry. CRC [ 0 ] n + 1 = ( CRC [ 0 ] n Di n ) CRC [ 1 ] n with CRC [ 1, 0 ] 0 = 0 Note: The CRC may be wrong when the battery voltage is around either of the VLOW trip points. This may happen because VLOW is sampled twice each transmission, once for the CRC calculation (PWM is LOW) and once when VLOW is transmitted (PWM is HIGH). VDD tends to move slightly during a transmission which could lead to a different value for VLOW being used for the CRC calculation and the transmission. Work around: If the CRC is incorrect, recalculate for the opposite value of VLOW. The Queue bits are added as the last two bits of the standard code word. The queue bits are a 2-bit counter that does not wrap. The counter value starts at `00b' and is incremented, if a button is pushed within 2 s of the previous button press. The current code word is terminated when the buttons are queued. This allows additional functionality for repeated button presses. The button inputs are sampled every 6.4 ms during this 2 s period. 00 - first activation 01 - second activation 10 - third activation 11 - from fourth activation on DS40189E-page 10 (c) 2011 Microchip Technology Inc. HCS362 FIGURE 3-5: CODE WORD DATA FORMAT With XSER = 0, CTSEL = 0 Fixed Code Portion (32 bits) Status Information (5 bits) QUE 2 bits CRC 2 bits VLOW 1-bit Q1 Q0 C1 C0 BUT 4 bits S2 S1 S0 Encrypted Portion (32 bits) Counter BUT Overflow 4 bits 2 bits SERIAL NUMBER (28 bits) S3 S2 S1 S0 S3 OVR1 DISC 10 bits Synchronization Counter 16 bits 0 15 OVR0 With XSER = 1, CTSEL = 0 Fixed Portion (32 bits) Status Information (5 bits) QUE 2 bits CRC 2 bits Encrypted Portion (32 bits) Counter BUT Overflow 4 bits 2 bits SERIAL NUMBER (32 bits) VLOW 1-bit Q1 Q0 C1 C0 S2 S1 S0 S3 OVR1 DISC 10 bits Synchronization Counter 16 bits 0 15 OVR0 With XSER = 0, CTSEL = 1 Fixed Portion (32 bits) Status Information (5 bits) QUE 2 bits TIME 2 bits Q1 Q0 T1 T0 VLOW 1-bit BUT 4 bits S2 S1 S0 Encrypted Portion (32 bits) Counter BUT Overflow 4 bits 2 bits SERIAL NUMBER (28 bits) S3 S2 S1 S0 S3 OVR1 DISC 10 bits Synchronization Counter 16 bits 0 15 OVR0 With XSER = 1, CTSEL = 1 Status Information (5 bits) QUE 2 bits TIME 2 bits Q1 Q0 T1 VLOW 1-bit T0 Fixed Portion (32 bits) Encrypted Portion (32 bits) Counter BUT Overflow 4 bits 2 bits SERIAL NUMBER (32 bits) S2 S1 S0 S3 OVR1 DISC 10 bits Synchronization Counter 16 bits 0 15 OVR0 Transmission Direction LSB First (c) 2011 Microchip Technology Inc. DS40189E-page 11 HCS362 3.1.4 MINIMUM CODE WORDS 3.1.5 MTX[0..1] configuration bits selects the minimum number of code words that will be transmitted. If the button is released after 1.6 s (or greater) and MTX code words have been transmitted, the code word being transmitted will be terminated. The possible values are: 00 - 1 01 - 2 TIME BITS The time bits indicate the duration that the inputs were activated: 00 - immediate 01 - after 0.8 s 10 - after 1.6 s 11 - after 2.4 s The TIME bits are incremented every 0.8 s and does not wrap once it reaches `11'. 10 - 4 Time information is alternative to the CRC bits availability and is selected by the CTSEL configuration bit. 11 - 8 FIGURE 3-6: TIME BITS OPERATION S[3210] Time bits = 00 Time bits set internally to 01 Time bits set internally to 10 Time bits actually output Time bits actually output DATA TTD Time 0s 1.6 s 0.8 s 2.4 s = One Code Word 3.2 LED Output FIGURE 3-8: The LED pin will be driven LOW periodically while the HCS362 is transmitting data, in order to switch on an external LED. The duty cycle (TLEDON/TLEDOFF) can be selected between two possible values by the configuration option (LED). FIGURE 3-7: LED OPERATION (LED = 1) LED OPERATION (LED = 0) S[3210] VDD > VLOW TLEDON TLEDOFF LED TLEDON = 200 ms TLEDOFF = 800 ms VDD < VLOW LED S[3210] VDD > VLOW TLEDON TLEDOFF Note: LED TLEDON = 25 ms TLEDOFF = 500 ms VDD < VLOW LED The same configuration option determines whether when the VDD Voltage drops below the selected VLOW trip point, the LED will blink only once or stop blinking. DS40189E-page 12 When the HCS362 encoder is used as a Dual Encoder the LED pin is used as a SHIFT input (Figure 2-2). In such a configuration the LED is always ON during transmission. To keep power consumption low, it is recommended to use a series resistor of relatively high value. VLOW information is not available when using the second Encryption Key. (c) 2011 Microchip Technology Inc. HCS362 3.3 Seed Code Word Data Format A seed transmission transmits a code word that consists of 60 bits of fixed data that is stored in the EEPROM. This can be used for secure learning of encoders or whenever a fixed code transmission is required. The seed code word further contains the function code and the status information (VLOW, CRC and QUEUE) as configured for normal code hopping code words. The seed code word format is shown in Figure 3-9. The function code for seed code words is always `1111b'. FIGURE 3-9: Seed code words can be configured as follows: * Enabled permanently. * Disabled permanently. * Enabled until the synchronization counter is greater than 7Fh, this configuration is often referred to as Limited Seed. * The time before the seed code word is transmitted can be set to 1.6 s or 3.2 s, this configuration is often referred to as Delayed Seed. When this option is selected, the HCS362 will transmit a code hopping code word for 1.6 s or 3.2 s, before the seed code word is transmitted. SEED CODE WORD FORMAT With QUEN = 1 SEED Code (60 bits) Fixed Portion (9 bits) QUE CRC VLOW (2 bits) (2 bits) (1-bit) Q1 Q0 C1 C0 SEED BUT (4 bits) S2 S1 S0 S3 Transmission Direction LSB First 3.3.1 SEED OPTIONS The button combination (S[3210]) for transmitting a Seed code word can be selected with the Seed and SeedC (SEED[0..1] and SEEDC) configuration options as shown in Table 3-1 and Table 3-2: TABLE 3-1: SEED OPTIONS (SEEDC = 0) Seed 1.6 s Delayed Seed SEED S[3210] S[3210] 00 - - 01 0101* 0001* 10 0101 0001 11 0101 - Note: Example B): Selecting SEEDC = 0 and SEED = 01: makes SEED transmission available only for a limited time (only up to 128 times). The combination of buttons S2 and S0 produces an immediate transmission of the SEED code. Pressing and holding for more than 1.6 seconds the S0 button alone, produces the SEED code word transmission (Delayed Seed). *Limited Seed TABLE 3-2: SEED OPTIONS (SEEDC = 1) Seed 3.2 s Delayed Seed SEED S[3210] S[3210] 00 - - 01 1001* 0011* 10 1001 0011 11 1001 - Note: Example A): Selecting SEEDC = 1 and SEED = 11: makes SEED transmission available every time the combination of buttons S3 and S0 is pressed simultaneously, but Delayed Seed mode is not available. *Limited Seed (c) 2011 Microchip Technology Inc. DS40189E-page 13 HCS362 3.4 RF Enable and PLL Interface The S3/RFEN pin of the HCS362 can be configured to function as an RF Enable output signal. This is selected by the RF Enable Output (RFEN) configuration option. When enabled, this pin will be driven HIGH before data is transmitted through the DATA pin. The RF Enable and DATA output are synchronized so to interface with RF PLL circuits operating in ASK mode. Figure 3-10 shows the startup sequence. The RFEN signal will go LOW at the end of the last code word, including the Guard time. Note: When the RF Enable output feature is used and a four (or more) buttons input configuration is required, the use of a scheme similar to Figure 2-1 (scheme C) is recommended. When the RF Enable output is selected, the S3 pin can still be used as a button input. The debouncing logic will be affected though, considerably reducing the responsiveness of the button input. FIGURE 3-10: PLL INTERFACE Button Press Button Release S[3210] RFEN DATA TRFON TTD TG 1st CODE WORD 2nd CODE WORD Guard Time DS40189E-page 14 (c) 2011 Microchip Technology Inc. HCS362 4.0 EEPROM MEMORY ORGANIZATION 4.1 KEY_0 - KEY_3 (64-bit Crypt Key) Word Address Field Description 0 KEY1_0 64-bit Encryption Key1 (Word 0) LSB The 64-bit crypt key is used to create the encrypted message transmitted to the receiver. This key is calculated and programmed during production using a key generation algorithm. The key generation algorithm may be different from the KEELOQ algorithm. Inputs to the key generation algorithm are typically the transmitter's serial number and the 64-bit manufacturer's code. While the key generation algorithm supplied from Microchip is the typical method used, a user may elect to create their own method of key generation. This may be done providing that the decoder is programmed with the same means of creating the key for decryption purposes. 1 KEY1_1 64-bit Encryption Key1 (Word 1) 4.2 2 KEY1_2 64-bit Encryption Key1 (Word 2) 3 KEY1_3 64-bit Encryption Key1 (Word 3) MSB 4 KEY2_0 64-bit Encryption Key2 (Word 0) LSB 5 KEY2_1 64-bit Encryption Key2 (Word 1) 6 KEY2_2 64-bit Encryption Key2 (Word 2) 7 KEY2_3 64-bit Encryption Key2 (Word 3) MSB 8 SEED_0 Seed value (Word 0) LSB 9 SEED_1 Seed value (Word 1) 10 SEED_2 Seed value (Word 2) 11 SEED_3 Seed value (Word 3) MSB 12 CONFIG_0 Configuration Word (Word 0) 13 CONFIG_1 Configuration Word (Word 1) 14 SERIAL_0 Serial Number (Word 0) LSB 15 SERIAL_1 Serial Number (Word 1) MSB 16 SYNC Synchronization counter 17 RES Reserved - Set to zero The HCS362 contains 288 bits (18 x 16-bit words) of EEPROM memory (Table 4-1). This EEPROM array is used to store the encryption key information and synchronization value. Further descriptions of the memory array is given in the following sections. TABLE 4-1: EEPROM MEMORY MAP (c) 2011 Microchip Technology Inc. SYNC (Synchronization Counter) This is the 16-bit synchronization value that is used to create the hopping code for transmission. This value will be incremented after every transmission. 4.3 SEED_0, SEED_1, SEED_2, and SEED 3 (Seed Word) This is the four word (60 bits) seed code that will be transmitted when seed transmission is selected. This allows the system designer to implement the secure learn feature or use this fixed code word as part of a different key generation/tracking process or purely as a fixed code transmission. Note: 4.4 Upper four Significant bits of SEED_3 contains extra configuration information (see Table 4-4). SERIAL_0, SERIAL_1 (Encoder Serial Number) SER_0 and SER_1 are the lower and upper words of the device serial number, respectively. There are 32 bits allocated for the serial number and a selectable configuration bit determines whether 32 or 28 bits will be transmitted. The serial number is meant to be unique for every transmitter. DS40189E-page 15 HCS362 4.5 Configuration Words are There are 36 configuration bits stored in the EEPROM array. They are used by the device to determine transmission speed, format, delays and Guard times. They TABLE 4-2: grouped in CONFIG_0 Description 0 OSC_0 Oscillator adjust 1 OSC_1 2 0000 - nominal 1000 - fastest 0111 - slowest OSC_2 VLOW select nominal values 3 OSC_3 4 VLOW_0 5 VLOW_1 6 VLOW_2 7 BSEL_0 8 BSEL_1 Values Bitrate select 9 MTX_0 10 MTX_1 Minimum number of code words 11 GUARD_0 Guard time select 12 GUARD_1 13 TIMOUT_0 14 TIMOUT_1 15 CTSEL Time-out select CTSEL OSC The internal oscillator can be tuned to 10%. (0000 selects the nominal value, 1000 the fastest value and 0111 the slowest). When programming the device, it is the programmer's responsibility to determine the optimal calibration value. VLOW[0..2] The low voltage threshold can be programmed to be any of the values shown in the following table: 4.5.3 Words: word. A description of each of the bits follows this section. Field 4.5.2 Configuration SEED_3 Bit Address 4.5.1 three CONFIG_0, CONFIG_1 and the upper nibble of the BSEL[0..1] 000 - 2.0V 100 - 4.0V 001 - 2.1V 101 - 4.2V 010 - 2.2V 110 - 4.4V 011 - 2.3V 111 - 4.6V 00 - TE = 100 s 01 - TE = 200 s 10 - TE = 400 s 11 - TE = 800 s 00 - 1 01 - 2 10 - 4 11 - 8 00 - 0 ms (1 TE) 01 - 6.4 ms + 2 TE 10 - 25.6 ms + 2 TE 11 - 76.8 ms + 2 TE 00 - No Time-out 01 - 0.8 s to 0.8 s + 1 code word 10 - 3.2 s to 3.2 s + 1 code word 11 - 25.6 s to 25.6 s + 1 code word 0 = TIME bits 1 = CRC bits selection and the Guard time selection, from approximately 40 ms up to 220 ms. Refer to Table 8-4 and Table 8-5 for a more complete description. 4.5.4 MTX[0..1] MTX selects the minimum number of code words that will be transmitted. A minimum of 1, 2, 4 or 8 code words will be transmitted. Note: If MTX and BSEL settings in combination require a transmission sequence to exceed the TIMOUT setting, TIMOUT will take priority. The basic timing element TE, determines the actual transmission Baud Rate. This translates to different code word lengths depending on the encoding format selected (Manchester or PWM), the Header length DS40189E-page 16 (c) 2011 Microchip Technology Inc. HCS362 4.5.5 GUARD 4.5.6 The Guard time between code words can be set to 0 ms, 6.4 ms, 25.6 ms and 76.8 ms. If during a series of code words, the output changes from Hopping Code to Seed the Guard time will increase by 3 x TE. TABLE 4-3: TIMOUT[0..1] The transmission time-out can be set to 0.8 s, 3.2 s, 25.6 s or no time-out. After the time-out period, the encoder will stop transmission and enter a low power Shutdown mode. CONFIG_1 Bit Address Field Description 0 DISC_0 Discrimination bits 1 DISC_1 2 DISC_2 ... ... 8 DISC_8 9 DISC_9 10 OVR_0 11 OVR_1 12 XSER Extended Serial Number 13 SEEDC Seed Control Overflow Values DISC[9:0] OVR[1:0] 0 - Disable 1 - Enable 0 = Seed transmission on: S[3210] = 0001 (delay 1.6 s) S[3210] = 0101 (immediate) 1 = Seed transmission on: S[3210] = 0011 (delay 3.2 s) S[3210] = 1001 (immediate) 4.5.7 14 SEED_0 15 SEED_1 Seed options DISC[0..9] The discrimination bits are used to validate the decrypted code word. The discrimination value is typically programmed with the 10 Least Significant bits of the serial number or a fixed value. 4.5.8 OVR[0..1] The overflow bits are used to extend the possible code combinations to 192K. If the overflow bits are not going to be used they can be programmed to zero. 4.5.9 00 01 10 11 4.5.10 (c) 2011 Microchip Technology Inc. No Seed Limited Seed (Permanent and Delayed) Permanent and Delayed Seed Permanent Seed only SEED[0..1] The seed value which is transmitted on key combinations (0011) and (1001) can be disabled, enabled or enabled for a limited number of transmissions determined by the initial counter value. In limited Seed mode, the device will output the seed if the sync counter (Section 4.2) is from 00hex to 7Fhex. For a counter higher than 7F, a normal hopping code will be output. Note: XSER If XSER is enabled a 32-bit serial number is transmitted. If XSER is disabled a 28-bit serial number and a 4bit function code are transmitted. - 4.5.11 Whenever a SEED code word is output, the 4 function bits (Figure 8-4) will be set to all ones [1,1,1,1]. SEEDC SEEDC selects between seed transmission on 0001 and 0101 (SEEDC = 0) and 0011 and 1001 (SEEDC = 1). The delay before seed transmission is 1.6 s for (SEEDC = 0) and 3.2 s for (SEEDC = 1). DS40189E-page 17 HCS362 TABLE 4-4: SEED_3 Bit Address Field Description 0 SEED_48 Seed Most Significant word 1 SEED_49 2 SEED_50 ... ... 9 SEED_57 10 SEED_58 11 SEED_59 12 LED LED output timing Values -- 0 = VBOT>VLOW LED blink 200/800 ms VBOTVLOW LED blink 25/500 ms VBOT#& ##4>#& . < : 9& -< -? 9 - < ) ? ) < 1 = = & & 9# 6 4!! 9#>#& 9 * 9#>#& : * + - !"#$%&" ' ()"&'"!&) &#*& & & # +%&, & !& - '! !#.# &"#' #%! & "! ! #%! & "! !! &$#/ !# '! #& .0 1,21!'! &$& "! **& "&& ! (c) 2011 Microchip Technology Inc. * ,<1 DS40189E-page 35 HCS362 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS40189E-page 36 (c) 2011 Microchip Technology Inc. HCS362 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2011 Microchip Technology Inc. DS40189E-page 37 HCS362 ! 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