Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6 1Publication Order Number:
SN74LS151/D
SN74LS151
8-Input Multiplexer
The TTL/MSI SN74LS151 is a high speed 8-input Digital
Multiplexer. It provides, in one package, the ability to select one bit of
data from up to eight sources. The LS151 can be used as a universal
function generator to generate any logic function of four variables.
Both assertion and negation outputs are provided.
Schottky Process for High Speed
Multifunction Capability
On-Chip Select Logic Decoding
Fully Buffered Complementary Outputs
Input Clamp Diodes Limit High Speed Termination Ef fects
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 4.75 5.0 5.25 V
TAOperating Ambient
Temperature Range 0 25 70 °C
IOH Output Current – High 0.4 mA
IOL Output Current – Low 8.0 mA
LOW
POWER
SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS151N 16 Pin DIP 2000 Units/Box
SN74LS151D 16 Pin
SOIC
D SUFFIX
CASE 751B
http://onsemi.com
2500/Tape & Reel
PLASTIC
N SUFFIX
CASE 648
16
1
16
1
SN74LS151
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2
CONNECTION DIAGRAM DIP (TOP VIEW)
Select Inputs
Enable (Active LOW) Input
Multiplexer Inputs
Multiplexer Output
Complementary Multiplexer Output
S0 S2
E
I0 – I7
Z
Z
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
m
A HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 5 U.L. for Commercial (74) Temperature Ranges.
HIGH LOW
(Note a)LOADING
PIN NAMES
VCC = PIN 16
GND = PIN 8
LOGIC SYMBOL
11
10
9
65
74 3 2 115141312
EI
0I1I2I3I4I5I6I7
S0
S1
S2Z Z
14 13 12 11 10 9
1234567
16 15
8
VCC
I3
I4I5I6I7S1
S0S2
I2I1I0ZZ E GND
SN74LS151
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3
LOGIC DIAGRAM
S2
S1
S0
E
I0I1I2I3I4I5I6I7
Z Z
1412
6
7
34
5
9
11
12
10
1315
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
FUNCTIONAL DESCRIPTION
The LS151 is a logical implementation of a single pole,
8-position switch with the switch position controlled by the
state of three Select inputs, S0, S1, S2. Both assertion and
negation outputs are provided. The Enable input (E) is active
LOW. When it is not activated, the negation output is HIGH
and the assertion output is LOW regardless of all other
inputs. The logic function provided at the output is:
Z = E (I0 S0 S1 S2 + I1 S0 S1 S2 + I2 S0 S1 S2
+ I3 S0 S1 S2 + I4 S0 S1 S2 + I5 S0 S1 S2 + I6
S0 S1 S2 + I7 S0 S1 S2).
The LS151 provides the ability, in one package, to select
from eight sources of data or control information. By proper
manipulation of the inputs, the LS151 can provide any logic
function of four variables and its negation.
TRUTH TABLE
E S2S1S0I0I1I2I3I4I5I6I7Z Z
H X X X X X X X X X X X H L
L L LLLXXXXXXXHL
L L LLHXXXXXXXLH
L L LHXLXXXXXXHL
L L LHXHXXXXXXLH
L L HLXXLXXXXXHL
L L HLXXHXXXXXLH
L L HHXXXLXXXXHL
L L HHXXXHXXXXLH
L H LLXXXXLXXXHL
L H LLXXXXHXXXLH
L H LHXXXXXLXXHL
L H LHXXXXXHXXLH
L H HLXXXXXXLXHL
L H HLXXXXXXHXLH
L H HHXXXXXXXLHL
L H H H X X X X X X X H L H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
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4
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage for
All Inputs
VIL Input LOW Voltage 0.8 VGuaranteed Input LOW Voltage for
All Inputs
VIK Input Clamp Diode Voltage 0.65 1.5 V VCC = MIN, IIN = –18 mA
VOH Output HIGH Voltage 2.7 3.5 V VCC = MIN, IOH = MAX, VIN = VIH
or VIL per T ruth Table
VO
Out
p
ut LOW Voltage
0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,
V V or V
V
OL
O
u
tp
u
t
LOW
Voltage
0.35 0.5 V IOL = 8.0 mA
V
IN =
V
IL or
V
IH
per T ruth Table
I
In
p
ut HIGH Current
20 µA VCC = MAX, VIN = 2.7 V
I
IH
Inp
u
t
HIGH
C
u
rrent
0.1 mA VCC = MAX, VIN = 7.0 V
IIL Input LOW Current 0.4 mA VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current (Note 1) –20 100 mA VCC = MAX
ICC Power Supply Current 10 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH
tPHL Propagation Delay
Select to Output Z 27
18 43
30 ns
tPLH
tPHL Propagation Delay
Select to Output Z 14
20 23
32 ns
tPLH
tPHL Propagation Delay
Enable to Output Z 26
20 42
32 ns V
CC
= 5.0 V
tPLH
tPHL Propagation Delay
Enable to Output Z 15
18 24
30 ns
CC
CL = 15 pF
tPLH
tPHL Propagation Delay
Data to Output Z 20
16 32
26 ns
tPLH
tPHL Propagation Delay
Data to Output Z 13
12 21
20 ns
AC WAVEFORMS
Figure 1. Figure 2.
VIN
VOUT
1.3 V
tPHL
1.3 V
tPLH
1.3 V 1.3 V
VIN
VOUT
1.3 V
tPHL
1.3 V
tPLH
1.3 V 1.3 V
SN74LS151
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5
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
FC
S
HGD
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.740 0.770 18.80 19.55
B0.250 0.270 6.35 6.85
C0.145 0.175 3.69 4.44
D0.015 0.021 0.39 0.53
F0.040 0.70 1.02 1.77
G0.100 BSC 2.54 BSC
H0.050 BSC 1.27 BSC
J0.008 0.015 0.21 0.38
K0.110 0.130 2.80 3.30
L0.295 0.305 7.50 7.74
M0 10 0 10
S0.020 0.040 0.51 1.01
____
SN74LS151
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6
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
RX 45
_
G
8 PLP
–B–
–A–
M
0.25 (0.010) B S
–T–
D
K
C
16 PL
S
B
M
0.25 (0.010) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.80 10.00 0.386 0.393
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.229 0.244
R0.25 0.50 0.010 0.019
____
SN74LS151
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7
Notes
SN74LS151
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8
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