N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
Order this document
by MC33593/D
SEMICONDUCTOR TECHNICAL
MOTOROLA
REV 7.0
© Motorola, Inc., 2002.
This document contains information on a new product under development. Motorola
reserves the right to change or discontinue this product without notice.
PLL Tuned UHF Receiver
for Data Transfer Applications
• 868MHz, 902-928MHz Bands
• OOK and FSK Demodulation
• Low Current Consumption: 7mA Typ. in Run Mode
• Internal or External Strobing
• Fast Wake-Up Time (1ms)
• -105dBm RF Sensitivity (at 4.8kBd Data Rate)
• Fully Integrated VCO
• Image Cancelling Mixer
• Integrated IF Bandpass Filter at 660kHz
• IF Bandwidth: 500kHz
• ID Byte and Tone Detection
• Data Rate: 1 to 11kBd
• Manchester Coded Data Clock Recovery
• Fully Configurable by SPI Interface
• Few External Components, no RF Adjustment
Figure 1: Simplified block diagram
Table 1: Ordering Information
Device RF frequency/
IF filter bandwidth
Ambiant
Temperature Range Package
MC33593FTA 868MHz / 500kHz -40°C to +85°C LQFP24
ROMEO2
MC33593
Pin Connections
1
VCC
2
VCC
3
VCCLNA
4
RFIN
5
GNDLNA
6
GNDSUB
7
PFD
8
GNDVCO
9
GND
10
XTAL1
11
XTAL2
12
CAGC
13
DMDAT
14
RESETB
15
MISO
16
MOSI
17
SCLK
18
VCCDIG
19
GNDDIG
20
RCBGAP
21
STROBE
22
CAFC
23
MIXOUT
24
CMIXAGC
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
2
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
PIN FUNCTION DESCRIPTION
Pin Name Description
1 VCC 5V power supply
2 VCC 5V power supply
3 VCCLNA 5V LNA power supply
4 RFIN RF input
5 GNDLNA LNA ground
6GNDSUBGround
7 PFD Access to VCO control voltage
8 GNDVCO VCO ground
9 GND Ground
10 XTAL1 Reference oscillator crystal
11 XTAL2 Reference oscillator crystal
12 CAGC IF AGC capacitor for OOK
Reference for FSK
13 DMDAT Demodulated data (OOK & FSK modulation)
14 RESETB State Machine Reset
15 MISO SPI interface I/O
16 MOSI SPI interface I/O
17 SCLK SPI interface clock
18 VCCDIG 5V digital power supply
19 GNDDIG Digital ground
20 RCBGAP Reference voltage output
21 STROBE Strobe oscillator control
Stop/Run external control input
22 CAFC AFC capacitor
23 MIXOUT Mixer output
24 CMIXAGC Mixer AGC capacitor
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
3
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
ABSOLUTE MAXIMUM RATINGS
Notes:
1 Human Body model, AEC-Q100-002 Rev. C.
2 Machine Model, AEC-Q100-003 Rev. E.
Parameter Symbol Value Unit
Supply Voltage VCC
VCCLNA
VGND - 0.3 to 5.5 V
Voltage Allowed on Each Pin VGND - 0.3
to VCC + 0.3 V
ESD HBM Voltage Capability on Each Pin (note 1) ±2000 V
ESD MM Voltage Capability on Each Pin (note 2) ±200 V
Solder Heat Resistance Test (10 s) 260 °C
Storage Temperature Ts -65 to +150 °C
Junction Temperature Tj 150 °C
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
4
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
RECEIVER FUNCTIONAL DESCRIPTION
The basic functionality of the ROMEO2 receiver may be seen by reference to the accompanying block
diagram (see figure 1). It is fully compatible with the TANGO3 transmitter.
The RF section comprises a mixer with image cancelling, followed by an IF band-pass filter at 660kHz, an
AGC controlled gain stage and OOK and FSK demodulators, the desired modulation type being selectable by the
SPI interface. The data output from the circuit may either be the data comparator output, or, if Data Manager is
enabled, the SPI port.
The local oscillator is controlled with a PLL referenced to the crystal oscillator. The received channel is defined
by the choice of the crystal frequency.
An SPI bus permits programming the modulation type, data rate, UHF frequency, ID word etc., though to
accomodate applications where no bus interface is available the circuit defaults at power-on to a standard
operating mode.
Depending upon the configuration, the circuit can be either externally strobed by the STROBE input or
internally wait-and-sleep cycled to reduce the power consumption. At any time, a high level on STROBE
overrides the internal timer output and wakes up ROMEO2. When the circuit is switched into sleep mode its
current consumption is approximately 100µA. The circuit configuration which has previously been programmed is
retained.
THE LOCAL OSCILLATOR PLL
The PLL is tuned by comparing the local oscillator frequency, after suitable division, with that of the crystal
oscillator reference. The loop filter has been integrated in the IC. Practical limits upon the values of components
which may be integrated mean that the local oscillator performance may be slightly improved by using an
external PFD filter, shown in Figure 2. In this way the user may choose to have optimum performance with the
addition of external filter components. The PLL gain may be programmed by bit PG: it is recommended that this
bit be set to 1, corresponding to low loop gain.
Figure 2 : External loop filter
C1=4.7nF, C2=390pF, R=1kΩ
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
5
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
COMMUNICATION PROTOCOL
MANCHESTER CODING DESCRIPTION
Manchester coding is defined as follows: data is sent during the first half-bit, complementary data is sent
during the second half-bit.
Figure 3: Manchester coding example
The signal average value is constant. This allows clock recovery from the data stream itself. In order to
achieve a correct clock recovery, Manchester coded data must have a duty cycle between:
- 48% and 52% in OOK,
- 45% and 55% in FSK.
PREAMBLE, ID, HEADER WORDS AND MESSAGE DESCRIPTION
The following description applies if the Data Manager is enabled (DME=1).
The ID word is a Manchester coded byte whose content has been previously loaded in the Configuration
Register 2. The complement of the ID word is recognized as an ID word. ID word is sent at the same data rate as
data.
A preamble is required:
- before ID,
- before Header if HE=1,
- before data if HE=0.
It enables:
- in case of OOK modulation, AGC to settle,
- in case of FSK modulation, data slicer reference voltage to settle,
- in any case, clock recovery.
Figure 4 defines the Preamble word in OOK and FSK modulation. Preamble content must be carefully defined in
order not to be decoded as an ID or Header word.
Figure 4: Preamble definition
The Header word is a 4 bit Manchester coded message ‘0110’ or its complement sent at the selected data
rate. This bit sequence and its complement must not be found in the sequence preamble and ID word.
Data must follow the Header without any delay.
Data are completed by a End-of-Message (EOM) word, consisting of 2 NRZ consecutive ones or zeroes.
Even in case of FSK modulation, the data must be completed by a EOM and not by simply stopping the RF
telegram. If the complement of the Header word is received, output data are complemented too.
0001110
Original data
Manchester coded
OOK Modulation:
‘0’ Manchester
at data rate
‘1’ NRZ > 200µs
i.e.:
2 ‘1’ NRZ at 9.6kBd,
1 ‘1’ NRZ at 4.8kBd
AGC settling time Clock recovery
ID
FSK Modulation:
Data slicer reference settling time
ID
3 ‘1’ or ‘0’ Manchester
at data rate
‘1’ or ‘0’ Manchester
at data rate
Clock recovery
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
6
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
The following example shows a complete message with Preamble, ID, Header words followed by 2 data bits,
and an EOM. The preamble is placed at the beginning of both ID and Header words.
Figure 5: Complete message example
MESSAGE PROTOCOL
If the receiver is continuously Sleep/Run cycling, the ID word has to be recognized to stay in Run mode.
Consequently, the transmitted ID burst has to be long enough to include two consecutive receiver Run cycles.
If the Strobe oscillator is enabled (SOE=1), the circuit is in Sleep mode during SR × TStrobe and in Run mode
during TStrobe (where TStrobe is the Strobe oscillator period and SR is the Strobe Ratio, see Table 5). Therefore,
the sleep/run cycle period is equal to (SR+1) × TStrobe.
If SOE=0, these timings constraints must be respected by the external control applied on pin STROBE.
Figure 6: Complete telegram with ID detection
Figure 7: Complete telegram with tone detection
Figures 8 & 9 detail RF signals and the processing done by the receiver in several configuations.
Figure 8: Telegrams with ID
Preamble
11001000
ID Preamble
01 0
Header
1 1 0
Data EOM
P+ID
RF signal
P+Header Data EOM
Run Sleep
ID detected
Run
TStrobe SR × TStrobe
P+ID P+ID P+IDP+ID P+ID
Sleep
P+ID =Preamble ID
P+Header =Preamble Header
RF signal
Header Data EOMTone
Run Sleep
ID detected
Run
TStrobe SR × TStrobe
Sleep
Preamble IDPreamble ID Preamble ID HeaderPreamble Data EOM
Data
DME=1, HE=1
RF signal
SPI output
DME=1, HE=0
ID
Preamble ID Data EOM
Data
RF signal
SPI output
ID ID IDID ID ID ID IDID ID ID ID
ID ID ID IDID ID ID ID
ID detected
ID detected
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
7
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
Figure 9: Telegrams with tone
RECEIVER START-UP DELAY
A settling time (1ms typ.) is required when entering into Wait mode. figure 10.
Figure 10: Wait usable window
Tone Header Data EOM
Data
DME=1, HE=1
RF signal
SPI output
DME=1, HE=0
Data EOM
Data
RF signal
SPI output
To n e
Tone
Tone detected
Tone detected
Run Sleep
ID ID ID ID IDIDID ID
Settling
time
ID detected
Sleep Run
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
8
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
DATA MANAGER
This block has five purposes:
- ID detection,
- Header recognition,
- Clock recovery,
- Output data and recovered clock on SPI port,
- End-of-Message detection.
Table 2 details some ROMEO2 features versus the bits DME and SOE values.
Table 2: ROMEO2 features versus DME and SOE
Table 3 details some ROMEO2 features versus DME values.
Table 3: ROMEO2 features versus DME
CLOCK GENERATOR
Typical crystal frequency is 13.5775MHz for 868MHz band.
Figure 11: Clock generation diagram
DME SOE Timer ROMEO2
kept in Run mode by
Microcontroller
woken-up by
0
0External control by
STROBE pin STROBE pin Raw data
1Internal and external
control by STROBE pin
1
0External control by
STROBE pin STROBE pin Message Detection
word
1Internal and external
control by STROBE pin
ID detection
and STROBE pin Data clock
DME SPI status Data format Output
0 Disabled Bitstream
No clock
MOSI
-
1Master when
RESETB=1
Data bytes
Recovered clock
MOSI
SCLK
Phase Frequency Detector
XTAL
Reference
÷ 64
÷ 11
IF Filter Reference Clock
& Clock Recovery
UHF Oscillator
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
9
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
SERIAL INTERFACE
ROMEO2 and the microcontroller communicate through a Serial Peripheral Interface (SPI). It enables:
- the microcontroller to set and check ROMEO2 configuration,
- ROMEO2 to send the received data.
If the SPI is not used, a Power On Reset (POR) sets ROMEO2 to operate correctly in a default configuration.
The interface is operated by the 3 following input/output pins:
- Serial Clock SCLK,
- Master Output Slave Input MOSI,
- Master Input Slave Output MISO.
The master clock is used to synchronise data movement both in and out of the device through its MOSI and
MISO lines. The master and slave devices are capable of exchanging a byte of information during a sequence of
eight clock cycles. Since SCLK is generated by the master device, this line is an input on a slave device.
The MISO line is configured as an input in a master device and as an output in a slave device. The MOSI line is
configured as an output in a master device and as an input in a slave device. The MISO and MOSI lines transfer
serial data in one direction with the most significant bit sent first. Data are captured on falling edges of SCLK.
Data are shifted out on rising edge of SCLK. When no data are output, SCLK and MOSI force a low level. Using
Motorola acronyms, this means that the clock phase and polarity control bits of the microcontroller SPI have to be
CPOL= 0 and CPHA=1.
In configuration mode, as long as a low level is applied on RESETB (see state machine on figure 14 page 13),
the microcontroller is the master node providing clock information on SCLK input, control and configuration bits
on the MOSI line. If the default configuration is not the desired one, the microcontroller (MCU) can change it by
writing into the configuration registers. The configuration registers can also be read back to check their contents.
Configuration registers cannot be addressed separately, the whole configuration has to be sent as a 3x8
bitstream. The contents are written out as a 24-bit serial data stream. Transmissions which are not multiple of 24
bits may lead to unexpected configurations. The first bit transmitted on MOSI does not change the content of the
configuration registers. Note that a low level applied on RESETB does not affect the configuration register
content.
When RESETB is set to a high level, if Data Manager is enabled (DME=1), ROMEO2 becomes master and
sends received data on the MOSI line and the recovered clock on SCLK. It is then recommended that the MCU
SPI is set as slave. If the data received does not fit in an entire number of bytes, the data manager will fill the last
byte. If the data received constitute an whole number of bytes, the data manager may generate and send an
extra byte whose content is irrelevant. If DME=0, the SPI is disabled. Raw data is sent on the MOSI line.
When ROMEO2 SPI is changed from master (run mode) to slave (configuration mode) or from slave to
master, it is recommended that the MCU SPI is set as slave before the mode transition.
At power-on, the POR resets the internal registers. This defines the receiver default configuration (see gray
rows on tables 4, 7 & 8). In this configuration, the SPI is disabled and ROMEO2 sends raw data on the MOSI line.
This default configuration enables the circuit to operate as a standalone receiver without any external control.
After POR, RESETB forces a low level. Therefore an external pull-up resistor should be used in order to avoid
entering configuration mode.
Figure 12: Writing into configuration registers
MOSI line
CR1 CR2 CR3
0
SCLK line
MCU (master) ROMEO2
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
10
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
Figure 13: Reading configuration registers
MOSI line
Don’t care Don’t care Don’t care1
SCLK line
MCU (master) ROMEO2
MCU (master) ROMEO2
MISO line
CR2 CR3CR1
1
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
11
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
CONFIGURATION REGISTERS
Table 4 describes the Configuration Register 1 (CR1).
Table 4: Configuration Register 1
- R/W controls the 3 registers access (read or write):
0 = Write CR1, CR2 ,CR3,
1 = Read CR1, CR2, CR3.
- CF defines the Carrier Frequency as shown onTable 5.
Table 5: Carrier Frequency selection
- MOD sets the data Modulation type:
0 = On/Off Keying (OOK) modulation,
1 = Frequency Shift Keying (FSK) modulation.
- SOE enables the Strobe Oscillator:
0 = Disabled,
1 = Enabled,
Whatever SOE value has been programmed, a high level on STROBE sets the circuit into run mode.
- SR0/SR1 define the Strobe Ratio (SR) as shown on Table 6. SR is the ratio Sleep time over Run time and
Run time=TStrobe (where TStrobe is the Strobe oscillator period).
Table 6: Strobe Ratio selection
- DME enables the Data Manager:
0 = Disabled,
1 = Enabled.
Data are output on MOSI and the associated clock on SCLK.
- HE defines if a Header word is present (the bit HE is only active if DME=1):
0 = No header,
1 = Header.
Configuration Register 2 (CR2) defines the Identifier (ID) word content. The bits will be Manchester coded.
Table 7: Configuration Register 2
Table 8 describes the Configuration Register 3 (CR3).
Table 8: Configuration Register 3
bit 7bit 6bit 5bit 4bit 3bit 2bit 1bit 0
Bit name R/W CF MOD SOE SR1 SR0 DME HE
Reset value 11010100
CF Selected Frequency
0Not allowed
1868MHz
SR1 SR0 Strobe Ratio
00 3
0 1 7
10 15
11 31
bit 7bit 6bit 5bit 4bit 3bit 2bit 1bit 0
Bit name ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
Reset value 00000000
bit 7bit 6bit 5bit 4bit 3bit 2bit 1bit 0
Bit name DR1 DR0 MG MS PG - - -
Reset value 10000000
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
12
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
- DR0/DR1 define the Data Rate (before Manchester coding) as shown onTable 9.
Table 9: Data Rate selection
- MG sets the mixer gain:
0 = Normal,
1 = -17dB (typical).
- MS switches the MIXOUT pin:
0 = To the mixer output,
1 = To the IF input.
Table 10: Mixer and MIXOUTconfiguration
The combination MG=1, MS=1 is forbidden in any application. It configures the receiver in a test mode where
the mixer runs at fVCO/4.
- PG sets the phase comparator gain (see “The local oscillator PLL” chapter, page 4):
0 = High gain mode,
1 = Low gain mode.
DR1 DR0 Selected Ratio
0 0 1.0 - 1.4 kBd
0 1 2 - 2.7 kBd
1 0 4 - 5.3 kBd
1 1 8.6 - 10.6 kBd
MG MS Mixer Gain MIXOUT
0 0 Normal Mixer output
0 1 Normal IF input
1 0 Reduced Mixer output
1 1 Forbidden, mixer test mode only
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
13
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
STATE MACHINES
AFTER POR RESET STATE MACHINE
There are 3 different modes for the receiver.
Sleep mode corresponds to the low power consumption mode:
- if SOE=0, the whole receiver is shutdown,
- if SOE=1, the strobe oscillator remains active.
Configuration mode is used for writing or reading the internal registers. In this mode, the SPI is slave and the
receiver is enabled. The crystal oscillator is running and generates the clock for the SPI. This implies that before
the circuit is in sleep mode, a delay corresponding to the crystal oscillator wake-up time must be inserted
between the falling edge on RESETB and the start of the transmission on the SPI lines. The local oscillator is
running as well. This means that demodulated data can be read on DMDAT but are not sent by the SPI.
In Run mode, the receiver is enabled (crystal and local oscillators are running). It is either waiting for an RF
telegram or receiving one.
Figure 14 details the state machine after Power On Reset (POR). The state machine is synchronized by a
sampling clock at 615kHz (sampling period Ts=1.6µs), derivated from the crystal oscillator. The transition time
between state 1 and states 2 or 6 is less than 3 × Ts .
After POR, the circuit is in state 0 and configuration registers’ content is set to the reset value. This enables to
use ROMEO2 in a standalone configuration without any external control.
As long as a low level is applied on RESETB, the circuit stays in state 1. This configuration mode enables to write
or read the internal registers through the SPI interface.
Figure 14: After POR state machine
State 1
Configuration mode
SPI active and slave
RESETB=1
AND DME=0
State 2, see figure 15 State 6, see figure 16
State 0
Sleep mode
SPI disabled
RESETB=0
RESETB=1
AND DME=1
AND SOE=0
RESETB=1
AND DME=1
AND SOE=1
State 0b
Run mode
Raw data on MOSI
SPI disabled
Power-On Reset
Strobe Counter ≠ SR
AND STROBE=0
Strobe Counter=SR
OR STROBE=1
SPI slave
SPI master
SPI disabled
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
14
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
STATE MACHINE WITH STROBE OSCILLATOR CONTROL
Figure 15 details the state machine when the strobe oscillator is enabled (SOE=1).
Figure 15: State machine with strobe oscillator control
State 2:
The circuit is in Sleep mode, except for the Strobe oscillator and the Strobe counter.
State 3:
The circuit is waiting for a valid ID word. If ID or its complement is detected, the state machine advances to state
4. If not, it will go back into sleep mode (state 2) at the end of the Strobe period.
State 4:
ID or its complement has been detected, Data Manager is waiting for Header or its complement. Time-out
counter is running. This counter will count up to 66 (± 1) times the strobe oscillator period (TStrobe).
State 5:
If Header has been received, data and clock signals are output on the SPI port until End of Message indicates the
data sequence end. If the complement of Header has been received, output data are complemented too.
For all states:
At any time, a low level applied on RESETB during more than one Ts forces the state machine to state 1. When
the transition condition from one state to the next one is fulfilled, the transition time is one Ts (except for reaching
state 2). The transition time to state 2 is 2 × Ts (+ duration of the dummy byte if it is shifted out, only for transition
coming from state 5).
ID detected
AND HE=1
State 5
Run mode
Output data & clock
Waiting for End of Message
Header received
EOM received
Time-out State 4
Run mode
Reset and start Timer
Waiting for Header
State 3
Run mode
Waiting for ID word
State 2
Sleep mode
Reset and Start Strobe Counter
SPI master
ID detected
AND HE=0
Strobe Counter=SR
OR STROBE=1
Strobe Counter ≠ SR
AND STROBE pin released
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
15
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
STATE MACHINE WITH STROBE PIN CONTROL
Figure 16 details the state machine when the strobe oscillator is disabled (SOE=0).
Figure 16: State machine with STROBE pin control
State 6:
Programming SOE=0 sets ROMEO2 to state 6. The circuit is in Sleep mode.
State 7:
A high level applied on STROBE sets the circuit into state 7. If an ID or its complement is detected, the state
machine advances to state 8. If not, it will stay in state 7 as long as STROBE is high.
State 8:
After ID or its complement detection, ID byte is sent to the microcontroller on MOSI line at 310kBd. This warns
the microcontroller that data are received which means that an high level has to be maintained on STROBE. At
any time a low level applied on STROBE sets the circuit into state 6.
State 7
Run mode
Waiting for ID word
State 8
Run mode
Send an ID word
ID detected
State 10
Run mode
Output data & clock
State 6
Sleep mode
STROBE=0
STROBE=0
STROBE=0
STROBE=1
SPI master
State 9
Run mode
Waiting for Header
HE=1 HE=0
Header received
STROBE=0
State 11
Run mode
Output data
EOM received
STROBE=0
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
16
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
State 9:
If Header or its complement is detected, the state machine advances to state 10. If not, it will stay in state 9 as
long as STROBE is high.
State 10:
If Header has been received, data and clock signals are output on the SPI port. If the complement of Header has
been received, output data are complemented too. At any time a low level applied on STROBE sets the circuit
into state 6, after the current byte is fully transmitted.
State 11:
If data are received after a End of Message they are output on the MOSI pin without clock recovery.
For all states:
At any time, a low level applied on RESETB for more than one Ts forces the state machine to state 1. When the
transition condition from one state to the next one is fulfilled, the transition time is one Ts except reaching state 6.
The transition time for reaching state 6 is 2 × Ts (+ time needed to shift out a full byte if STROBE pin is forced to
low when in state 10).
STROBE OSCILLATOR
The Strobe Oscillator is a relaxation oscillator in which an external capacitor C5 is charged by an external
resistance R2 (refer to figure 17 and table 11). When a threshold is reached or exceeded C5 is discharged and
the cycle restarts. The period is: TStrobe=0.12 × R2 × C5.
The circuit may be forced into states 0b, 3, 7 etc. (see State Machine Diagrams) by setting the STROBE pin to
VCC. As VCC is above the oscillator threshold voltage referred to in the previous paragraph, the condition in which
the STROBE pin is set to VCC is internally detected and the oscillator pull-down circuitry disabled to limit the
current which must be supplied.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
17
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
1 General Parameters
1.2 Mean Supply Current 868MHz band, Strobe Ratio=7,
PG=0, see note 1 -1.051.45mA
1.4 Supply Current in Run
& Configuration Modes 868MHz band, PG=0 - 7.7 10.0 mA
1.5 Supply Current in Sleep Mode Strobe oscillator enabled - 115 250 µA
1.6 Strobe oscillator disabled - 90 200 µA
1.8 Supply Current in Run
& Configuration Modes 868MHz band, PG=1 - 7.4 9.6 mA
1.9
Sleep Mode to Run Mode Delay
Circuit ready to receive,
OOK modulation -1.01.8ms
1.10
Circuit ready to receive,
FSK modulation,
fdata is the data rate in kBd
-
0.7 +
3 /
fdata
1.4 +
3 /
fdata
ms
1.11 Run Mode to Sleep Mode Delay
Measured between
falling edge on STROBE
and supply current reduced to 10%
-0.1- ms
Note 1: If IRun and ISleep are the supply currents in Run and Sleep modes and SR is the Strobe Oscillator Ratio,
the Mean Supply Current IMean is given by: IMean=(IRun + SR × ISleep) / (SR + 1).
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
18
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
2
RF Parameters
General and Front End parameters assume a 50Ω resistor in parallel with the D.U.T. except where the use of
a matching network is specified.
2.1.1
Sensitivity in OOK
at nominal transmitter
center frequency
DME=0, with matching network,
see notes 2, 3, 5, 6 - -105 -96 dBm
2.1.2 " " DME=1, with matching network,
see notes 2, 4, 5, 6 - -103 -94 dBm
2.1.3 " " DME=0, see notes 2, 3, 6 - -96 -87 dBm
2.1.4 " " DME=1, see notes 2, 4, 6 - -94 -85 dBm
2.2.1
Sensitivity in OOK
at nominal transmitter
center frequency
Operating temperature range
-20°C to +85°C
DME=0, with matching network,
see notes 2, 3, 5, 6 - -105 -98 dBm
2.2.2 " " DME=1, with matching network,
see notes 2, 4, 5, 6 - -103 -96 dBm
2.2.3 " " DME=0, see notes 2, 3, 6 - -96 -89 dBm
2.2.4 " " DME=1, see notes 2, 4, 6 - -94 -87 dBm
2.3.1
Sensitivity in FSK
at nominal transmitter
center frequency
DME=0, with matching network,
see notes 3, 5, 6 - -105 -99 dBm
2.3.2 DME=1, with matching network,
see notes 4, 5, 6 - -103 -97 dBm
2.3.3 DME=0, see notes 3, 6 - -96 -90 dBm
2.3.4 DME=1, see notes 4, 6 - -94 -88 dBm
2.6.1
Sensitivity in FSK
Transmitter frequency shift at +/-40kHz
500kHz IF bandwidth
DME=1, see notes 4, 6
---86dBm
2.6.2
Transmitter frequency shift at +/-80kHz
500kHz IF bandwidth
DME=1, see notes 4, 6
---84dBm
2.8.2 Variation of DMDAT level,
FSK modulation 500kHz IF bandwidth, see note 7 -6 - 6 dB
2.11 Image Frequency Rejection 868MHz band 20 28 - dB
2.14 IP3
868MHz band,
measured at MIXOUT, min. value
for 2 pairs of frequencies (MHz):
(880.00, 891.70), (905.00, 941.70)
--20- dBm
2.15 Max. Detectable Input Signal
Level of a NRZ 1
OOK modulation,
TX modulation depth: 97.5% --14- dBm
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
19
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
2.33 Out-of-Band Jammer
desensitization for
OOK & FSK modulation
868MHz band, PG=1,
sensitivity reduced by 6dB
CW jammer at RF ±500kHz,
see note 4 -8-dBc
2.34 CW jammer at RF ±1MHz,
see note 4 -18- dBc
2.35 CW jammer at RF ±2MHz,
see note 4 -27- dBc
2.41 In-Band Jammer desensitization
868MHz band
sensitivity reduced by 6dB
OOK modulation,
CW jammer at RF ±50kHz, see note 4 --11- dBc
2.42 FSK modulation, ±35kHz deviation,
CW jammer at RF ±50kHz, see note 4 --7-dBc
2.45 Input Impedance: // Resistance 868MHz, level on RFIN ≤ -50dBm - 1.1 - kΩ
2.48 Input Impedance: // Capacitance 868MHz band - 1.4 - pF
2.52 Mixer Conversion Gain 868MHz band,
from RFIN to MIXOUT -53- dB
2.65 Mixer Gain Reduction 868MHz band,
when setting MG=1 -17- dB
2.66 Mixer Input Gain reduced by 1dB 868MHz band - -54 - dBm
2.57 Mixer AGC Settling Time RF rise time < 400ns,
10 to 90% rise time -4- µs
2.58 Mixer AGC Gain Decay Rate - 5 - dB/ms
2.60 Local Oscillator Leakage 868MHz band,
at matching network input, see note 5 --94-60dBm
Note 2: OOK Sensitivity vs Temperature characteristic (shown for parameters 2.1.4 & 2.2.4)
Parameters 2.1.1 to 2.1.3 and 2.2.1 to 2.2.3 characteristics vs temperature are similar.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
-95
-94
-93
-92
-91
-90
-89
-88
-87
-86
-85
-84
-83
-82
-81
-80
-40 -25 -10 5 20 35 50 65 80
Temperature (°C)
Typ.
Max
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
20
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
Note 3: Sensitivity measurement method with Data Manager disabled (DME=0)
A continuous Manchester coded 0 sequence (4.8kBd, OOK modulation depth: 100%, FSK modulation deviation:
35kHz, 50% duty cycle) is applied at RFIN. The mean value of the frequency of the output signal on MOSI is
measured over 200 cycles. The sensitivity is defined as the lowest input level during an NRZ one corresponding to
a mean output frequency deviation lower than 5% of the expected data rate.
Note 4: Sensitivity measurement method with Data Manager enabled (DME=1, HE=0)
A complete telegram (4.8kBd, OOK modulation depth: 100%, FSK modulation deviation: 35kHz, 50% duty cycle)
including preamble, ID word and data (80 random bits without Header) is applied at RFIN. The sensitivity is
defined as the lowest input level during an NRZ one necessary to achieve 0 Bit Error Rate (BER).
Note 5: 50Ω matching networks
868MHz band: C1=100pF, L1=27nH, L2=27nH
Tolerances: +/-10% for capacitances; +/-2% for inductor
Note 6: Sensitivity measurement conditions
* OOK & FSK Modulation (+/-35kHz) at 4.8kBd (50% duty cycle)
* 868MHz band (500kHz IF bandwidth)
* Performances include receiver crystal tolerance of +/-80ppm over temperature range i.e. +/-35kHz @ 868MHz
Note 7: FSK variation measurement conditions
A frequency modulated signal, carrier = 660kHz with ±35kHz deviation is injected at MIXOUT
Measure the DMDAT voltage swing at 660kHz, this will be DMDAT(Ref) in actual temperature/Vcc conditions
Measure the DMDAT voltage swing from
- Freq[1] = 660kHz - 120kHz to Freq[2] = 660kHz + 120kHz
DMDAT(Ref) / DMDAT(Freq[x]) is measured over the whole range Freq[1] to Freq[2]
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
21
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
3
IF filter, IF Amplifier, FM to AM Converter and Envelope Detector
The IF filter operates at approximately 660kHz.
2 different bandwidths are selectable by metal option eg. 300kHz and 500kHz.
3.2 IF High Cut Off Frequency
at -3dB IF bandwidth: 500kHz 850 940 - kHz
3.4 IF Low Cut Off Frequency
at -3dB IF bandwidth: 500kHz - 460 520 kHz
3.7 IF Cut Off Low Freq. at -30dB IF bandwidth: 500kHz - 290 - kHz
3.8 IF Cut Off High Freq. at -30dB - 1260 - kHz
3.10 IF Bandwidth at -3dB IF bandwidth: 500kHz - 480 580 kHz
3.12 Total filter gain variation
within -3dB Bandwidth IF bandwidth: 500kHz -3 - 3 dB
3.13 IF Amplifier Gain From MIXOUT to DMDAT - 55 - dB
3.14 IF AGC Dynamic Range
OOK modulation
-55- dB
3.15 IF AGC Gain Decay Rate - 2.5 - dB/ms
3.16 IF Amplifier AGC Settling Time - 75 200 µs
3.17 Detector Output
Signal Amplitude OOK modulation, measured at DMDAT - 260 - mVpk-pk
3.19 Carrier Deviation FSK modulation, IF bandwidth 500kHz ±35 - ±80 kHz
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
22
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
4 PLL Divider & Crystal Oscillator
4.1 Maximum Crystal
Series Resistance --200Ω
5 Data Filter & Slicer, Data Manager, SPI
5.1 Data Frequency OOK and FSK modulations, DME=0 1 - 11 kHz
5.2
Low pass filter delay
2nd order Butterworth response
DR1=0, DR0=0, 1200 bauds 51 73 102 µs
5.3 DR1=0, DR0=1, 2400 bauds 30 42 57 µs
5.4 DR1=1, DR0=0, 4800 bauds 19 25 34 µs
5.5 DR1=1, DR0=1, 9600 bauds 12 16 22 µs
5.6
Data Rate Range
for Clock Recovery
DR1=0, DR0=0 1.0 - 1.4 kBd
5.7 DR1=0, DR0=1 2 - 2.7 kBd
5.8 DR1=1, DR0=0 4 - 5.3 kBd
5.9 DR1=1, DR0=1 8.6 - 10.6 kBd
5.10 Input Low Voltage Pins MOSI, SCLK, RESETB 0 - 0.3 ×
VCC
V
5.11 Input High Voltage 0.7 ×
VCC
-VCC V
5.13 Input Pull Down Current Pins MOSI, SCLK, RESETB, VIN=VCC -2-µA
5.14 Output Low Voltage Pins MOSI, MISO, SCLK,
|ILOAD| =10µA
00.02
0.2 ×
VCC
V
5.15 Output High Voltage 0.8 ×
VCC
4.97 VCC V
5.16 Fall/Rise Time Pins MOSI, MISO, SCLK, CLOAD = 5pF,
from 10% to 90% of the output swing --100ns
5.17 Input Low Voltage Pin STROBE used as digital input 0-0.5V
5.18 Input High Voltage 4.4 - VCC V
5.19 Input Pull Down Current Pin STROBE used as digital input,
VIN=VCC --50µA
5.20 SPI data rate
On MOSI, MISO & SCLK,
SPI master or slave,
see note 8
--310kBd
5.21 SPI interface source current
VOH=0.8 × VCC MOSI, MISO, SCLK pins
60 170 - µA
5.22 SPI interface sink current
VOL=0.2 × VCC
60 220 - µA
Note 8: As well as the state machine, the SPI interface is synchronized by a sampling clock at 615kHz derivated
from the crystal oscillator. The maximum speed is then half this synchronization clock.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
23
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
6 Strobe Oscillator (SOE=1)
6.1 Strobe Oscillator Period
(TStrobe) Range TStrobe=0.12 × R2 × C5,
see figure 17
23.887 ms
6.9 External Capacitor (C5) - 68 330 nF
6.10 External Resistor (R2) - 470 2200 kΩ
6.2 Strobe Oscillator
Period Accuracy
TJ=25°C, VCC=5V,
external components R2 & C5 fixed -5 - 5 %
6.3 Strobe Oscillator Period
Temperature Coefficient -0.05- %/°C
6.4 Strobe Oscillator Period
Supply Voltage Coefficient (∆TStrobe/TStrobe)/(∆VCC/VCC)-0.2- -
6.5 Sink Output Resistance
Pin STROBE
-6-kΩ
6.7 High Threshold Voltage - 1.0 - V
6.8 Low Threshold Voltage - 0.45 - V
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VCC=[4.5V;5.5V], operating temperature range TA=[-40°C;+85°C]. Values refer to
the circuit in recommended in the application schematic (see figure 17), unless otherwise specified. Typical
values reflect average measurement at VCC=5V, TA=25°C, using MC33593 (500kHz IF bandwidth).
Parameter Test Conditions, Comments
Limits
Unit
Min. Typ. Max.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
24
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
APPLICATION SCHEMATIC
Figure 17: Application schematic
Component description: see tables 11, 13 and 13.
MC33593
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
25
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
Table 11: Component description
R2 and C5 values correspond to a strobe oscillator period TStrobe=3.8ms.
Exemple of crystal reference is given below.
Table 12: Typical crystal characteristics (SMD package)
CAGC capacitor is data rate related in FSK modulation.
Table 13: C2 value versus data rate in FSK modulation
Component Function Value Unit
Q Reference oscillator crystal 868MHz band: 13.5775 MHz
R1 Current reference resistor 180 ± 1% kΩ
R2 Strobe oscillator resistor 470 kΩ
C1 Crystal load capacitor 10 pF
C2
- OOK modulation -
IF amplifier AGC capacitor 100 ± 10% nF
- FSK modulation -
Low pass filter capacitor See table 13
C3 AFC capacitor 100 ± 10% pF
C4 Mixer AGC capacitor 10 ± 10% nF
C5 Strobe oscillator capacitor 68 nF
C6 Power supply
decoupling capacitor
100 nF
C7 100 pF
C8 1 nF
C9 Crystal DC
decoupling capacitor 10 nF
Parameter NDK LN-G102-955 (for 868MHz) Unit
Crystal frequency 13.5775MHz MHz
Load capacitance 12 pF
Motional capacitance 4.8 fF
Static capacitance 1.43 pF
Max loss resistance 50 Ω
Data Rate Unit
1.2 2.4 4.8 9.6 kBd
C2 100 ± 10% 47 ± 10% 22 ± 10% 12/10 ± 10% nF
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
CASE OUTLINE DIMENSIONS
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
N o n D i s c l o s u r e A g r e e m e n t R e q u i r e d
MOTOROLA SEMICONDUCTORS PRODUCTS
27
revision 7.0, 5 February 2002
© Motorola, Inc., 2002.
NOTES
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MC33593
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including
“Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the
rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal
injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold
Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office.
Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. All other product or service names are the property of their respective owners.
© Motorola, Inc. 2002
HOW TO REACH US:
USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution: P.O. Box 5405, Denver, Colorado 80217.
1-303-675-2140 or 1-800-441-2447
JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan.
81-3-3440-3569
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tao Po, N.T.,
Hong Kong. 852-26668334
TECHNICAL INFORMATION CENTER: 1-800-521-6274
HOME PAGE: http://motorola.com/semiconductors/
MC33593/D
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
