Surface Mount RF PIN Diodes
Technical Data
Features
Diodes Optimized for:
Low Capacitance Switching
Low Current Attenuator
Surface Mount SOT-23
Package
Single and Dual Versions
Tape and Reel Options
Available
Low Failure in Time (FIT)
Rate[1]
Lead-free Option Available
Note:
1. For more information see the
Surface Mount PIN Reliability Data
Sheet.
HSMP-383x Series
Package Lead Code
Identification (Top View)
Description/Applications
The HSMP-383x series of general
purpose PIN diodes are designed
for two classes of applications.
The first is attenuators where
current consumption is the most
important design consideration.
The second application for this
series of diodes is in switches
where low capacitance is the
driving issue for the designer.
The HSMP-386x series Total
Capacitance (CT) and Total
Resistance (RT) are typical
specifications. For applications
that require guaranteed perfor-
mance, the general purpose
HSMP-383x series is recom-
mended.
A SPICE model is not available
for PIN diodes as SPICE does not
provide for a key PIN diode
characteristic, carrier lifetime.
COMMON
CATHODE
#4
COMMON
ANODE
#3
SERIES
#2
SINGLE
#0
2
Absolute Maximum Ratings[1] TC = 25°C
Symbol Parameter Units Absolute Maximum
IfForward Current (1 ms Pulse) Amp 1
PtTotal Device Dissipation mW[2] 250
Piv Peak Inverse Voltage Same as V
BR
TjJunction Temperature °C 150
TSTG Storage Temperature °C -65 to 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to
this device.
2. CW Power Dissipation at TLEAD = 25°C. Derate to zero at maximum rated temperature.
PIN General Purpose Diodes, Electrical Specifications TC = 25°C
Minimum Maximum Maximum
Part Package Breakdown Series Total
Number Marking Lead Voltage Resistance Capacitance
HSMP- Code[1] Code Configuration VBR (V) RS ()C
T (pF)
3830 K0 0 Single 200 1.5 0.3
3832 K2 2 Series
3833 K3 3 Common Anode
3834 K4 4 Common Cathode
Test Conditions VR = VBR IF = 100 mA VR = 50 V
Measure f = 100 MHz f = 1 MHz
IR 10 mA
Typical Parameters at TC = 25°C
Part Number Series Resistance Carrier Lifetime Reverse Recovery Time Total Capacitance
HSMP- RS ()τ (ns) Trr (ns) CT (pF)
383x 20 500 80 0.20 @ 50 V
Test Conditions IF = 1 mA IF = 50 mA VR = 10 V
f = 100 MHz IR = 250 mA IF = 20 mA
90% Recovery
Note:
1. Package marking code is white.
3
Typical Parameters at TC = 25°C (unless otherwise noted), Single Diode
Figure 2. RF Capacitance vs. Reverse
Bias.
0.15
0.30
0.25
0.20
0.35
02 64101281614 18 20
TOTAL CAPACITANCE (pF)
REVERSE VOLTAGE (V)
1 GHz
100 MHz
1 MHz
120
110
100
90
80
70
60
50
40
1000 100 10
Diode Mounted as a
Series Attenuator
in a 50 Ohm Microstrip
and Tested at 123 MHz
DIODE RF RESISTANCE ()
Figure 4. 2nd Harmonic Input
Intercept Point vs. Diode RF
Resistance for Attenuators.
INPUT INTERCEPT POINT (dBm)
120
115
110
105
100
95
90
85
11030
I
F
– FORWARD BIAS CURRENT (mA)
Figure 5. 2nd Harmonic Input
Intercept Point vs. Forward Bias
Current for Switches.
INPUT INTERCEPT POINT (dBm)
Diode Mounted as a
Series Attenuator in a
50 Ohm Microstrip and
Tested at 123 MHz
100
10
1
0.1
0.01
0 0.2 0.4 0.6 0.8 1.0 1.2
I
F
– FORWARD CURRENT (mA)
V
F
– FORWARD VOLTAGE (mA)
Figure 1. Forward Current vs.
Forward Voltage.
125°C 25°C–50°C
1000
100
10
10 20 30
T
rr
- REVERSE RECOVERY TIME (nS)
FORWARD CURRENT (mA)
Figure 6. Reverse Recovery Time vs.
Forward Current for Various Reverse
Voltage.
HSMP-3830
V
R
= 5V
V
R
= 10V
V
R
= 20V
Figure 3. RF Resistance at 25°C vs.
Forward Bias Current.
1000
100
10
1
0.1
RF RESISTANCE (OHMS)
I
F
– FORWARD BIAS CURRENT (mA)
0.01 0.1 1 10 100
4
Typical Applications for Multiple Diode Products
Figure 7. Simple SPDT Switch, Using Only Positive
Current.
Figure 8. High Isolation SPDT Switch, Dual Bias.
Figure 9. Switch Using Both Positive and Negative
Current.
Figure 10. Very High Isolation SPDT Switch, Dual Bias.
RF COMMON
RF 1
BIAS 1
RF 2
BIAS 2
RF COMMON
BIAS BIAS
RF 2
RF 1
RF COMMON
RF 1 RF 2
BIAS
RF COMMON
RF 2
RF 1
BIAS
5
Typical Applications for Multiple Diode Products (continued)
INPUT RF IN/OUT
Figure 11. Four Diode π Attenuator. See AN1048 for details.
FIXED
BIAS
VOLTAGE
VARIABLE BIAS
Figure 12. High Isolation SPST Switch
(Repeat Cells as Required).
BIAS
6
Package Dimensions
Outline 23 (SOT-23)
PC Board Footprints
SOT-23
0.037
0.95
0.037
0.95
0.079
2.0
0.031
0.8
DIMENSIONS IN inches
mm
0.035
0.9
Package Characteristics
Lead Material ...................................................................................... Alloy 42
Lead Finish ............................................................................ Tin-Lead 85-15%
Maximum Soldering Temperature .............................. 260°C for 5 seconds
Minimum Lead Strength .......................................................... 2 pounds pull
Typical Package Inductance .................................................................. 2 nH
Typical Package Capacitance .............................. 0.08 pF (opposite leads)
3
12
SIDE VIEW
TOP VIEW
END VIEW
DIMENSIONS ARE IN MILLIMETERS
(
INCHES
)
1.02 (0.040)
0.89 (0.035)
0.60 (0.024)
0.45 (0.018)
1.40 (0.055)
1.20 (0.047)
2.65 (0.104)
2.10 (0.083)
3.06 (0.120)
2.80 (0.110)
2.04 (0.080)
1.78 (0.070)
1.02 (0.041)
0.85 (0.033)
0.152 (0.006)
0.066 (0.003)
0.10 (0.004)
0.013 (0.0005)
0.69 (0.027)
0.45 (0.018)
0.54 (0.021)
0.37 (0.015)
X X X
PACKAGE
MARKING
CODE (XX)
DATE CODE (X)
Profile Option Descriptions
-BLK = Bulk
-TR1 = 3K pc. Tape and Reel, Device Orientation; See Figure 13
-TR2 = 10K pc. Tape and Reel, Device Orientation; See Figure 13
Tape and Reeling conforms to Electronic Industries RS-481, Taping of
Surface Mounted Components for Automated Placement.
For lead-free option, the part number will have the character "G" at the
end, eg. -TR2G for a 10K pc lead-free reel.
Ordering Information
Specify part number followed by option. For example:
HSMP - 383x - XXX
Bulk or Tape and Reel Option
Part Number
Surface Mount PIN Diode
7
Figure 13. Options -TR1, -TR2 for SOT-23 Packages.
Tape Dimensions and Product Orientation
For Outline SOT-23
Note: "AB" represents package marking code.
"C" represents date code.
END VIE
W
8 mm
4 mm
TOP VIEW
ABC ABC ABC ABC
Device Orientation
For Outlines SOT-23
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
9° MAX
A0
P
P0
D
P2
E
F
W
D1
Ko 8° MAX
B0
13.5° MAX
t1
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
CAVITY
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t1
8.00 + 0.30 – 0.10
0.229 ± 0.013
0.315 + 0.012 – 0.004
0.009 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
BETWEEN
CENTERLINE
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Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
Obsoletes 5968-7688E
March 24, 2004
5989-0484EN