PA1
ANTENNA
RFIN1
LMV232
RF
INPUT
OUT
R1
6.2 k:RFIN2
PA2
RF
INPUT
FB
BS SD
VDD GND
A3
B3
C1
B1
A1
C3
C2
A2
R3
50:
C1
1.5 nF
COUPLER
COUPLER
TO BASEBAND
R2
50:
LMV232
www.ti.com
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
LMV232 Dual-Channel Integrated Mean Square Power Detector for CDMA & WCDMA
Check for Samples: LMV232
1FEATURES DESCRIPTION
The LMV232 dual RF detector is designed for RF
• >20 dB Square-Law Detection Range transmit power measurement in mobile phones. This
• 2 Sequentially Selectable RF Inputs dual mean square IC is especially suited for accurate
• Low Power Consumption Shutdown Mode power measurement of RF signals exhibiting high
peak-to-average ratios used in 3G and UMTS/CDMA
• Externally Configurable Gain and LF Filter applications. The LMV232 saves calibration steps
Bandwidth. and system certification and is highly accurate. The
• Internal 50ΩRF Termination Impedance circuit operates with a single supply from 2.5 to 3.3V.
• Optimized for Use with 20 dB Directional The LMV232 contains a mean square detector with
Coupler two sequentially selectable RF inputs. The RF input
• Lead Free 8-Bump DSBGA Package 1.5 x 1.5 x power range of the device has been optimized for use
0.6 mm with a 20 dB directional coupler, without the need for
additional external components. A single external RC
combination between FB and OUT provides an
APPLICATIONS externally configurable gain and LF filter bandwidth of
• 3G Mobile Communications the device.
• UMTS The device has two digital interfaces. A shutdown
• WCDMA function is available to set the device in a low-power
• CDMA2000 shutdown mode. In case SD = HIGH, the device is in
shutdown, if SD = LOW the device is active. The
• TD-SCDMA Band-Select function controls the selection of the
• RF Control active RF input channel. In case BS = HIGH, RFIN1 is
• Wireless LAN active. In case BS = LOW, RFIN2 is active.
• PC Card and GPS Modules The dual mean square detector is offered in an 8-
bump DSBGA 1.5 x 1.5 x 0.6 mm package. This
DSBGA package has the smallest footprint and
height.
TYPICAL APPLICATION
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LMV232
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1)(2)
Supply Voltage VDD - GND 3.6V Max
ESD Tolerance (3) Human Body Model 2000V
Machine Model 200V
Storage Temperature Range -65°C to 150°C
Junction Temperature (4) 150°C Max
Mounting Temperature Infrared or Convection (20 sec) 235°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Human body model: 1.5 kΩin series with 100 pF. Machine model, 0Ωin series with 100 pF.
(4) The maximum power dissipation is a function of TJ(MAX) ,θJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.
OPERATING RATINGS (1)
Supply Voltage 2.5V to 3.3V
Operating Temperature Range -40°C to +85°C
RF Frequency Range 50 MHz to 2 GHz
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
2.7 DC AND AC ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ= 25°C. Boldface limits apply at temperature extremes. (1)
Symbol Parameter Condition Min Typ Max Units
IDD Supply Current Active Mode: SD = LOW, No RF 9.8 11 mA
Input Power Present 13
Shutdown: SD = 1.8V, No RF Input 0.09 5 μA
Power Present 30
VLOW BS and SD Logic Low Level (2) 0.8 V
VHIGH BS and SD Logic High Level (2) 1.8 V
IBS, ISD Current into BS and SD pins 5µA
VOUT Output Voltage Swing From Positive Rail, Sourcing, 20 80 mV
FB = 0V, IOUT = 1 mA 90
From Negative Rail, Sinking, 20 60 mV
FB = 2.7V, IOUT =−1 mA 70
IOUT Output Short Circuit Sourcing, FB = 0V, VOUT = 2.6V 3.7 5.1 mA
2.7
Sinking, FB = 2.7V, VOUT = 0.1V 3.7 5.5
2.7
235 275
VOUT Output Voltage (Pedestal) No RF Input Power 254 mV
230 280
Pedestal Variation Over
VPED 5.4 mV
Temperature (3)
Offset Current Variation Over
IOS 1.17 µA
Temperature (3)
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ> TA.
(2) All limits are specified by design or statistical analysis.
(3) Typical numbers represent the 3-sigma value of 10k units. 3-sigma value of variation between −40°C / 25°C and variation between 25°C
/ 85°C.
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Product Folder Links: LMV232
A1
RFIN1
B1
GND
C1
RFIN2
C3
SD
B3
VDD
A3
OUT
A2
FB
C2
BS
LMV232
www.ti.com
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
2.7 DC AND AC ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ= 25°C. Boldface limits apply at temperature extremes. (1)
Symbol Parameter Condition Min Typ Max Units
No RF Input Power Present, Output 2.0 6.0
tON Turn-on-Time (4) μs
Loaded with 10 pF
tRRise Time (5) Step from No Power to 0 dBm 4.5 μs
Applied, Output Loaded with 10 pF
RF Input = 1800 MHz, -10 dBm,
enOutput Referred Voltage Noise 400 nV/
Measured at 10 kHz
GBW Gain Bandwidth Product 3.7 MHz
1.8
SR Slew Rate 3.0 V/μs
1.0
RIN DC Resistance See (5) 50.8 Ω
-11 dBm
+13
PIN RF Input Power Range(6)(7) RF Input Frequency = 900 MHz -24 dBV
0
900 MHz 21
1800 MHz 10
KDET Detection Slope μA/mW
1900 MHz 10
2000 MHz 10
Lower −3 dB Point of Detection
fLOW LF Input Corner Frequency 60 MHz
Slope
Upper −3 dB Point of Detection
fHIGH HF Input Corner Frequency 1.0 GHz
Slope
900 MHz 58
1800 MHz 62
AISO Channel Isolation dB
1900 MHz 58
2000 MHz 55
(4) Turn-on time is measured by connecting a 10 kΩresistor to the RFIN/ENpin. Be aware that in the actual application on the front page,
the RC-time constant of resistor R2 and capacitor C adds an additional delay.
(5) Typical values represent the most likely parametric norm.
(6) Power in dBV = dBm + 13 when the impedance is 50Ω.
(7) Device is set in active mode with a 10 kΩresistor from VDD to RFIN/EN. RF signal is applied using a 50ΩRF signal generator AC
coupled to the RFIN/ENpin using a 100 pF coupling capacitor.
CONNECTION DIAGRAM
Figure 1. 8-Bump DSBGA - Top View
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Product Folder Links: LMV232
LMV232
-
+
FB
OUT
BS
RFIN2
A2
C1
RFIN1A1
DETECTOR +
A3
VDD
GND
SD
B3
C3 C2 B1
X2
LMV232
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
www.ti.com
Table 1. PIN DESCRIPTION
Pin Name Description
Power Supply B3 VDD Positive Supply Voltage
B1 GND Power Ground
Digital Inputs C3 SD Schmitt-triggered Shutdown. The device is
active for SD = LOW. For SD = HIGH, it is
brought into a low-power shutdown mode.
C2 BS Schmitt-triggered Band Select pin. When BS =
HIGH, RFIN1 is selected, when BS = LOW,
RFIN2 is selected.
Analog Inputs A1 RFIN1 RF Input connected to the coupler output with
optional attenuation to measure the Power
C1 RFIN2Amplifier (PA) / Antenna RF power levels. Both
RF inputs of the device are internally
terminated with a 50Ωresistance.
Feedback A2 FB Connected to inverting input of output amplifier.
Enables user-configurable gain and bandwidth
through external feedback network.
Output A3 Out Amplifier output
BLOCK DIAGRAMS
Figure 2. LMV232
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LMV232
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SNWS017C –DECEMBER 2004–REVISED MARCH 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified, VDD = 2.7V, TJ= 25°C, R1 = 6.2 kΩand C1 = 1.5 nF (See typical application).
Supply Current VOUT - VPEDESTAL
vs. vs.
Supply Voltage RF Input Power
Figure 3. Figure 4.
VOUT - VPEDESTAL Input Referred Error
vs. vs.
RF Input Power @ 900 MHz RF Input Power @ 900 MHz
Figure 5. Figure 6.
VOUT - VPEDESTAL Input Referred Error
vs. vs.
RF Input Power @ 1800 MHz RF Input Power @ 1800 MHz
Figure 7. Figure 8.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VDD = 2.7V, TJ= 25°C, R1 = 6.2 kΩand C1 = 1.5 nF (See typical application).
VOUT - VPEDESTAL Input Referred Error
vs. vs.
RF Input Power @ 1900 MHz RF Input Power @ 1900 MHz
Figure 9. Figure 10.
VOUT - VPEDESTAL Input Referred Error
vs. vs.
RF Input Power @ 2000 MHz RF Input Power @ 2000 MHz
Figure 11. Figure 12.
VOUT -VPEDESTAL Input Referred Error
vs. vs.
RF Input Power @ 1900 MHz RF Input Power @ 1900 MHz
Figure 13. Figure 14.
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Product Folder Links: LMV232
10k 100k 1M 10M 100M
FREQUENCY (Hz)
-40
-20
0
20
40
60
80
GAIN (dB)
GAIN
PHASE
-60
-30
0
30
60
90
120
PHASE (°)
LMV232
www.ti.com
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VDD = 2.7V, TJ= 25°C, R1 = 6.2 kΩand C1 = 1.5 nF (See typical application).
RF Input Impedance
vs. Gain and Phase
Frequency vs.
@ Resistance and Reactance Frequency
Figure 15. Figure 16.
Sourcing Current Sinking Current
vs. vs.
Output Voltage Output Voltage
Figure 17. Figure 18.
Output Voltage Output Voltage
vs. vs.
Sourcing Current Sinking Current
Figure 19. Figure 20.
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SNWS017C –DECEMBER 2004–REVISED MARCH 2013
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APPLICATION NOTES
The LMV232 mean square power detector is particularly suited for accurate power measurement of RF
modulated signals that exhibit large peak to average ratios, i.e. large variations of the signal envelope. Such
noise-like signals are encountered e.g. in CDMA and Wide-band CDMA cell-phones. Many power detection
circuits, particularly those devised for constant-envelope modulated signals as in GSM, are based on peak
detection and provide accurate power measurements for constant envelope or low-crest factor (ratio of peak to
RMS) signals only. Such detectors are therefore not particularly suited for CDMA and WCDMA applications.
TYPICAL APPLICATION
The LMV232 is especially suited for CDMA and WCDMA applications with 2 Power Amplifiers (PA’s). A typical
setup is given in Figure 21. The output power of one PA is measured at a time, depending on the bandselect pin
(BS). If the BS = High RFIN1 is used for measurements, if BS = Low RFIN2 is used. The measured output voltage
of the LMV232 is read by the ADC of the baseband chip and the gain of the PA is adjusted if necessary. With an
input impedance of 50Ω, the LMV232 can be directly connected to a 20 dB directional coupler without the need
for an additional external attenuator. The setup can be adjusted to various PA output ranges by selection of a
directional coupler or insertion of an additional (resistive) attenuator between the coupler outputs and the
LMV232 RF inputs.
The LMV232 conversion gain and bandwidth are configured by a resistor and a capacitor. Resistor R1 sets the
conversion gain from RFIN to the output voltage. A higher resistor value will result in a higher conversion gain.
The maximum dynamic range is achieved when the resistor value is as high as possible, i.e. the output signal
just doesn’t clip and the voltage stays within the baseband ADC input range. The filter bandwidth is adjusted by
capacitor C1. The capacitor value should be chosen such that the response time of the device is fast enough and
modulation on the RF input signal is not visible at the output (ripple suppression). The −3 dB filter bandwidth of
the output filter is determined by the time constant R1*C1. Generally a capacitor value of 1.5 nF is a good
choice.
PEAK TO AVERAGE RATIO SENSITIVITY
The LMV232 power detector provides an accurate power measurement for arbitrary input signals, low and high
peak-to-average ratios and crest factors. This is because its operation is not based on peak detection, but on
direct determination of the mean square value. This is the most accurate power measurement, since it exactly
implements the definition of power. A mean-square detector measures VRMS2for all waveforms. Peak detection is
less accurate because the relation between peak detection and mean square detection depends on the
waveform. A peak detector measures P = VPEAK2for all waveforms, while it should measures P = VPEAK2/2 (for R
= 1Ω) for a sine wave and P = VPEAK2/3 for a triangle wave for instance. For a CDMA signal, the measurement
error can be in the order of 5 to 6 dB. For many wave forms, specially those with high peak-to-average ratios,
peak detection is not accurate enough and therefore a mean square detector is recommended.
MEAN SQUARE CONFORMANCE ERROR
The LMV232 is a mean square detector and therefore should have an output voltage (in Volts) that linearly
relates to the RF input power (in mW). The input referred error, with respect to an ideal linear mean square
detector, is determined as a measure for the accuracy of the detector.
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Product Folder Links: LMV232
PA1
ANTENNA
RFIN1
LMV232
RF
INPUT
OUT
R1
6.2 k:RFIN2
PA2
RF
INPUT
FB
BS SD
VDD GND
A3
B3
C1
B1
A1
C3
C2
A2
R3
50:
C1
1.5 nF
COUPLER
COUPLER
TO BASEBAND
R2
50:
LMV232
www.ti.com
SNWS017C –DECEMBER 2004–REVISED MARCH 2013
Figure 21. Typical Application
The detection curves of Figure 22 show the detector response to RF input power. To show the complete dynamic
range on a logarithmic scale, the pedestal voltage (VPEDESTAL) is subtracted from the output. The pedestal
voltage is defined as the output voltage in the absence of an RF input signal (at 25°C). The best-fit ideal mean
square response is represented by the fitted curve in Figure 22. The input referred error of the detection curves
with respect to this best-fit mean square response is determined as follows:
• Determine the best-fit mean square response.
• Determine the output referred error between the actual detector response and the ideal mean square
response.
• Translate the output referred error to an input referred error.
Figure 22. Detection Curve
The best-fit linear curve is obtained from the detector response by means of linear regression. The output
referred error is calculated with the formula:
ErrordBV = 20*log[ (VOUT-VPEDESTAL)/(KDET*PIN) ]
Where,
Conversion gain of the ideal fitted curve KDET is in V/mW and the RF input power PIN in mW.
To translate this output referred error (in dB) to an input referred error, it has to be divided by a factor of 2. This
is due to the mean square characteristic of the device. The response of a mean square detector changes by 2
dB for every dB change of the input power. Figure 23 depicts the resulting curve.
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Figure 23. Input referred Error vs. RF Input Power
Analyzing Figure 23 shows that three sections can be distinguished:
• At higher power levels the error increases.
• A middle section where the error is constant and relatively small.
• At lower power levels the error increases again.
These three sections are leading back to three error mechanisms. At higher power levels the detectors output
starts to saturate because the output voltage approaches the maximum signal swing that the detector can
handle. The maximum output voltage of the device thus limits the upper end of the detection range. Also the
maximum allowed ADC voltage of the baseband chip can limit the detection range at higher power levels. By
adjusting the feedback resistor RFB of Figure 21 the upper end of the range can be shifted. This is valid until the
detector cell inside the LMV232 is the limiting factor.
The middle section of the error curve shows a small error variation. This is the section where the detector is used
and is called the detection range of the detector. This range is limited on both sides by a maximum allowed error.
For low input power levels, the variation of output voltage is very small. Therefore the measurement resolution
ADC is important in order to measure those small variations. Offsets and temperature variation impact the
accuracy at low power levels as well.
DETECTION ERROR OVER TEMPERATURE
Like any power detector device, the output signal of the LMV232 mean square power detector shows some
residual variation over temperature that limits it's dynamic range. The variation determines the accuracy and
range of input power levels for which the detector produces an accurate output signal.
The error over temperature is mainly caused by the variation of the pedestal voltage. Besides this, a minimal
error contribution leads back to the conversion gain variation of the detector. This conversion gain error is visible
in the mid-power range, where the temperature error curves of Figure 23 run parallel to each other. Since the
conversion gain variation is acceptable, the focus will be on the pedestal voltage variation over temperature.
The pedestal voltage at 25°C is subtracted from the output voltage of each curve. Variations of the pedestal
voltage over temperature are thus included in the error.
The pedestal voltage variation itself consists of 2 error sources. One is the variation of the reference voltage
VREF. The other is an offset current IOS that is generated inside the detector. This is depicted in Figure 24.
Depending on the measurement strategy one or both error sources can be eliminated.
The error sources of the pedestal voltage can be shown in a formula for VOUT:
VOUT = VREF + (IOS + IDET)*RFB
Where IDET represents the intended detector output signal. In the absence of RF input power IDET equals zero.
The formula for the pedestal voltage can therefore be written as:
VPEDESTAL = VREF + IOS * RFB
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ADC
-
+
FB
OUT
+
LMV232
VREF
RFB
IOS
IDET
+
-
-
+
FB
OUT
+
LMV232
VREF
RFB
IOS
IDET
LMV232
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SNWS017C –DECEMBER 2004–REVISED MARCH 2013
Figure 24. Pedestal Voltage
For low input power levels, the pedestal variation VPEDESTAL is the dominant cause of error. Besides temperature
variation of the pedestal voltage, which limits the lower end of the range, the pedestal voltage can also vary from
part-to-part. By applying a suitable measurement strategy, the pedestal voltage error contribution can be
significantly reduced or eliminated completely.
POWER MEASUREMENT STRATEGIES
This section describes the measurement strategies to reduce or eliminate the pedestal voltage variation. Which
strategy is chosen depends on the possibilities for a factory trim and implementation of calibration procedures.
Since the pedestal voltage is the reference level for the LMV232, it needs to be calibrated/measured at least
once to eliminate part-to-part spread. This is required to determine the exact detector output signal. Because of
process tolerances, the absolute part-to-part variation of the output voltage in the absence of RF input power will
be in the order of 5 - 10%. All measurement strategies discussed eliminate this part-to-part spread.
Strategy 1: Elimination of Part-to-Part Spread at Room Temperature Only
In this strategy, the pedestal voltage is determined once during manufacturing and stored into the memory of the
phone. At each power measurement this stored pedestal level is digitally subtracted from the measured output
signal of the LMV232 during normal operation. The procedure is thus:
• Measure the detector output in the absence of RF power during manufacturing.
• Store the output voltage value in the cell phone memory (after it is analog-to-digital converted).
• Subtract the stored value from each detector output reading.
Figure 25. Strategy 1: Room Temperature Calibration
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RFB ADC
-
+
FB
OUT
+
LMV232
VREF
IOS
IDET
-
+
LMV232
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The advantage of this strategy is that calibration is required only once during manufacturing and not during
normal operation. The disadvantage is the fact that this method neither compensates for the residual
temperature drift of the reference voltage VREF nor for offset current variations. Only part-to-part variations at
room temperature are eliminated by this strategy. Especially the residual temperature drift negatively affects the
measurement accuracy.
Strategy 2: Elimination of Temperature Spread in VREF
If software changes need to be reduced to a minimum and the baseband chip has a differential ADC, strategy 2
can be used to eliminate temperature variations of the reference voltage VREF. One pin of the ADC is connected
to FB and one is connected to OUT (Figure 26).
Figure 26. Strategy 2: Differential Measurement
The power measurement is independent of the reference voltage VREF, since the ADC reading is:
VOUT-VFB = (IOS + IDET)*RFB
The reading of the ADC obviously doesn’t contain the reference voltage source VREF anymore, but the
contribution of the offset current remains present. This measurement is performed during normal operation.
Therefore, it eliminates voltage reference variations over temperatures, as opposed to strategy 1. Also offset
variations in the op amp are eliminated in this strategy.
Strategy 3: Complete Elimination of Temperature Spread in Pedestal Voltage
The most accurate measurement is strategy 3, which eliminates the temperature variation of both the reference
voltage VREF and the offset current IOS. In this strategy, the pedestal voltage is measured regularly during
operation of the phone, and stored in the phone memory. For each power measurement, the stored value is
digitally subtracted from the (analog-to-digital converted) detector output signal. Since it measures the pedestal
voltage itself for calibration it compensates both for the reference voltage VREF as well as for the offset current
variation IOS. The frequency of the ‘calibration measurement’ can be significantly lower than those of power
measurements, depending on how fast the temperature of the device changes.
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Product Folder Links: LMV232
ADC
FB
OUT
LMV232
RFB
+
-
OFF
RF SIGNAL
BS
RFIN2
RFIN1
X2
LMV232
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SNWS017C –DECEMBER 2004–REVISED MARCH 2013
Figure 27. Strategy 3: Calibration during normal operation
The calibration measurement procedure can be explained with the aid of Figure 21, which depicts a typical power
measurement setup using the LMV232. In normal operation, the two PA’s in the setup will never be active at the
same time. One PA will produce the required transmit power, while the other one is off, (disabled) and produces
no power. The pedestal voltage should be measured in the absence of RF power. This can be achieved by
switching the Band Select (BS) pin such that the LMV232 input is selected where the disabled PA is connected
to. The pedestal voltage at no input power can be read at the output pin.
Using the Band Select (BS) control pin of the LMV232:
• Select the RF input that is connected to the disabled PA, by the BS pin.
• Measure the detector output.
• Store the result in the phone memory.
• Subtract the stored value from each detector power reading, until a new update is performed.
Important advantages of this approach are that no factory trim is required and the temperature drift of the
pedestal can be cancelled almost completely as well as the part-to-part spread. The remaining error is
determined by the resolution of the ADC. A slight disadvantage is that on average more than one detector
reading is required per power measurement. This overhead though can be made almost negligible in normal
circumstances.
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REVISION HISTORY
Changes from Revision B (March 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 13
14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LMV232
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV232TL/NOPB DSBGA YZR 8 250 178.0 8.4 1.7 1.7 0.76 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV232TL/NOPB DSBGA YZR 8 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 2
MECHANICAL DATA
YZR0008xxx
www.ti.com
TLA08XXX (Rev C)
0.600±0.075 D
E
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
4215045/A 12/12
D: Max =
E: Max =
1.54 mm, Min =
1.54 mm, Min =
1.479 mm
1.479 mm
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remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
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used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
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