LT3013B
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TYPICAL APPLICATION
DESCRIPTION
250mA, 4V to 80V
Low Dropout Micropower
Linear Regulator with PWRGD
The LT
®
3013B is a high voltage, micropower low dropout
linear regulator. The device is capable of supplying 250mA
of output current with a dropout voltage of 400mV. De-
signed for use in battery-powered or high voltage systems,
the low quiescent current (65μA operating) makes the
LT3013B an ideal choice. Quiescent current is also well
controlled in dropout.
Other features of the LT3013B include a PWRGD fl ag to
indicate output regulation. The delay between regulated
output level and fl ag indication is programmable with
a single capacitor. The LT3013B also has the ability to
operate with very small output capacitors. The regulator
is stable with only 3.3μF on the output while most older
devices require between 10μF and 100μF for stability.
Small ceramic capacitors can be used without any need
for series resistance (ESR) as is common with other
regulators. Internal protection circuitry includes reverse-
battery protection, current limiting, thermal limiting and
reverse-current protection.
The device is available with an adjustable output with a
1.24V reference voltage. The LT3013B regulator is avail-
able in the thermally enhanced 16-lead TSSOP and the low
profi le (0.75mm), 12-pin (4mm × 3mm) DFN package,
both providing excellent thermal characteristics.
5V Supply
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
FEATURES
APPLICATIONS
n Wide Input Voltage Range: 4V to 80V
n Low Quiescent Current: 65μA
n Low Dropout Voltage: 400mV
n Output Current: 250mA
n No Protection Diodes Needed
n Adjustable Output from 1.24V to 60V
n Stable with 3.3μF Output Capacitor
n Stable with Aluminum, Tantalum or Ceramic
Capacitors
n Reverse-Battery Protection
n No Reverse Current Flow from Output to Input
n Thermal Limiting
n Thermally Enhanced 16-Lead TSSOP and 12-Pin
(4mm × 3mm) DFN Package
n Low Current High Voltage Regulators
n Regulator for Battery-Powered Systems
n Telecom Applications
n Automotive Applications
Dropout Voltage
1μF
VIN
5.4V TO
80V
3013 TA01
VOUT
5V
250mA
3.3μF
750k
249k
1.6M
IN
LT3013B
PWRGD
OUT
ADJ
CT
GND
1000pF
OUTPUT CURRENT (mA)
0
250
300
400
350
200
3013 TA02
200
150
50 100 150 250
100
50
0
DROPOUT VOLTAGE (mV)
LT3013B
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IN Pin Voltage ........................................................ ±80V
OUT Pin Voltage ..................................................... ±60V
IN to OUT Differential Voltage ................................ ±80V
ADJ Pin Voltage ....................................................... ±7V
CT Pin Voltage ................................................. 7V, –0.5V
PWRGD Pin Voltage ...................................... 80V, –0.5V
Output Short-Circuit Duration ......................... Indefi nite
ABSOLUTE MAXIMUM RATINGS
12
11
10
9
8
7
13
1
2
3
4
5
6
NC
IN
IN
NC
NC
CT
NC
OUT
OUT
ADJ
GND
PWRGD
TOP VIEW
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
FE PACKAGE
16-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
17
GND
NC
OUT
OUT
ADJ
GND
PWRGD
GND
GND
NC
IN
IN
NC
NC
CT
GND
TJMAX = 125°C, θJA = 40°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
PIN CONFIGURATION
Storage Temperature Range
TSSOP Package ................................ –65°C to 150°C
DFN Package ..................................... –65°C to 125°C
Operating Junction Temperature Range
(Notes 3, 9, 10) ..................................... –40°C to 125°C
Lead Temperature (Soldering, 10 sec)
TSSOP Only ..................................................... 300°C
(Note 1)
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3013BEDE#PBF LT3013BEDE#TRPBF 3013B 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LT3013BEFE#PBF LT3013BEFE#TRPBF 3013BEFE 16-Lead Plastic TSSOP –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3013BEDE LT3013BEDE#TR 3013B 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LT3013BEFE LT3013BEFE#TR 3013BEFE 16-Lead Plastic TSSOP –40°C to 125°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LT3013B
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TJ = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage ILOAD = 250mA l4 4.5 V
ADJ Pin Voltage (Notes 2, 3) VIN = 4V, ILOAD = 1mA
4.5V < VIN < 80V, 1mA < ILOAD < 250mA l
1.225
1.2
1.24
1.24
1.255
1.28
V
V
Line Regulation ΔVIN = 4V to 80V, ILOAD = 1mA (Note 2) l0.1 5 mV
Load Regulation (Note 2) VIN = 4.5V, ΔILOAD = 1mA to 250mA
VIN = 4.5V, ΔILOAD = 1mA to 250mA
l7 12
25
mV
mV
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 4, 5)
ILOAD = 10mA
ILOAD = 10mA l
160 230
300
mV
mV
ILOAD = 50mA
ILOAD = 50mA l
250 340
420
mV
mV
ILOAD = 250mA
ILOAD = 250mA l
400 490
620
mV
mV
GND Pin Current
VIN = 4.5V
(Notes 4, 6)
ILOAD = 0mA
ILOAD = 100mA
ILOAD = 250mA
l
l
65
3
10
120
18
μA
mA
mA
Output Voltage Noise COUT = 10μF, ILOAD = 250mA, BW = 10Hz to 100kHz 100 μVRMS
ADJ Pin Bias Current (Note 7) 30 100 nA
PWRGD Trip Point % of Nominal Output Voltage, Output Rising l85 90 94 %
PWRGD Trip Point Hysteresis % of Nominal Output Voltage 1.1 %
PWRGD Output Low Voltage IPWRGD = 50μA l140 250 mV
CT Pin Charging Current 3.6 6 μA
CT Pin Voltage Differential VCT(PWRGD High) – VCT(PWRGD Low) 1.6 V
Ripple Rejection VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 250mA 65 75 dB
Current Limit VIN = 7V, VOUT = 0V
VIN = 4.5V, ΔVOUT = –0.1V (Note 2) l270
400 mA
mA
Reverse Output Current (Note 8) VOUT = 1.24V, VIN < 1.24V (Note 2) 12 25 μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3013B is tested and specifi ed for these conditions with the
ADJ pin connected to the OUT pin.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specifi cation will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT3013B is
tested and specifi ed for these conditions with an external resistor divider
(249k bottom, 549k top) for an output voltage of 4V. The external resistor
divider will add a 5μA DC load on the output.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specifi ed output current. In dropout, the
output voltage will be equal to (VIN – VDROPOUT).
Note 6: GND pin current is tested with VIN = 4.5V and a current source
load. This means the device is tested while operating close to its dropout
region. This is the worst-case GND pin current. The GND pin current will
decrease slightly at higher input voltages.
Note 7: ADJ pin bias current fl ows into the ADJ pin.
Note 8: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current fl ows into the OUT
pin and out the GND pin.
Note 9: The LT3013BE is guaranteed to meet performance specifi cations
from 0°C to 125°C operating junction temperature. Specifi cations over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
Note 10: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
LT3013B
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TYPICAL PERFORMANCE CHARACTERISTICS
Quiescent Current ADJ Pin Voltage Quiescent Current
GND Pin Current GND Pin Current
Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage
OUTPUT CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
300
400
600
500
3013 G01
200
100
010050 200150 250
TJ = 125°C
TJ = 25°C
OUTPUT CURRENT (mA)
0
GUARANTEED DROPOUT VOLTAGE (mV)
200
400
600
100
300
500
100 200
3013 G02
250500 150
= TEST POINTS TJ ≤ 125°C
TJ ≤ 25°C
TEMPERATURE (°C)
–50
0
DROPOUT VOLTAGE (mV)
200
600
500
050 75
3013 G03
100
400
300
–25 25 100 125
IL = 50mA
IL = 10mA
IL = 250mA IL = 100mA
IL = 1mA
TEMPERATURE (°C)
–50
ADJ PIN VOLTAGE (V)
1.255
25
3013 G05
1.240
1.230
–25 0 50
1.225
1.220
1.260
1.250
1.245
1.235
75 100 125
IL = 1mA
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
1.2
8
3013 G07
0.8
0.4
1.0
0.6
0.2
021 43 67 9
510
TJ = 25°C
*FOR VOUT = 1.24V
RL = 49.6Ω
IL = 25mA*
RL = 124Ω
IL = 10mA*
RL = 1.24k
IL = 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
6
8
10
8
3013 G08
4
2
5
7
9
3
1
021 43 67 9
510
TJ = 25°C, *FOR VOUT = 1.24V
RL = 4.96Ω
IL = 250mA*
RL = 12.4Ω
IL = 100mA*
RL = 24.8Ω, IL = 50mA*
Quiescent Current
0
40
120
100
20
80
60
–50 0 50 75
–25 25 100 150125
TEMPERATURE (°C)
QUIESCENT CURRENT (μA)
3013 G04
VIN = 6V
RL = ∞
IL = 0
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (μA)
40
60
80
8
3013 G06
20
10
30
50
70
021 43 67 9
510
TJ = 25°C
RL = ∞
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (μA)
150
200
250
80
3013 G06b
100
50
125
175
225
75
25
02010 4030 60 70
50
TJ = 25°C
RL = ∞
VOUT = 1.24V
LT3013B
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GND Pin Current vs ILOAD
TYPICAL PERFORMANCE CHARACTERISTICS
LOAD CURRENT (mA)
0
GND PIN CURRENT (mA)
6
8
10
3013 G09
4
2
5
7
9
3
1
010050 200150 250
VIN = 4.5V
TJ = 25°C
ADJ Pin Bias Current PWRGD Trip Point
PWRGD Output Low Voltage CT Charging Current CT Comparator Thresholds
Current Limit Current Limit Reverse Output Current
TEMPERATURE (°C)
–50
ADJ PIN BIAS CURRENT (nA)
45
25
3013 G13
25
20
–25 0 50
5
10
15
0
50
40
35
30
75 100 125
TEMPERATURE (°C)
–50
PWRGD TRIP POINT (% OF OUTPUT VOLTAGE)
94
25
3013 G25
90
89
–25 0 50
86
87
88
85
95
93
92
91
75 100 125
OUTPUT RISING
OUTPUT FALLING
TEMPERATURE (°C)
–50
PWRGD OUTPUT LOW VOLTAGE (mV)
180
25
3013 G26
100
80
–25 0 50
20
40
60
0
200
160
140
120
75 100 125
IPWRGD = 50μA
TEMPERATURE (°C)
–50
CT CHARGING CURRENT (μA)
3.5
25
3013 G27
1.5
1.0
–25 0 50
0.5
0
4.0
3.0
2.5
2.0
75 100 125
PWRGD TRIPPED HIGH
TEMPERATURE (°C)
–50
CT COMPARATOR THRESHOLDS (V)
1.8
25
3013 G28
1.0
0.8
–25 0 50
0.2
0.4
0.6
0
2.0
1.6
1.4
1.2
75 100 125
VCT (LOW)
VCT (HIGH)
INPUT VOLTAGE (V)
0
CURRENT LIMIT (A)
0.6
0.8
1.0
3013 G14
0.4
0.2
0.5
0.7
0.9
0.3
0.1
02010 4030 60 70
50 80
TJ = 25°C
TJ = 125°C
VOUT = 0V
TEMPERATURE (°C)
–50
0
CURRENT LIMIT (A)
0.1
0.3
0.4
0.5
0.7
050 75
3013 G15
0.2
0.6
–25 25 100 125
VIN = 7V
VOUT = 0V
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (μA)
120
160
200
8
3013 G16
80
40
100
140
180
60
20
021 43 67 9
510
TJ = 25°C
VIN = 0V
VOUT = VADJ
CURRENT FLOWS
INTO OUTPUT PIN ADJ
PIN CLAMP
(SEE APPLICATIONS
INFORMATION)
LT3013B
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TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation Output Noise Spectral Density
10Hz to 100Hz Output Noise Transition Response
Input Ripple Rejection Input Ripple Rejection
Minimum Input Voltage
TEMPERATURE (°C)
–50
60
RIPPLE REJECTION (dB)
68
92
80
84
88
050 75
3013 G18
64
76
72
–25 25 100 125
VIN = 4.5V + 0.5VP-P RIPPLE AT f = 120Hz
IL = 250mA
VOUT = 1.24V
FREQUENCY (Hz)
10
40
RIPPLE REJECTION (dB)
50
60
70
80
100 1k 10k 100k 1M
3013 G19
30
20
10
0
90
100 VIN = 4.5V + 50mVRMS RIPPLE
ILOAD = 250mA
COUT = 10μF
COUT = 3.3μF
TEMPERATURE (°C)
–50
MINIMUM INPUT VOLTAGE (V)
3.5
25
3013 G20
2.0
1.0
–25 0 50
0.5
0
4.0
3.0
2.5
1.5
75 100 125
ILOAD = 250mA
TEMPERATURE (°C)
–50
LOAD REGULATION (mV)
–4
–2
25
3013 G21
–12
–16
–25 0 50
–18
–20
0
–8
–6
–10
–14
75 100 125
$IL = 1mA TO 250mA
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRAL DENSITY (mV/√Hz)
1
10 1k 10k 100k
3013 G22
0.01 100
10 COUT = 3.3μF
ILOAD = 250mA
VOUT
100μV/DIV
1ms/DIV 3013B G23
COUT = 10μF
IL = 250mA
VOUT = VADJ
TIME (μs)
0
OUTPUT VOLTAGE
DEVIATION (V)LOAD CURRENT (mA)
–0.05
0.05
400
3013 G24
100
–0.10
–0.15
0
0.10
0.15
200
300
0100 200 300 500
VIN = 6V
VOUT = 5V
CIN = 3.3μF CERAMIC
COUT = 3.3μF CERAMIC
$ILOAD = 100mA TO 200mA
Reverse Output Current
TEMPERATURE (°C)
–50
REVERSE OUTPUT CURRENT (μA)
25
3013 G17
20
10
–25 0 50
5
0
35
30
25
15
75 100 125
VIN = 0V
VOUT = VADJ = 1.24V
LT3013B
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PIN FUNCTIONS
(DFN/TSSOP)
NC (Pins 1, 8, 9, 12/Pins 2, 11, 12, 15): No Connect. No
Connect pins may be fl oated, tied to IN or tied to GND.
OUT (Pins 2, 3/Pins 3, 4): Output. The output supplies
power to the load. A minimum output capacitor of 3.3μF
is required to prevent oscillations. Larger output capaci-
tors will be required for applications with large transient
loads to limit peak voltage transients. See the Applications
Information section for more information on output ca-
pacitance and reverse output characteristics.
ADJ (Pin 4/Pin 5): Adjust. This is the input to the error
amplifi er. This pin is internally clamped to ±7V. It has a
bias current of 30nA which fl ows into the pin (see curve
of ADJ Pin Bias Current vs Temperature in the Typical
Performance Characteristics). The ADJ pin voltage is
1.24V referenced to ground, and the output voltage range
is 1.24V to 60V.
GND (Pin 5/Pins 1, 6, 8, 9, 16): Ground.
PWRGD (Pin 6/Pin 7): Power Good. The PWRGD fl ag is
an open-collector fl ag to indicate that the output voltage
has come up to above 90% of the nominal output voltage.
There is no internal pull-up on this pin; a pull-up resistor
must be used. The PWRGD pin will change state from an
open-collector to high impedance after both the output
is above 90% of the nominal voltage and the capacitor
on the CT pin has charged through a 1V differential. The
maximum pull-down current of the PWRGD pin in the low
state is 50μA.
CT (Pin 7/Pin 10): Timing Capacitor. The CT pin allows
the use of a small capacitor to delay the timing between
the point where the output crosses the PWRGD thresh-
old and the PWRGD fl ag changes to a high impedance
state. Current out of this pin during the charging phase
is 3μA. The voltage difference between the PWRGD low
and PWRGD high states is 1.6V (see the Applications
Information Section).
IN (Pins 10, 11/Pins 13,14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input fi lter capacitor. In general, the
output impedance of a battery rises with frequency, so it is
advisable to include a bypass capacitor in battery-powered
circuits. A bypass capacitor in the range of 1μF to 10μF is
suffi cient. The LT3013B is designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reversed input, which can happen if
a battery is plugged in backwards, the LT3013B will act
as if there is a diode in series with its input. There will be
no reverse current fl ow into the LT3013B and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
Exposed Pad (Pin 13/Pin 17): Ground. The exposed
backside of the package is an electrical connection for
GND. As such, to ensure optimum device operation and
thermal performance, the Exposed Pad must be connected
directly to Pin 5/Pin 6 on the PC board.
LT3013B
8
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APPLICATIONS INFORMATION
The LT3013B is a 250mA high voltage low dropout regulator
with micropower quiescent current. The device is capable
of supplying 250mA at a dropout voltage of 400mV. Op-
erating quiescent current is only 65μA. In addition to the
low quiescent current, the LT3013B incorporates several
protection features which make it ideal for use in bat-
tery-powered systems. The device is protected against
both reverse input and reverse output voltages. In battery
backup applications where the output can be held up by
a backup battery when the input is pulled to ground, the
LT3013B acts like it has a diode in series with its output
and prevents reverse current fl ow.
Adjustable Operation
The LT3013B has an output voltage range of 1.24V to 60V.
The output voltage is set by the ratio of two external resis-
tors as shown in Figure 1. The device servos the output to
maintain the voltage at the adjust pin at 1.24V referenced
to ground. The current in R1 is then equal to 1.24V/R1 and
the current in R2 is the current in R1 plus the ADJ pin bias
current. The ADJ pin bias current, 30nA at 25°C, fl ows
through R2 into the ADJ pin. The output voltage can be
calculated using the formula in Figure 1. The value of R1
should be less than 250k to minimize errors in the output
voltage caused by the ADJ pin bias current.
The adjustable device is tested and specifi ed with the ADJ
pin tied to the OUT pin and a 5μA DC load (unless otherwise
specifi ed) for an output voltage of 1.24V. Specifi cations for
output voltages greater than 1.24V will be proportional to
the ratio of the desired output voltage to 1.24V; (VOUT/
1.24V). For example, load regulation for an output current
change of 1mA to 250mA is –7mV typical at VOUT = 1.24V.
At VOUT = 12V, load regulation is:
(12V/1.24V) • (–7mV) = –68mV
Output Capacitance and Transient Response
The LT3013B is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 3.3μF with an ESR of 3Ω or less is
recommended to prevent oscillations. The LT3013B is a
micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3013B, will increase the
effective output capacitor value.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specifi ed with EIA temperature char-
acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but they tend to have strong voltage
VIN
3013 F01
VOUT
R2
R1
+
R2
R1
VOUT = 1.24V
VADJ = 1.24V
IADJ = 30nA AT 25°C
OUTPUT RANGE = 1.24V TO 60V
+ (IADJ)(R2)1 +
IN
LT3013B
OUT
ADJ
GND
Figure 1. Adjustable Operation
LT3013B
9
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APPLICATIONS INFORMATION
and temperature coeffi cients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is avail-
able in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be signifi cant enough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verifi ed.
Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi-
lar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.
PWRGD Flag and Timing Capacitor Delay
The PWRGD fl ag is used to indicate that the ADJ pin volt-
age is within 10% of the regulated voltage. The PWRGD
pin is an open-collector output, capable of sinking 50μA
of current when the ADJ pin voltage is low. There is no
internal pull-up on the PWRGD pin; an external pull-up
resistor must be used. When the ADJ pin rises to within
10% of its fi nal reference value, a delay timer is started.
At the end of this delay, programmed by the value of the
capacitor on the CT pin, the PWRGD pin switches to a high
impedance and is pulled up to a logic level by an external
pull-up resistor.
To calculate the capacitor value on the CT pin, use the
following formula:
CIt
VV
TIME CT DELAY
CT HIGH CT LOW
=•
–
() ()
Figure 4 shows a block diagram of the PWRGD circuit. At
start-up, the timing capacitor is discharged and the PWRGD
pin will be held low. As the output voltage increases and
the ADJ pin crosses the 90% threshold, the JK fl ip-fl op
is reset, and the 3μA current source begins to charge the
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3013 F02
20
0
–20
–40
–60
–80
–100 04810
26 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100 25 75
3013 F03
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
Figure 2. Ceramic Capacitor DC Bias Characteristics
Figure 3. Ceramic Capacitor Temperature Characteristics
LT3013B
10
3013bfb
APPLICATIONS INFORMATION
QJ
K
VREF • 90%
ADJ
VCT(LOW)
~0.1V
VCT(HIGH) – VBE
(~1.1V)
ICT 3μA
CT
3013 F04
–
+
–
+
PWRGD
Figure 4. PWRGD Circuit Block Diagram
timing capacitor. Once the voltage on the CT pin reaches
the VCT(HIGH) threshold (approximately 1.7V at 25°C), the
capacitor voltage is clamped and the PWRGD pin is set to
a high impedance state.
During normal operation, an internal glitch fi lter will ignore
short transients (<15μs). Longer transients below the 90%
threshold will reset the JK fl ip-fl op. This fl ip-fl op ensures
that the capacitor on the CT pin is quickly discharged all
the way to the VCT(LOW) threshold before restarting the
time delay. This provides a consistent time delay after the
ADJ pin is within 10% of the regulated voltage before the
PWRGD pin switches to high impedance.
Current Limit and Safe Operating Area Protection
Like many IC power regulators, the LT3013B has safe op-
erating area protection. The safe operating area protection
decreases the current limit as the input voltage increases
and keeps the power transistor in a safe operating region.
The protection is designed to provide some output current
at all values of input voltage up to the device breakdown
(see curve of Current Limit vs Input Voltage in the Typical
Performance Characteristics).
The LT3013B is limited for operating conditions by maxi-
mum junction temperature. While operating at maximum
input voltage, the output current range must be limited;
when operating at maximum output current, the input
voltage range must be limited. Device specifi cations will
not apply for all possible combinations of input voltage
and output current. Operating the LT3013B beyond the
maximum junction temperature rating may impair the
life of the device.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components:
1. Output current multiplied by the input/output voltage
differential: IOUT • (VIN – VOUT) and,
2. GND pin current multiplied by the input voltage:
IGND • VIN.
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
The LT3013B series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
LT3013B
11
3013bfb
APPLICATIONS INFORMATION
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. Measured Thermal Resistance (TSSOP)
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
TOPSIDE BACKSIDE (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 2500 sq mm 62°C/W
Table 2. Measured Thermal Resistance (DFN)
COPPER AREA THERMAL RESISTANCE
TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 2500 sq mm 62°C/W
The thermal resistance junction-to-case (θJC), measured
at the Exposed Pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical
due to thermal limitations. Transient operation at high
input/output differentials is possible. The approximate
thermal time constant for a 2500sq mm 3/32" FR-4 board
with maximum topside and backside area for one ounce
copper is 3 seconds. This time constant will increase as
more thermal mass is added (i.e., vias, larger board, and
other components).
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is signifi cantly less
than the thermal time constant of the device and board.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input volt-
age range of 8V to 12V, an output current range of 0mA
to 250mA, and a maximum ambient temperature of 30°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX) • (VIN(MAX) – VOUT) + (IGND • VIN(MAX))
where:
I
OUT(MAX) = 250mA
V
IN(MAX) = 12V
I
GND at (IOUT = 250mA, VIN = 12V) = 8mA
So:
P = 250mA • (12V – 5V) + (8mA • 12V) = 1.85W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
1.85W • 50°C/W = 92.3°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX = 30°C + 92.3°C = 122.3°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 200mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
P1(48V in, 5mA load) = 5mA • (48V – 5V)
+ (200μA • 48V) = 0.23W
P2(48V in, 50mA load) = 200mA • (48V – 5V)
+ (8mA • 48V) = 8.98W
P3(72V in, 5mA load) = 5mA • (72V – 5V)
+ (200μA • 72V) = 0.35W
P4(72V in, 50mA load) = 200mA • (72V – 5V)
+ (8mA • 72V) = 13.98W
LT3013B
12
3013bfb
APPLICATIONS INFORMATION
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3,
and 1% for P4.
PEFF = 76%(0.23W) + 19%(8.98W) + 4%(0.35W)
+ 1%(13.98W) = 2.03W
With a thermal resistance in the range of 40°C/W to 62°C/W,
this translates to a junction temperature rise above ambi-
ent of 81°C to 125°C.
Protection Features
The LT3013B incorporates several protection features
which make it ideal for use in battery-powered circuits. In
addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input volt-
ages, and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation,
the junction temperature should not exceed 125°C.
Like many IC power regulators, the LT3013B has safe oper-
ating area protection. The safe area protection decreases
the current limit as input voltage increases and keeps
the power transistor inside a safe operating region for
all values of input voltage. The protection is designed to
provide some output current at all values of input voltage
up to the device breakdown. The SOA protection circuitry
for the LT3013B uses a current generated when the input
voltage exceeds 25V to decrease current limit. This cur-
rent shows up as additional quiescent current for input
voltages above 25V. This increase in quiescent current
occurs both in normal operation and in shutdown (see
curve of Quiescent Current in the Typical Performance
Characteristics).
The input of the device will withstand reverse voltages of
80V. No negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
The ADJ pin of the device can be pulled above or below
ground by as much as 7V without damaging the device.
If the input is left open circuit or grounded, the ADJ pin
will act like an open circuit when pulled below ground, and
like a large resistor (typically 100k) in series with a diode
when pulled above ground. If the input is powered by a
voltage source, pulling the ADJ pin below the reference
voltage will cause the device to try and force the current
limit current out of the output. This will cause the output to
go to a unregulated high voltage. Pulling the ADJ pin above
the reference voltage will turn off all output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current fl ow back into the output will follow
the curve shown in Figure 5. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (μA)
120
160
200
8
3013 F05
80
40
100
140
180
60
20
021 43 67 9
510
ADJ
PIN CLAMP
(SEE ABOVE)
TJ = 25°C
VIN = 0V
VOUT = VADJ
CURRENT FLOWS
INTO OUTPUT PIN
Figure 5. Reverse Output Current
LT3013B
13
3013bfb
TYPICAL APPLICATIONS
LT3013B Automotive Application
+
ADJ
OUTIN
LT3013B
GND
1μF 3.3μF
750k
VIN
12V
(LATER 42V) LOAD: CLOCK,
SECURITY SYSTEM
ETC
+
–
ADJ
OUTIN
LT3013B
GND
1μF 3.3μF
VIN
48V
(72V TRANSIENT)
LOAD:
SYSTEM MONITOR
ETC
NO PROTECTION
DIODE NEEDED!
NO PROTECTION
DIODE NEEDED!
3013 TA05
BACKUP
BATTERY
249k
750k
249k
LT3013B Telecom Application
Constant Brightness for Indicator LED over Wide Input Voltage Range
IN
LT3013B
1μF
RETURN
–48V
OUT
ADJ
GND
3013 TA06
3.3μF
RSET
ILED = 1.24V/RSET
–48V CAN VARY FROM –4V TO –80V
APPLICATIONS INFORMATION
regulator output, this current will be reduced depending
on the size of the resistor divider.
When the IN pin of the LT3013B is forced below the
OUT pin or the OUT pin is pulled above the IN pin, input
current will typically drop to less than 2μA. This can happen
if the input of the LT3013B is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit.
LT3013B
14
3013bfb
PACKAGE DESCRIPTION
DE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
4.00 p0.10
(2 SIDES)
3.00 p0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
1.70 p 0.10
0.75 p0.05
R = 0.115
TYP
R = 0.05
TYP
2.50 REF
16
127
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45o
CHAMFER
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(UE12/DE12) DFN 0806 REV D
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 p0.05
0.70 p0.05
3.60 p0.05
PACKAGE OUTLINE
3.30 p0.10
0.25 p 0.05
0.50 BSC
1.70 p 0.05
3.30 p0.05
0.50 BSC
0.25 p 0.05
LT3013B
15
3013bfb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
FE16 (BB) TSSOP 0204
0.09 – 0.20
(.0035 – .0079)
0o – 8o
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
134
5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 p0.05
0.65 BSC
4.50 p0.10
6.60 p0.10
1.05 p0.10
2.94
(.116)
3.58
(.141)
3.58
(.141)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
LT3013B
16
3013bfb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 0109 REV B • PRINTED IN USA
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MS8E Package
