©2008 Fairchild Semiconductor Corporation Rev. A1, October 2008
FQB8N60C / FQI8N60C
FQB8N60C / FQI8N60C
600V N-Ch annel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
7.5A, 600V, RDS(on) = 1.2 @VGS = 10 V
Low gate charge ( typical 28 nC)
Low Crss ( typical 12 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maxim um Ratings TC = 25°C unless otherwise noted
Thermal Char acteristics
* When mounted on the minimum pad size recommended (PCB Mount)
Symbol Parameter FQB8N60C / FQI8N60C Units
VDSS Drain-Source Voltage 600 V
IDDrain Current - Continuous (TC = 25°C) 7.5 A
- Continuous (TC = 100°C) 4.6 A
IDM Drain Current - Pulsed (Note 1) 30 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 230 mJ
IAR Avalanche Current (Note 1) 7.5 A
EAR Repetitive Avalanche Energy (Note 1) 14.7 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD
Power Dissipation (TA = 25°C)* 3.13 W
Power Dissipation (TC = 25°C) 147 W
- Derate above 25°C 1.18 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 0.85 °C/W
RθJA Thermal Resistance, Junction-to-Ambient* -- 40 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
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S
D
G
D2-PAK
FQB Series
I2-PAK
FQI Series
GS
D
GSD
October 2008
QFET
®
RoHS Compliant
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 7.3mH, IAS = 7.5 A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 7.5A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit ions Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA600 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.7 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V -- -- 1 µA
VDS = 480 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA2.0 -- 4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 3.75 A -- 1.0 1.2
gFS Forward Transconductance VDS = 40 V, ID = 3.75 A (Note 4) -- 8.7 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 965 1255 pF
Coss Output Capacitance -- 105 135 pF
Crss Reverse Transfer Capacitance -- 12 16 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 300 V, ID = 7.5A,
RG = 25
(Note 4, 5)
-- 16.5 45 ns
trTurn-On Rise Time -- 60.5 130 ns
td(off) Turn-Off De l a y Time -- 81 170 ns
tfTurn -Off Fa ll Time -- 64.5 140 n s
QgTotal Gate Cha rge VDS = 480 V, ID = 7.5A,
VGS = 10 V
(Note 4, 5)
-- 28 36 nC
Qgs Gate-Source Charge -- 4.5 -- nC
Qgd Gate-Drain Charge -- 12 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 7.5 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 30 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 7.5 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, I S = 7.5 A,
dIF / dt = 100 A/µs (Note 4)
-- 365 -- ns
Qrr Reverse Recovery Charge -- 3.4 -- µC
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
0 5 10 15 20 25 30
0
2
4
6
8
10
12
VDS = 300V
VDS = 120V
VDS = 48 0V
$ No t e : I D = 8A
VGS, G a te -S o u r ce Voltag e [V ]
QG, To ta l Ga te Cha rg e [n C ]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
101
150%
$ No te s :
1. V GS = 0V
2. 250&s Pu lse T e st
25%
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 5 10 15 20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VGS = 20V
VGS = 10V
$ Note : TJ = 25%
RDS(ON) ['],
Drain-Source On-Resistance
ID, Drain Current [A]
Typical Characteristics
Figure 5. Capacitanc e C haracterist i cs Figure 6. Gate Charge C haracter istics
Figure 3. On-Resistanc e Variation vs
Drain Current and Gate Voltage Figure 4 . Bod y Diode Fo rwa rd Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Charact er i stic s
10-1 100101
10-1
100
101
VGS
Top : 1 5 . 0 V
1 0.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Botto m : 5.0 V
$ Note s :
1. 250&s Pulse Test
2. T C = 2 5%
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
246810
10-1
100
101
150oC
25oC-55oC
$ Notes :
1 . V DS = 40V
2 . 2 50 &s Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
10-1 100101
0
200
400
600
800
1000
1200
1400
1600
1800
2000 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
$
N o te s ;
1 . V GS = 0 V
2. f = 1 M Hz
Crss
Coss
Ciss
C apacitanc e [pF]
VDS, Drain-Source Voltage [V]
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Rev. A, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
100101102103
10-2
10-1
100
101
102
100 m s
1 m s
10 µs
DC
10 m s
100 µs
Operation in This Area
is Limited by R DS(on)
$ Note s :
1. T C = 25 oC
2. T J = 150 oC
3. Sin g le P u ls e
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperat ure
Figu re 7. Br ea kdown Voltage Variati on
vs Temperature
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
$
N o te s :
1 . V GS = 0 V
2 . ID = 250 &A
BV DSS , (Norm alized)
D rain-S ource Breakdow n V oltage
TJ, Junction T em perature [oC]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
$ N o te s :
1 . V GS = 10 V
2 . ID = 4 A
RDS(ON) , ( Nor ma liz e d)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0
2
4
6
8
ID, Drain C u rre n t [A ]
TC, Case Temperature [%
]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
$ Notes :
1 . Z(JC(t) = 0 .85 %/W Ma x .
2 . Duty F a c tor, D = t1/t2
3 . TJM - T C = PDM * Z (JC(t)
s in gle p uls e
D=0.5
0.02
0.2
0.05
0.1
0.01
Z(JC
(t), T he rma l Re s po n s e
t1, S quare W ave Pulse Duration [sec]
Figure 11. Transient The rm al Response Cur ve
t1
PDM
t2
Figure 8. On-Resistance Variation
vs Temperature
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K)
200nF
12V
Same Type
as DUT
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K)
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
Peak Diode Recover y dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
Dimensions in Millimeters
Mechanical Dimensions
D2 - PAK
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Rev. A1, October 2008©2008 Fairchild Semiconductor Corporation
FQB8N60C / FQI8N60C
Mechanical Dimensions
Dimensions in Millimeters
I2 - PAK
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FQB8N60C / FQI8N60C
FQB8N60C / FQI8N60C Rev. A1www.fairchildsemi.com
Rev. I37
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