Features * * * * * * * * * * * * * * * * * Supply Voltage up to 40V Operating Voltage VS = 5V to 18V Typically 10 A Supply Current During Sleep Mode Typically 40 A Supply Current in Silent Mode Linear Low-drop Voltage Regulator: - Normal Mode: VCC = 5V 2%/50 mA - Silent Mode: VCC = 5V 7%/50 mA - Sleep Mode: VCC is Switched Off VCC Undervoltage Detection with Reset Output NRES (10 ms Reset Time) Voltage Regulator is Short-circuit and Over-temperature Protected LIN Physical Layer According to LIN Specification Revision 2.0 Wake-up Capability via LIN Bus (90 s Dominant) TXD Time-out Timer (9 ms) 60V Load-dump Protection at LIN Pin Bus Pin is Overtemperature and Short-circuit Protected versus GND and Battery High EMC Level 5V CMOS-Compatible I/O Pins to MCU ESD HBM 6kV at Pins LIN and VS Interference and Damage Protection According to ISO/CD7637 Package: SO8 LIN Bus Transceiver with Integrated Voltage Regulator ATA6620 1. Description ATA6620 is a fully integrated LIN transceiver, designed according to the LIN specification 2.0, with a low-drop voltage regulator (5V/50 mA). The combination of voltage regulator and bus transceiver makes it possible to develop simple, but powerful, slave nodes in LIN Bus systems. ATA6620 is designed to handle the low-speed data communication in vehicles (for example, in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20 kBaud with an RC oscillator for the protocol handling. The bus output is designed to withstand high voltage. Sleep mode (voltage regulator switched off) and Silent mode (communication off; VCC voltage on) guarantee minimized current consumption. Rev. 4850D-AUTO-02/06 Figure 1-1. Block Diagram VCC RXD 1 ATA6620 5 VS Normal and Pre-normal Mode Receiver 4 LIN Filter VCC Wake-up Bus Timer TXD TXD Time-out Timer 6 Short Circuit and Overtemperature Protection Slew Rate Control 8 EN GND Normal Mode Voltage Regulator 5V/50 mA/2% 2 Control Unit 3 Sleep Mode VCC Undervoltage Reset Switched Silent Mode Off Voltage Regulator 5V/50 mA/7% 7 VCC NRES 2. Pin Configuration Figure 2-1. Table 2-1. 2 Pinning SO8 VS 1 8 VCC EN 2 7 NRES GND 3 6 TXD LIN 4 5 RXD Pin Description Pin Symbol Function 1 VS Battery supply 2 EN Enables Normal mode if the input is high 3 GND 4 LIN LIN bus line input/output 5 RXD Receive data output 6 TXD Transmit data input 7 NRES 8 VCC Ground Output undervoltage reset, low at reset Output voltage regulator 5V/50 mA ATA6620 4850D-AUTO-02/06 ATA6620 3. Functional Description 3.1 Supply Pin (VS) LIN operating voltage is VS = 5V to 18V. An undervoltage detection is implemented to disable transmission if VS falls below 5V, in order to avoid false bus messages. After switching on VS, the IC starts with the Pre-normal mode and the voltage regulator is switched on (that is, 5V/50 mA output capability). The supply current in Sleep mode is typically 10 A and 40 A in Silent mode. 3.2 Ground Pin (GND) The IC is neutral on the LIN pin in case of GND disconnection. It is able to handle a ground shift up to 3V for supply voltage above 9V at the VS pin. 3.3 Voltage Regulator Output Pin (VCC) The internal 5V voltage regulator is capable of driving loads with up to 50 mA, supplying the microcontroller and other ICs on the PCB. It is protected against overload by means of current limitation and overtemperature shut-down. Furthermore, the output voltage is monitored and will cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun. 3.4 Undervoltage Reset Output (NRES) This push-pull output is supplied from the VCC voltage. If the VCC voltage falls below the undervoltage detection threshold of Vthun, NRES switches to low after tres_f (Figure 4-6 on page 9). Even if VCC = 0V the NRES stays low, because it is internally driven from the VS voltage. If VS voltage ramps down, NRES stays low until VS < 1.5V and then becomes highly resistant. The implemented undervoltage delay keeps NRES low for tReset = 10 ms after VCC reaches its nominal value. 3.5 Bus Pin (LIN) A low-side driver with internal current limitation and thermal shutdown, as well as an internal pull-up resistor according to LIN specification 2.0 is implemented. The voltage range is from -40V to +60V. This pin exhibits no reverse current from the LIN bus to VS, even in the case of a GND shift or VBatt disconnection. The LIN receiver thresholds are compatible with the LIN protocol specification. The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope controlled. The output has a short-circuit limitation. This is a self-adapting current limitation; that is, during current limitation, as the chip temperature increases, the current decreases. 3.6 Input Pin (TXD) This pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off and the bus is in the recessive state. 3 4850D-AUTO-02/06 3.7 Dominant Time-out Function (TXD) The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from being driven permanently in the dominant state. If TXD is forced to low longer than TDOM > 4 ms, the LIN bus driver is switched to the recessive state. To reset this dominant time-out mode, TXD must be switched to high (>10 s) before normal data transmission can be started. 3.8 Output Pin (RXD) This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive state) is reported by a high level at RXD; LIN low (dominant state) is reported by a low level at RXD. The output has an internal pull-up structure with typically 5 k to VCC. The AC characteristics are measured with an external load capacitor of 20 pF. The output is short-circuit protected. In unpowered mode (that is, VS = 0V), RXD is switched off. 3.9 Enable Input Pin (EN) This pin controls the operation mode of the interface. After power up of VS (battery), the IC switches to Pre-normal mode, even if EN is low or unconnected (internal pull-down resistor). If EN is high, the interface is in Normal mode. A falling edge at EN while TXD is still high forces the device to Silent mode. A falling edge at EN while TXD is low forces the device to Sleep mode. 4. Mode of Operation Figure 4-1. Mode of Operation a: VS > 5V b: VS < 4V c: Bus wake-up event d: NRES switches to low Unpowered Mode VBatt = 0 b a Pre-normal Mode b VCC: 5V/2%/50 mA with undervoltage monitoring Communication: OFF b c+d d EN = 1 c Go to silent command EN = 0 TXD = 1 Local wake-up event Normal Mode EN = 1 VCC: 5V/2%/50 mA with undervoltage monitoring Communication: ON EN = 0 TXD = 0 b Silent Mode VCC: 5V/7%/50 mA with undervoltage monitoring Communication: OFF Go to sleep command Local wake-up event Sleep Mode VCC: switched off Communication: OFF EN = 1 4 ATA6620 4850D-AUTO-02/06 ATA6620 Table 4-1. 4.1 Mode of Operation Mode of Operation Communication VCC RXD LIN Pre-normal OFF 5V 5V Recessive Normal ON 5V 5V Recessive Silent OFF 5V 5V Recessive Sleep OFF 0V 0V Recessive Normal Mode This is the normal transmitting and receiving mode of the LIN Interface, in accordance with LIN specification 2.0. The VCC voltage regulator operates with a 5V output voltage, with a low tolerance of 2% and a maximum output current of 50 mA. If an undervoltage condition occurs, NRES is switched to low and the ATA6620 changes state to Pre-normal mode. All features are available. 4.2 Silent Mode A falling edge at EN while TXD is high switches the IC into Silent mode. The TXD Signal has to be logic high during the Mode Select window (Figure 4-2 on page 6). For EN and TXD either two independent outputs can be used, or two outputs from the same microcontroller port; in the second case, the mode change is only one command. In Silent mode the transmission path is disabled. Supply current from V Batt is typically IVSsi = 40 A with no load at the VCC regulator. The overall supply current from VBatt is the result of 40 A plus the VCC regulator output current IVCCs. The 5V regulator is in low tolerance mode (4.65V to 5.35V) and can source up to 50 mA. In Silent mode the internal slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin LIN is short-circuited to GND. Only a weak pull-up current (typically 10 A) between pin LIN and pin VS is present. The Silent mode voltage is sufficient to run an external microcontroller on the ECU, for example in Power Down mode. The undervoltage reset is VCCthS < 4.4V. If an undervoltage condition occurs, NRES is switched to low and the ATA6620 changes state to Pre-normal mode. A falling edge at pin LIN followed by a dominant bus level maintained for a certain time period (Tbus) results in a remote wake-up request. The device switches from Silent mode to Pre-normal mode, then the internal LIN slave termination resistor is switched on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcontroller. (Figure 4-5 on page 8) With EN high, ATA6620 switches directly from Silent to Normal mode. 5 4850D-AUTO-02/06 Figure 4-2. Switch to Silent Mode Silent Mode Normal Mode EN Mode select window TXD Td = 3.2 s NRES VCC Delay time silent mode Td_sleep = maximum 20 s LIN LIN switches directly to recessive mode Figure 4-3. LIN Wake-up Waveform Diagram from Silent Mode Normal Mode Pre-normal Mode LIN Bus RXD High Low Bus wake-up filtering time Tbus VCC Silent mode Pre-normal mode Normal mode Regulator Wake-up Time EN NRES 6 EN High Node ln silent mode If undervoltage switch to pre-normal mode Undervoltage detection active ATA6620 4850D-AUTO-02/06 ATA6620 4.3 Sleep Mode A falling edge at EN while TXD is low switches the IC into Sleep mode. The TXD Signal has to be logic low during the Mode Select window (Figure 4-4 on page 8). We recommend using the same microcontroller port for EN as for TXD; in this case the mode change is only one command. In Sleep mode the transmission path is disabled. Supply current from V Batt is typically IVSsleep = 10 A. The VCC regulator is switched off; NRES and RXD are low. The internal slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin LIN is short-circuited to GND. Only a weak pull-up current (typically 10 A) between pin LIN and pin VS is present. A falling edge at pin LIN followed by a dominant bus level maintained for a certain time period (Tbus) results in a remote wake-up request. The device switches from Sleep mode to Pre-normal mode. The VCC regulator is activated and the internal LIN slave termination resistor is switched on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcontroller (Figure 4-5 on page 8). With EN high you can switch directly from Silent to Normal mode. In the application where the ATA6620 supplies the microcontroller, the wake-up from Sleep mode is only possible via pin LIN. 4.4 Pre-normal Mode At system power-up the device automatically switches to Pre-normal mode. The voltage regulator is switched on (VCC = 5V/50 mA) (see Figure 4-6 on page 9) after typically tVCC > 300 s. The NRES output switches to low for tres = 10 ms and sends a reset to the microcontroller. LIN communication is switched off, and the undervoltage detection is active. A power-down of VBatt (VS < 4.15V) during Silent or Sleep mode switches into Pre-normal mode after powering up the IC. 4.5 Unpowered Mode If battery voltage is connected to the application circuit (Figure 4-6 on page 9), the voltage at the VS pin increases due to the block capacitor. When VS is higher than the VS undervoltage threshold, VSth, the IC-mode changes from Unpowered to Pre-normal mode. The VCC output voltage reaches nominal value after tVCC. This time depends on the VCC capacitor and the load. NRES is low for the reset time delay tReset; no mode change is possible during this time. 7 4850D-AUTO-02/06 Figure 4-4. Switch to Sleep Mode Sleep Mode Normal Mode EN Mode select window TXD Td = 3.2 s NRES VCC Delay time sleep mode Td_sleep = maximum 20 s LIN LIN switches directly to recessive mode Figure 4-5. LIN Wake-up Diagram from Sleep Mode Pre-normal Mode Normal Mode LIN Bus RXD Low or floating Low Bus wake-up filtering time Tbus On state Off state Regulator wake-up time EN High EN Node in sleep mode Reset time NRES Low or floating Microcontroller start-up time delay 8 ATA6620 4850D-AUTO-02/06 ATA6620 Figure 4-6. VCC Voltage Regulator: Ramp Up and Undervoltage VS 12V 5.5V 3V VCC 5V Vthun NRES 5V TVCC Tres Tes_f 5. Fail-safe Features * During a short circuit at LIN, the output limits the output current to IBUS_LIM. Due to the power dissipation, the chip temperature exceeds TLINoff and the LIN output is switched off. The chip cools down and after a hysteresis of Thys, switches the output on again. During LIN overtemperature switch-off, the VCC regulator works independently. * There are now reverse currents < 3 A at pin LIN during loss of VBatt or GND. This is optimal behavior for bus systems where some slave nodes are supplied from battery or ignition. * During a short circuit at VCC, the output limits the output current to IVCCn. Because of undervoltage, NRES switches to low and sends a reset to the microcontroller. The IC switches into Pre-normal mode. If the chip temperature exceeds the value TVCCoff, the VCC output switches off. The chip cools down and after a hysteresis of Thys, switches the output on again. Because of Pre-normal mode, the VCC voltage will switch on again although EN is switched off from the microcontroller.The microcontroller can then start with normal operation. * Pin EN provides a pull-down resistor to force the transceiver into recessive mode if EN is disconnected. * Pin RXD is set floating if VBatt is disconnected. * Pin TXD provides a pull-up resistor to force the transceiver into recessive mode if TXD is disconnected. 9 4850D-AUTO-02/06 6. Voltage Regulator The voltage regulator needs an external capacitor for compensation and to smooth the disturbances from the microcontroller. It is recommend to use an tantalum capacitor with C > 10 F and a ceramic capacitor with C = 100 nF. The values of these capacitors can be varied by the customer, depending on the application. During mode change from Silent to Normal mode, the voltage regulator ramps up to 6V for only a few microseconds before it drops back to 5V. This behavior depends on the value of the load capacitor. With 4.7 F, the overshoot voltage has its greatest value. This voltage decreases with higher or lower load capacitors. With this special SO8 package (fused lead frame to pin3) an Rthja of 80 K/W is achieved. Therefore it is recommended to connect pin 3 with a wide GND plate on the printed board to get a good heat sink. The main power dissipation of the IC is created from the VCC output current IVCC , which is needed for the application. Figure 6-1 shows the safe operating area of the ATA6620. Figure 6-1. Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambient Temperatures 60.00 Iout_85: Tamb = 85C IVCC (mA) 50.00 Iout_95: Tamb = 95C 40.00 Iout_105: Tamb = 105C 30.00 20.00 10.00 0.00 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 VS (V) 10 ATA6620 4850D-AUTO-02/06 ATA6620 7. Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Min. Supply voltage VS VS -0.3 Pulse time 500 ms T = 25C Output current IVCC 50 mA Pulse time 2 min T = 25C Output current IVCC 50 mA Typ. Max. Unit +40 V VS +40 V VS 27 V Logic pins (RxD, TxD, EN, NRES) -0.3 +6.5 V LIN - DC voltage - Transient voltage -40 -150 +60 +100 V V VCC - DC voltage -0.3 +6.5 V ESD (DIN EN 6100-4-2) Pin LIN, VS versus GND according to LIN specification EMC Evaluation V 1.3 -6 +6 kV HBM ESD S5.1 - all pins -3 +3 kV -1000 +1000 V CDM ESD STM 5.3.1-1999 - All pins Junction temperature Tj -40 +150 C Storage temperature Ts -55 +150 C Operating ambient temperature Ta -40 +125 C 145 K/W Thermal resistance junction to ambient (free air) Rthja Special heat sink at GND (pin 3) on PCB Rthja 80 K/W Thermal shutdown of VCC regulator TVCCoff 150 160 170 C Thermal shutdown of LIN output TLINoff 150 160 170 C Thermal shutdown hysteresis Thys 10 C 11 4850D-AUTO-02/06 8. Electrical Characteristics 5V < VS < 18V, Tamb = -40C to 125C No. 1 Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 5 13.5 18 V A VS Pin 1.1 Nominal DC voltage range VS VS 1.2 Sleep mode Supply current in Sleep Vlin > VBatt - 0.5V mode VBatt < 14V (25C to 125C) VS IVSsleep 10 20 A A 1.3 Bus recessive; Supply current in Silent VBatt < 14V mode (25C to 125C) Without load at VCC VS IVSsi 40 50 A A 1.4 Supply current in Normal mode Bus recessive Without load at VCC VS IVSrec 4 mA A 1.5 Supply current in Normal mode Bus dominant VCC load current 50 mA VS IVSdom 55 mA A 1.6 Power On Reset threshold VS PORth 3.3 V D 1.7 Power On Reset threshold hysteresis VS PORhys V D 1.8 VS undervoltage threshold VS VSth V A 1.9 VS undervoltage threshold hysteresis VS VSth_hys V A RXD IRXD 8 mA A 0.3 V A 7 k A 2 3 0.1 4.15 4.5 5 0.2 RXD Output Pin Normal mode; VLIN = 0V VRXD = 0.4V 2 5 2.1 Low level input current 2.2 Low level output voltage IRXD = 1 mA RXD VRXDL 2.3 Internal resistor to VCC RXD RRXD 3 TXD VTXDL -0.3 +1.5 V A VCC + 0.3V V A 600 k A +3 A A 3 3.1 TXD Input Pin Low level voltage input 3.2 High level voltage input 3.3 Pull-up resistor 3.4 High level leakage current 4 4.1 5 TXD VTXDH 3.5 VTXD = 0V TXD RTXD 125 VTXD = 5V TXD ITXD -3 EN VENL -0.3 +1.5 V A VCC + 0.3V V A 600 k A +3 A A 250 EN Input Pin Low level voltage input 4.2 High level voltage input 4.3 Pull-down resistor 4.4 Low level input current EN VENH 3.5 VEN = 5V EN REN 125 VEN = 0V EN IEN -3 250 *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 12 ATA6620 4850D-AUTO-02/06 ATA6620 8. Electrical Characteristics (Continued) 5V < VS < 18V, Tamb = -40C to 125C No. 5 Parameters Test Conditions Pin Symbol Min. NRES VNRESH 4.5 NRES VNRESL VNRESL Max. Unit Type* V A 0.2 0.14 V V A A 0.2 V A 13 ms A 3 s A NRES Output Pin VS 5.5V; INRES = -1 mA 5.1 High level output voltage 5.2 VS 5.5V; Low level output voltage INRES = -1 mA INRES = -250 A 5.3 Low level output low 10 k to VCC; VCC = 0.8V NRES VNRESLL 5.4 Undervoltage reset time VVS 5.5V CNRES = 20 pF NRES tReset 5.5 Reset debounce time for VVS 5.5V CNRES = 20 pF falling edge NRES tres_f 6 Typ. 7 Voltage Regulator VCC Pin in Normal and Pre-normal Mode 6.1 Output voltage VCC 5.5V < VS < 18V (0 mA - 50 mA) VCC VCCnor 4.9 5.1 V A 6.2 Output voltage VCC at low VS 3.3V < VS < 5.5V VCC VCClow VVS - VD 5.1 V A 6.3 Regulator drop voltage VS > 4.0V, IVCC = -20 mA VCC VD 250 mV A 6.4 Regulator drop voltage VS > 4.0V, IVCC = -50 mA VCC VD 500 mV A 6.5 Regulator drop voltage VS > 3.3V, IVCC = -15 mA VCC VD 200 mV A 6.6 Output current VS > 3V VCC IVCC -50 mA A 6.7 Output current limitation VS > 0V VCC IVCCs -200 -130 mA A 6.8 Load capacity 1 < ESR < 5 VCC Cload 1.8 2.2 F D 6.9 VCC undervoltage threshold Referred to VCC VS > 5.5V VCC VthunN 4.4 V A 6.10 Hysteresis of undervoltage threshold Referred to VCC VS > 5.5V VCC Vhysthun 30 mV A 6.11 Ramp up time VS > 5.5V CVCC = 4.7 F to VCC > 4.9V No load VCC tVCC 300 s A 7 4.8 Voltage Regulator VCC Pin in Silent Mode 7.1 Output voltage VCC 5.5V < VS < 18V (0 mA - 50 mA) VCC VCCnor 4.65 5.35 V A 7.2 Output voltage VCC at low VS 3.3V < VS < 5.5V (0 mA - 50 mA) VCC VCClow VVS - VD 5.1 V A 7.3 Regulator drop voltage VS > 3.3V, IVCC = 15 mA VCC VD 200 mV A 7.4 At VCC undervoltage threshold the state switches back to Pre-normal mode Referred to VCC VS > 5.5 VCC VthunS 3.9 4.4 V A 7.5 Hysteresis of undervoltage threshold Referred to VCC VS > 5.5V VCC Vhysthun 40 mV D 7.6 Output current limitation VS > 0V VCC IVCCs -200 mA A -130 *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 13 4850D-AUTO-02/06 8. Electrical Characteristics (Continued) 5V < VS < 18V, Tamb = -40C to 125C No. 8 Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* VS V A LIN Bus Driver: Bus Load Conditions: Load 1 (Small): 1 nF, 1 k; Load 2 (Large): 10 nF, 500; RRXD = 5 k; CRXD = 20 pF 10.5, 10.6 and 10.7 Specifies the Timing Parameters for Proper Operation at 20 Kbps 8.1 Driver recessive output voltage Load1/Load2 LIN VBUSrec 8.2 Driver dominant voltage VVS = 7V Rload = 500 LIN V_LoSUP 1.2 V A 8.3 Driver dominant voltage VVS = 18V Rload = 500 LIN V_HiSUP 2 V A 8.4 Driver dominant voltage VVS = 7V Rload = 1000 LIN V_LoSUP_1k 0.6 V A 8.5 Driver dominant voltage VVS = 18V Rload = 1000 LIN V_HiSUP_1k 0.8 V A 8.6 Pull-up resistor to VS The serial diode is mandatory LIN RLIN 20 60 k A 8.7 Self-adapting current limitation VBUS = VBatt_max Tj = 125C Tj = 27C Tj = -40C LIN IBUS_LIM 52 100 120 110 170 230 mA mA mA A 8.8 Input leakage current at the receiver including pull-up resistor as specified Input Leakage current Driver off VBUS = 0V VBatt = 12V LIN IBUS_PAS_dom -1 mA A 8.9 Leakage current LIN recessive Driver off 8V < VBatt < 18V 8V < VBUS < 18V VBUS VBatt LIN IBUS_PAS_rec 8.10 Leakage current when control unit disconnected from ground. Loss of local ground must not affect communication in the residual network GNDDevice = VS VBatt = 12V 0V < VBUS < 18V LIN IBUS_NO_gnd 8.11 Node has to sustain the current that can flow VBatt disconnected under this condition. VSUP_Device = GND Bus must remain 0V < VBUS < 18V operational under this condition LIN IBUS 0.9 x VS -10 30 15 20 A A +0.5 +10 A A 0.5 3 A A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 14 ATA6620 4850D-AUTO-02/06 ATA6620 8. Electrical Characteristics (Continued) 5V < VS < 18V, Tamb = -40C to 125C No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* VBUS_CNT = (Vth_dom + Vth_rec)/2 LIN VBUS_CNT 0.475 x VS 0.5 x VS 0.525 x VS V A 9 LIN Bus Receiver 9.1 Center of receiver threshold 9.2 Receiver dominant state VEN = 5V LIN VBUSdom -27 0.4 x VS V A 9.3 Receiver recessive state VEN = 5V LIN VBUSrec 0.6 x VS 40 V A 9.4 Receiver input hysteresis LIN VBUShys 0.028 x VS 0.175 x VS V A 9.5 Wake detection LIN High level input voltage LIN VLINH VS - 1V VS + 0.3V V A 9.6 Wake detection LIN Low level input voltage LIN VLINL -27 VS - 3.3V V A 10 Internal Timers 150 s A 20 s A Vhys = Vth_rec - Vth_dom ILIN = typically -3 mA 0.1 x VS 10.1 Dominant time for wake-up via LIN bus VLIN = 0V tbus 30 10.2 Time delay for mode change from Pre-normal VEN = 5V into Normal mode via pin EN tnorm 5 10.3 Time delay for mode change from Normal V = 0V mode to Sleep mode via EN pin EN tsleep 2 7 15 s A 10.4 TXD dominant time out timer VTXD = 0V tdom 5 10 20 ms A Duty cycle 1 THRec(max) = 0.744 x VS; THDom(max) = 0.581 x VS; VS = 7.0V to 18V; tBit = 50 ms D1 = tbus_rec(min)/(2 x tBit) D1 0.396 10.6 Duty cycle 2 THRec(min) = 0.422 x VS; THDom(min) = 0.284 x VS; VS = 7.0V to 18V; tBit = 50ms D2 = tbus_rec(max)/(2 x tBit) D2 10.7 Slope time falling and rising edge at LIN 10.5 11 tSLOPE_fall tSLOPE_rise 90 A 0.581 3.5 A 22.5 s A 6 s A +2 s A Receiver Electrical AC Parameters of the LIN Physical Layer LIN Receiver, RXD Load Conditions (CRXD): 20 pF; Rpull-up = 2.4 k trec_pd = max(trx_pdr, trx_pdf) 11.1 Propagation delay of receiver Figure 4-4 11.2 Symmetry of receiver propagation delay rising trx_sym = trx_pdr - trx_pdf edge minus falling edge trx_pd trx_sym -2 *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 15 4850D-AUTO-02/06 Figure 8-1. Definition of Bus Timing Characteristics tBit tBit tBit TXD (Input to transmitting Node) tBus_dom(max) tBus_rec(min) Thresholds of THRec(max) VS (Transceiver supply of transmitting node) receiving node 1 THDom(max) LIN Bus Signal Thresholds of THRec(min) receiving node 2 THDom(min) tBus_dom(min) RXD (Output of receiving Node1) trx_pdf(1) tBus_rec(max) trx_pdr(1) RXD (Output of receiving Node2) trx_pdr(2) 16 trx_pdf(2) ATA6620 4850D-AUTO-02/06 ATA6620 Figure 8-2. Application Circuit VCC RXD 5 VBAT 1 ATA6620 Normal and Pre-normal Mode Receiver VS 22 F 100 nF 4 LIN LIN-BUS Filter Microcontroller 220 pF VCC Wake Up Bus Timer TXD 6 TXD Time-out Timer Short-circuit and Overtemperature Protection Slew Rate Control 8 EN 2 GND 3 Control Unit Normal Mode Voltage Regulator 5V/50 mA Sleep Mode VCC Undervoltage Reset Switched Silent Mode Off Voltage Regulator 5V/10% 7 VCC NRES 100 nF 22 F 17 4850D-AUTO-02/06 9. Ordering Information Extended Type Number ATA6620-TAQY Package Remarks SO8 LIN System Basis Chip, Pb-free 10. Package Information Package SO8 Dimensions in mm 5.2 4.8 5.00 4.85 3.7 1.4 0.25 0.10 0.4 1.27 6.15 5.85 3.81 8 0.2 3.8 5 technical drawings according to DIN specifications 1 18 4 ATA6620 4850D-AUTO-02/06 ATA6620 11. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History * * * * 4850D-AUTO-02/06 * * Section 3.5 "Bus Pin (LIN)" on page 3 changed Figure 4-1 "Mode of Operation" on page 4 changed Figure 4-3 "LIN Wake-up Waveform Diagram from Silent Mode" on page 6 changed Section 4.4 "Pre-normal Mode" on page 7 changed Section 6 "Voltage Regulator" on page 10 changed Figure 6-1 "Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambient Temperatures" on page 10 changed * Table "Absolute Maximum Ratings" on page 11 changed * Table "Electrical Characteristics" from pages 12 to 15 changed 19 4850D-AUTO-02/06 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. 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