Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
1
MP Controller For High Performance Process Power Supplies
FEATURES
DRuns on 3.3- or 5-V Supplies
DAdjustable, High Precision Output
Voltage
DHigh Frequency Operation (>1 MHz)
DHigh Efficiency Synchronous
Switching
DFull Set of Protection Circuitry
D2000-V ESD Rating (Si9140CQ/DQ)
DESCRIPTION
Siliconix’ Si9140 Buck converter IC is a high-performance,
surface-mount switchmode controller made to power the new
generation of low-voltage, high-performance micro-
processors. The Si9140 has an input voltage range of 3 to
6.5 V to simplify power supply designs in desktop PCs. Its
high-frequency switching capability and wide bandwidth
feedback loop provide tight, absolute static and transient load
regulation. Circuits using the Si9140 can be implemented with
low-profile, inexpensive inductors, and will dramatically
minimize power supply output and processor decoupling
capacitance. The Si9140 is designed to meet the stringent
regulation requirements of new and future high-frequency
microprocessors, while improving the overall efficiency in new
“green” systems.
Today’s state-of-the-art microprocessors run at frequencies
over 100 MHz. Processor clock speeds are going up and so
are current requirements, but operating voltages are going
down. These simultaneous changes have made dedicated,
high-frequency, point-of-use buck converters an essential part
of any system design. These point-of-use converters must
operate at higher frequencies and provide wider feedback
bandwidths than existing converters, which typically operate
at less than 250 kHz and have feedback bandwidths of less
than 50 kHz. The Si9140’s 100-kHz feedback loop bandwidth
ensures a minimum improvement of one-half the required
output/decoupling capacitance, resulting in a tremendous
reduction in board size and cost of implementation.
With the microprocessing power of any PC representing an
investment of hundreds of dollars, designers need to ensure
that the reliable operation of the processor will not be affected
by the power supply. The Si9140 provides this assurance. A
demo board, the Si9140DB, is available.
Si9140CQ-T1 and Si9140DQ-T1 are available in lead free.
APPLICATION CIRCUIT
COSC
R6
13
U1
Si9140
14
15
16
2
3
4
1
10
11
125
6
7
9
8
C7
R5
DR
VDD VS
VGOOD DS
COMP
UVLOSET
FB
NI
VREF
ENABLE
GND
ROSC
C6
C5
C4
C9
R9 R8
R7
C3
+
C2
PGND
MON C8
2 x Si4435DY
2 x Si4410DY
R3
Power-Good
R2
R1
R4
C1
VIN
VCCP
+
R12
0.1%
C10 R11
R10
0.1%
R13
L1
D1
VOUT
COSC
Si9140
Vishay Siliconix
www.vishay.com
2Document Number: 70026
S-40699—Rev. H, 19-Apr-04
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND.
VDD, VS8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PGND "0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VDD to VS−0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Inputs −0.3 V to VDD +0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Inputs −0.3 V to VDD +0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Output Drive Current 350 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (Package)a
16-Pin SOIC (Y Suffix)\b 900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin TSSOP (Q Suffix)c925 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Impedance (QJA)
16-Pin SOIC (Y Suffix) 140_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin TSSOP (Q Suffix) 135_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature
C Suffix 0_ to 70_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D Suffix −40_ to 85_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/_C above 25_C.
c. Derate 7.4 mW/_C above 25_C.
* Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent. damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any
one time
RECOMMENDED OPERATING RANGE
Voltages Referenced to GND.
VDD 3 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VS3 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
fOSC 20 kHz to 2 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ROSC 5 kW to 250 kW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COSC 47 pF to 200 pF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Inputs 0 to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs 0 to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VREF Load Resistance >150 kW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONS
Test Conditions
Unless Otherwise Specifieda
3 V v VDD v 6.5 V, VDD
=
VS
Limits
C Suffix 0 to 70_C
D Suffix −40 to 85_C
Parameter Symbol
3 V v V
DD
v 6
.
5 V
,
V
DD
=
V
S
GND = PGND MinbTyp MaxbUnit
Reference
Output Voltage
VREF
IREF = −10 mA 1.455 1.545
V
Output Voltage VREF TA = 25_C 1.477 1.50 1.523 V
Oscillator
Maximum FrequencycfMAX VDD = 5 V, COSC = 47 pF, ROSC = 5.0 kW2.0
Accuracy fOSC VDD = 5 V
COSC = 100 pF, ROSC = 7.50 kW, TA = 25_C0.85 1.0 1.15 MHz
ROSC Voltage VROSC 1.0 V
Voltage Stabilityc
Df/f
4 V v VDD v 6 V, Ref to 5 V, TA = 25_C−8 8
%
Temperature StabilitycDf/f Referenced to 25_C"5%
Error Amplifier (COSC = GND, OSC DISABLED)
Input Bias Current IFB VNI = VREF , VFB = 1.0 V −1.0 1.0 mA
Open Loop Voltage Gain AVOL 47 55 dB
Offset Voltage VOS VNI = VREF −15 0 15 mV
Unity Gain BandwidthcBW 10 MHz
Output Current
IEA
Source (VFB = 1 V, NI = VREF)−2.0 −1.0
mA
Output Current IEA Sink (VFB = 2 V, NI = VREF) 0.4 0.8 mA
Power Supply RejectioncPSRR 3 V < VDD < 6.5 V 60 dB
UVLOSET Voltage Monitor
Under Voltage Lockout
VUVLOHL UVLOSET High to Low 0.85 1.0 1.15
V
Under Voltage Lockout VUVLOLH UVLOSET Low to High 1.2 V
Hysteresis VHYS VUVLOLH − VUVLOHL 175 mV
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
3
SPECIFICATIONS
Limits
C Suffix 0 to 70_C
D Suffix −40 to 85_C
Test Conditions
Unless Otherwise Specifieda
3 V v VDD v 6.5 V, VDD = VS
GND = PGND
Parameter UnitMaxb
TypMinb
Test Conditions
Unless Otherwise Specifieda
3 V v VDD v 6.5 V, VDD = VS
GND = PGND
Symbol
UVLOSET Voltage Monitor
UVLO Input Current IUVLO(SET) VUVLO = 0 to VDD −100 100 nA
Output Drive (DR and DS)
Output High Voltage VOH VS = VDD = 5 V, IOUT = −10 mA 4.7 4.8
V
Output Low Voltage VOL VS = VDD = 5 V, IOUT = 10 mA 0.2 0.3 V
Peak Output Current ISOURCE VS = VDD = 5 V, VOUT = 0 V −380 −260
mA
Peak Output Current ISINK VS = VDD = 5 V, VOUT = 5 V 200 300 mA
Break-Before-Make tBBM VDD = 6.5 V 40 nS
Logic
ENABLE Turn-On Delay tdEN ENABLE Delay to Output, ENLH, VDD = 5 V 1.5 ms
ENABLE Logic Low VENL 0.2 VDD
V
ENABLE Logic High VENH 0.8 VDD
V
ENABLE Input Current IEN ENABLE = 0 to VDD −1.0 1.0 mA
VGOOD Comparator (Voltage-Good Comparator)
Input Offset Voltage VOS
VIN Common Mode Voltage = VREF VDD = 5 V
−45 0 45
mV
Input Hysteresis VINHYS
VIN Common Mode Voltage = VREF, VDD = 5 V 10 mV
Input Bias Current IBMON VIN = VREF, VDD = 5 V −1 0 1 mA
Output Sink I ISINK VOUT = 5 V, VDD = 5 V 6 9 mA
Output Low Voltage VOL IOUT = 2 mA, VDD = 5 V 350 500 mV
Supply
Supply Current—Normal Mode
IDD
fOSC = 1 MHz, ROSC = 7.50 kW1.6 2.3 mA
Supply Current—Standby Mode IDD ENABLE < 0.4 V 250 330 mA
Notes
a. 100 pF includes CSTRAY on COSC.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Guaranteed by design, not subject to production testing.
TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED)
1.480
1.485
1.490
1.495
1.500
1.505
1.510
−50 −25 0 25 50 75 100 125
VREF vs. Temperature
(V)
REF
V
t − Temperature (_C)
VDD = 3 V
1.485
1.490
1.495
1.500
1.505
1.510
1.515
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
VREF vs. Supply Voltage
VDD − Supply Voltage (V)
(V)
REF
V
VREF with 10 mA Load
VDD = 6 V
Si9140
Vishay Siliconix
www.vishay.com
4Document Number: 70026
S-40699—Rev. H, 19-Apr-04
TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED)
100
200
300
400
500
600
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
100
200
300
400
500
600
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
1.0
1.2
1.4
1.6
1.8
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Phase (deg)
Gain (dB)
1.485
1.490
1.495
1.500
1.505
1.510
1.515
0 5 10 15 20 25 30
3.0, 3.6 V
VREF vs. Load Current
VREF − Sourcing Current (mA)
(V)
REF
V
5.0 V
6.5 V
Error Amplifier Gain and Phase
f − Frequency (MHz)
80
0
−30
−60
−90
−120
−150
60
40
20
0
−20
−40
0.0001 0.001 0.01 0.1 1 10 100
Gain
Phase
25_C
Supply Current
vs. Supply Voltage and Temperature
Normal Current (mA)
VDD − Supply Voltage (V)
CL = 10 pF
f = 1 MHz
0_C
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Standby Current
vs. Supply Voltage and Temperature
A)Standby Current ( m
VDD − Supply Voltage (V)
TA = 85_C
25_C
210
230
220
240
250
260 70_C
0_C
−40_C
TA = 85_C
70_C
−40_C
DR Sourcing Current vs. Supply Voltage
DR Sourcing Current (mA)
VDD − Supply Voltage (V)
DR Sinking Current vs. Supply Voltage
DR Sinking Current (mA)
VDD − Supply Voltage (V)
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
5
TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED)
100
200
300
400
500
600
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
100
200
300
400
500
600
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
0.01
0.10
1.00
10.00
0.8
0.9
1.0
1.1
1.2
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Switching Frequency vs. Supply Voltage
Switching Frequency (MHz)
VDD − Supply Voltage (V)
ROSC = 7.50 kW
COSC = 100 pF
Frequency vs. ROSC/COSC
COSC − Capacitance (pF)
Switching Frequency (MHz)
4.99 kW
12.1 kW
24.9 kW
49.9 kW
100 kW
249 kW
40 300200
DS Sourcing vs. Supply Voltage
DS Sourcing Current (mA)
VDD − Supply Voltage (V)
DS Sinking Current vs. Supply Voltage
DS Sinking Current (mA)
VDD − Supply Voltage (V)
115
135
155
175
195
215
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
20
30
40
50
60
70
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Enable Turn-OFF Delay to Output UVLO Hysteresis vs. Supply Voltage
Output Delay (nS)
V
DD
− Su
pp
l
y
Volta
g
e
(
V
)
V
DD
− Su
pp
l
y
Volta
g
e
(
V
)
UVLO Hysteresis (mV)
Si9140
Vishay Siliconix
www.vishay.com
6Document Number: 70026
S-40699—Rev. H, 19-Apr-04
TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED)
0
4
8
12
16
20
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
VGOOD Sinking Current vs. Supply Voltage
Power Good Sinking Current (mA)
VDD − Supply Voltage (V)
PIN CONFIGURATIONS AND ORDERING INFORMATION
13
VDD VS
MON DR
VGOOD DS
COMP PGND
FB
NI
VREF
UVLOSET
COSC
GND
ROSC
SOIC-16
14
15
16
2
3
4
1
10
11
12
5
6
7
98
Top View
ENABLE
16
15
14
13
1
2
3
4
12
11
10
9
5
6
7
8
TSSOP-16
Top View
VDD VS
MON DR
VGOOD DS
COMP PGND
FB
NI
VREF
UVLOSET
COSC
GND
ROSC
ENABLE
13
ORDERING INFORMATION−SOIC-16
Part Number Temperature Range
Si9140CY
Si9140CY-T1 0_ to 70_C
Si9140CY-T1—E3
Si9140DY
Si9140DY-T1 −40_ to 85_C
Si9140DY-T1—E3
ORDERING INFORMATIONTSSOP-16
Part Number Temperature Range
Si9140CQ
Si9140CQ-T1 0_ to 70_C
Si9140CQ-T1—E3
Si9140DQ
Si9140DQ-T1 −40_ to 85_C
Si9140DQ-T1—E3
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
7
PIN DESCRIPTION
Pin 1: VDD
The positive power supply for all functional blocks except
output driver. A bypass capacitor of 0.1 mF (minimum) is
recommended.
Pin 2: MON
Non-inverting input of a comparator. Inverting input is tied
internally to reference voltage. This comparator is typically
used to monitor the output voltage and to flag the processor
when the output voltage falls out of regulation.
Pin 3: VGOOD
This is an open drain output. It will be held at ground when the
voltage at MON (Pin 2) is less than the internal reference. An
external pull-up resistor will pull this pin high if the MON pin (Pin
2) is higher than the VREF
. (Refer to Pin 2 description.)
Pin 4: COMP
This pin is the output of the error amplifier. A compensation
network is connected from this pin to the FB pin to stabilize the
system. This pin drives one input of the internal pulse width
modulation comparator.
Pin 5: FB
The inverting input of the error amplifier. An external resistor
divider is connected to this pin to set the regulated output
voltage. The compensation network is also connected to this
pin.
Pin 6: NI
The non-inverting input of the error amplifier. In normal
operation it is externally connected to VREF or an external
reference.
Pin 7: VREF
This pin supplies a 1.5-V reference.
Pin 8: GND (Ground)
Pin 9: ENABLE
A logic high on this pin allows normal operation. A logic low
places the chip in the standby mode. In standby mode normal
operation is disabled, supply current is reduced, the oscillator
stops and DS goes high while DR goes low.
Pin 10: ROSC
A resistor connected from this pin to ground sets the
oscillator’s capacitor COSC, charge and discharge current.
See the oscillator section of the description of operation.
Pin 11: COSC
An external capacitor is connected to this pin to set the
oscillator frequency.
fOSC ]
0.75
ROSC COSC
(at VDD = 5.0 V)
Pin 12: UVLOSET
This pin will place the chip in the standby mode if the UVLOSET
voltage drops below 1.2 V. Once the UVLOSET voltage
exceeds 1.2 V, the chip operates normally. There is a built-in
hysteresis of 165 mV.
Pin 13: PGND
The negative return for the VS supply.
Pin 14: DS
This CMOS push-pull output pin drives the external p-channel
MOSFET. This pin will be high in the standby mode. A
break-before-make function between DS and DR is built-in.
Pin 15: DR
This CMOS push-pull output pin drives the external n-channel
MOSFET. This pin will be low in the standby mode. A
break-before-make function between the DS and DR is built-in.
Pin 16: VS
The positive terminal of the power supply which powers the
CMOS output drivers. A bypass capacitor is required.
Si9140
Vishay Siliconix
www.vishay.com
8Document Number: 70026
S-40699—Rev. H, 19-Apr-04
FUNCTIONAL BLOCK DIAGRAM
−
+
UVLOSET
COMP
COSC
FB
NI
VS
DS
PGND
GND
VUVLO
Oscillator
VREF
1.5-V Reference
Generator
ROSC
ENABLE
VDD
UVLO
Error Amp
Logic
and
BBM
Control
−
+Driver
DR
Driver
PGND
VS
VS
PGND
−
+
MON
VREF
VGOOD
VREF
VUVLO
TIMING WAVEFORMS
DS
tBBM
DR
VCOSC
VCOMP
ENABLE
1.5 V
0 V
5 V
1 V
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
9
DESCRIPTION OF OPERATION
Schematics of the Si9140 dc-to-dc conversion solutions for
high-performance PC microprocessors are shown in Figure 1
and 2 respectively. These solutions are geared to meet the
extremely demanding transient regulation and power
requirements of these new microprocessors at minimal cost
and with a minimal parts count. The two solutions are nearly
identical, except for slight variations in output voltage, load
transient amplitude, and specified power. Figure 3 is a
schematic diagram for a 3.3-V logic converter.
R6
4.99 k
13
U1
Si9140
14
15
16
2
3
4
1
10
11
125
6
7
9
8
C7
0.1 mF
R5
240 k
DR
VDD VS
VGOOD DS
COMP
UVLOSET
FB
NI
VREF
ENABLE
COSC
GND
ROSC
C6
0.1 mF
C5, 180 pF
C4, 5.6 pF
C9
220 pF
R9
11 k
R8
40.2 k
R7
100 k
C3
0.1 mF
+
C2
3 x 330 mF
6.3V OS-CON
PGND
MON C8
1 mF
2 x Si4435DY
2 x Si4410DY
R3
100
Power-Good
R2
10 k
R1
20 k
R4
24.9 k
C1
2 x 220 mF
10 V
OS-CON
VCCP
+
R12
13.3 k,
0.1%
C10, 180 pF
R11, 4.7 k
2.9 V
(VOUT)
R10
14.2 k
0.1%
R13
10 k
FIGURE 1. 2.9 V @ 10 A
L1
1.5 mH
D1
D1FS4
5 V
(VIN)Coiltronics
CTX07-12877
Power-Good
FIGURE 2. 2.5 V @ 8.5 A
R6
4.99 k
13
U1
Si9140
14
15
16
2
3
4
1
10
11
125
6
7
9
8
C7
0.1 mF
R5
240 k
DR
VDD VS
VGOOD DS
COMP
UVLOSET
FB
NI
VREF
ENABLE
COSC
GND
ROSC
C6
0.1 mF
C5, 180 pF
C4, 5.6 pF
C9
220 pF
R9
11 k
R8
40.2 k
R7
100 k
C3
0.1 mF
+
C2
3 x 330 mF 6.3V
OS-CON
PGND
MON C8
1 mF
2 x Si4435DY
Si4410DY
R3
100
R2
10 k
R1
20 k
R4
40.2 k
C1
2 x 220 mF
10 V
OS-CON
VCCP
+
R12
13.3 k,
0.1%
C10, 180 pF
R11, 4.7 k
2.5 V
(VOUT)
R10
20 k
0.1%
R13
10 k
L1
1.5 mH
D1
D1FS4
5 V
(VIN)
Coiltronics
CTX07-12877
Si9140
Vishay Siliconix
www.vishay.com
10 Document Number: 70026
S-40699—Rev. H, 19-Apr-04
FIGURE 3. 3.3 V@ 5 A
R6
4.99 k
13
U1
Si9140
14
15
16
2
3
4
1
10
11
125
6
7
9
8
C7
0.1 mF
R5
16.2 k
DR
VDD VS
VGOOD DS
COMP
UVLOSET
FB
NI
VREF
ENABLE
COSC
GND
ROSC
C6
0.1 mF
C5, 1000 pF
C4, 330 pF
C9
220 pF
R9
20 k
R8
40.2 k
R7
100 k
C3
0.1 mF
+
C2
3 x 330 mF
TPS
Tantalum
PGND
MON C8
1 mF
Si4435DY
Si4410DY
R3
100
C1
2 x 220 mF
TPS
Tantalum
+
R12, 13.3 k
C10
1000 pF
R11
4.7 k
3.3 V
(VOUT)
R10
11 k
R13
10 k
L1
10 mH
D1
D1FS4
5 V
(VIN)
Coiltronics
CTX07-12891
FIGURE 4. 1.5-V Converter for GTL+ Bus @ 5 A
R6
4.99 k
13
U1
Si9140
14
15
16
2
3
4
1
10
11
125
6
7
9
8
C7
0.1 mF
R5
16.2 k
DR
VDD VS
VGOOD DS
COMP
UVLOSET
FB
NI
VREF
ENABLE
COSC
GND
ROSC
C6
0.1 mF
C5, 1000 pF
C4, 330 pF
C9
220 pF
R9
20 k
R8
40.2 k
R7
100 k
C3
0.1 mF
+
C2
3 x 330 mF
TPS
Tantalum
PGND
MON C8
1 mF
Si4435DY
Si4410DY
R3
100
C1
2 x 220 mF
TPS
Tantalum
5 V
(VIN)
+
R12, 13.3 k
1.5 V
(VOUT)
R13
10 k
L1
10 mH
D1
D1FS4
Coiltronics
CTX07-12891
C10
1000 pF R11
4.7 k
Figure 4 is a schematic diagram of a converter which produces
1.5 V for a GTL bus.
Each of these dc-to-dc converters has four major sections:
DPWM Controller—regulates the output voltage
DSwitch and Synchronous Rectification
MOSFETs—delivers the power to the load
DInductor—filters and stores the energy
DInput/Output Capacitor—filters the ripple
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
11
The functions of each circuit are explained in detail below.
Design equations are provided to optimize each application
circuit.
PWM Controller
There are generally two types of controllers, voltage mode or
current mode. In voltage mode control, an error voltage is
generated by comparing the output voltage to the reference
voltage. The error voltage is then compared to an artificial
ramp, and the result is the duty cycle necessary to regulate the
output voltage. In current mode, an actual inductor current is
used, in place of the artificial ramp, to sense the voltage across
the current sense resistor.
The logic and timing sequence for voltage mode control is
shown in Figure 5. The Si9140 offers voltage mode control,
which is better suited for applications requiring both fast
transient response and high output current.
Current mode control requires a current sense resistor to
monitor the inductor current. A 10-mW sense resistor in a 10-A
design will dissipate 1 W, decreasing efficiency by 3.5%. Such
a design would require a 2-W resistor to satisfy derating criteria,
besides requiring additional board space. Voltage mode control
is a second-order LC system and has a faster natural transient
response compared to current mode control (first-order RC
system). Current mode has the advantage of providing an
inherently good line regulation. But the situations where line
voltage is fixed, as in the point-of-use conversion for
microprocessors, this feature is wasted. Current mode control
also provides automatic pulse-to-pulse current limiting. This
feature requires a current sense resistor as stated above. These
characteristics make voltage mode control ideal for high-end
microprocessor power supplies.
FIGURE 5 . Voltage Mode Logic and Timing Diagram
OSC
COMP
DS
DR
The error amplifier of the PWM controller plays a major role in
determining the output voltage, stability, and the transient
response of the power supply. In the Si9140, the non-inverting
input of the error amplifier is available for use with an external
precision reference for tighter tolerance regulation. With a
two-pair lead-lag compensation network, it is easy to create a
stable 100-kHz closed loop converter with the Si9140 error
amplifier.
The Si9140 achieves the 5-mS transient response by
generating a 100-kHz closed-loop bandwidth. This is possible
only by switching above 400 kHz and utilizing an error amplifier
with at least a 10-MHz bandwidth. The Si9140 controller has
a 25-MHz unity gain bandwidth error amplifier. The switching
frequency must be at least four times greater than the desired
closed-loop bandwidth to prevent oscillation. To respond to
the stimuli, the error amplifier bandwidth needs to be at least
10 times larger than the desired bandwidth.
FIGURE 6 . 100-kHz BW Synchronous Buck Converter
Gain
Phase
Frequency (Hz)
Gain (dB)
Phase (deg)
The Si9140 solution requires only three 330-mF OS-CON
capacitors on the output of power supply to meet the 10-A
transient requirement. Other converter solutions on the market
with 20- to 50-kHz closed loop bandwidths typically require two
to five times the output capacitance specified above to match
the Si9140’s performance.
The theoretical issues and analytical steps involved in
compensating a feedback network are beyond the scope of
this application note. However, to ease the converter design
for today’s high-performance microprocessors, typical
component values for the feedback network are provided in
Table 1 for various combinations of output capacitance. Figure
6 shows the Bode plot (frequency domain) of the 2.9-V
converter shown schematically in Figure 1.
Si9140
Vishay Siliconix
www.vishay.com
12 Document Number: 70026
S-40699—Rev. H, 19-Apr-04
TABLE 1.
FEEDBACK NETWORK COMPONENT VALUES
Total Output and
Decoupling Capacitance C4 C5 R5
3 x 330 mFaOs-con. . . . . . . . .
6 x 100 mFbTantalum. . . . . . . . .
25 x 1 mFbCeramic. . . . . . . . . .
5.6 pF 180 pF 240 k
2 x 330 mFaOs-con. . . . . . . . .
4 x 100 mFbTantalum. . . . . . . . .
25 x 1 mFbCeramic. . . . . . . . . .
10 pF 220 pF 200 k
3 x 330 mFaTantalum. . . . . . . . .
4 x 100 mFbTantalum. . . . . . . . .
25 x 1 mFbCeramic. . . . . . . . . .
10 pF 100 pF 100 k
a. Power supply output capacitance.
b. mprocessor decoupling capacitance.
Figure 7 is the measured transient response (time domain) for
the 10-A step response. The measured transient response
shows the processor voltage regulating to 70 mV, well within
the 0.145-V regulation.
The Si9140’s switching frequency is determined by the
external ROSC and COSC values, allowing designers to set the
switching frequency of their choice. For applications where
space is the main constraint, the switching frequency can be
set as high as 2 MHz to minimize inductor and output capacitor
size. In applications where efficiency is the main concern, the
switching frequency can be set low to maximize battery life.
The switching frequency for high-performance processors
applications circuits are set for 400 kHz. The equation for
switching frequency is:
fOSC [0.75
ROSC COSC
(at VDD = 5.0 V)
The precision reference is set at 1.5 V"1.5%. The reference
is capable of sourcing up to 1 mA. The combination of 1.5%
reference and 3.5% transient load regulation safely complies
with the "5% regulation requirement. If additional margin is
desired, an external precision reference can be used in place
of the internal 1.5-V reference.
Switching and Synchronous Rectification MOSFETs
The synchronous gate drive outputs of Si9140 PWM controller
drive the high-side p-channel switch MOSFET and the
low-side n-channel synchronous rectifier MOSFET. The
physical difference between the non-synchronous to
synchronous rectification requires an additional MOSFET
across the free-wheeling diode (D1). The inductor current will
reach 0 A if the peak-to-peak inductor current equals twice the
output current. In synchronous rectification mode, current is
allowed to flow backwards from the inductor (L1) through the
synchronous MOSFET (Q3) and to the output capacitor (C2)
once the current reaches 0 A. Refer to schematic on Figure 1.
In non-synchronous rectification, the diode (D1) prevents the
current from flowing in the reverse direction. This minor
difference has a drastic affect on the performance of a power
supply. By allowing the current to flow in the reverse direction,
it preserves the continuous inductor current mode, maintaining
the wide converter bandwidth and improving efficiency. Also,
maintaining the continuous current mode during light load to
full load guarantees consistent transient response throughout
a wide range of load conditions.
The transition from stop clock and auto halt to active mode is
a perfect example. The microprocessor current can vary from
0.5 A to 10 A or greater during these transitions. If the
converter were to operate in discontinuous current mode
during the stop clock and auto halt modes, the transfer function
of the converter would be different compared to operation in
the active mode. In discontinuous current mode, the converter
bandwidth can be 10 to 15 times lower than the continuous
current mode (Figure 8). Therefore, the response time will also
be 10 to 15 times slower, violating the microprocessor’s
regulator requirements. This could result in unreliable
operation of the microprocessor.
FIGURE 7 .
a) Transient Response from 0- to 10-A Step Load b) Transient Response from 10- to 0-A Step Load
mP
Voltage
mP
Current
2.9 V
10 A
0 A
5 A
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
13
For these reasons, synchronous rectification is a must in
today’s microprocessors power supply design. Pulse-
skipping modes are undesirable in high-performance
microprocessor power supplies, especially when the minimum
load current is as high as 500 mA. This pulse-skipping mode
disables the synchronous rectification during light load and
generates a random noise spectrum which may produce EMI
problems.
Siliconix’ TrenchFETt technology has resulted in 20-mW
n-channel (Si4410DY) and 35-mW p-channel (Si4435DY)
MOSFETs in the SO-8 surface-mount package. These LITTLE
FOOTr products totally eliminate the need for an external
heatsink.
FIGURE 8 . Non-Synchronous Converter BW
Gain
Phase
Frequency (Hz)
Gain (dB)
Phase (deg)
Worst case current of 10 A can be handled with two paralleled
Si4435DY and two paralleled Si4410DY MOSFETs, which
results in the efficiency levels shown in Figure 9.
FIGURE 9 . Efficiency
80
85
90
95
100
0246810
Efficiency (%)
IOUT (A)
VIN = 5 V
VOUT = 2.9 V
Good electrical designs must provide an adequate margin for
the specification, but they should not be grossly overdesigned
to lower costs. LITTLE FOOT power MOSFETs allow
designers to balance cost and performance considerations
without sacrificing either. If the design requires only an 8.5-A
continuous current, for example, one Si4410DY can be
eliminated. Table 2 shows the number of MOSFETs required
to handle the various output current levels of today’s high-
performance microprocessors. For other output power levels,
the equations below should be used to calculate the power
handling capability of the MOSFET.
TABLE 2.
CONVERTER REQUIREMENTS (FIGURES 1, 2, AND 3)
IO (A)
Maxi-
mum Quantity High-Side P-Channel
Si4435DY Quantity Low-Side N-Channel
Si4410DY Quantity Input (C1-C3)
Capacitor Os-con 220 mF
5 A 111
8.5 A 212
10 A 222
14.5 A 323
Si9140
Vishay Siliconix
www.vishay.com
14 Document Number: 70026
S-40699—Rev. H, 19-Apr-04
PDissipation in switch +IRMS SW
2 RSW )QSW VIN fOSC
2)IPP VO tC fOSC
2
IRMSSW = Switch rms current
RSW = Switch on resistance
IRMSRECT = Synchronous rectifier rms current
RRECT = Synchronous rectifier on resistance
QSW = Total gate charge of switch
QRECT = Total gate charge of synchronous rectifier
VIN = Input voltage
VO= Output voltage
IO= Output current
fOSC = Switching frequency
h= efficiency
tC= Crossover time
IRMS SW +ǒIPEAK2)IPP2)IPEAK IPPǓ VO
3 VIN
Ǹ
IPP = IPEAK + DI
DI+VO2
L fOSC VIN
IPEAK +PIN –(0.5 VO DI)
VO
PIN +VO IO
h
IPEAK
IPP
PDissipation in synchronous rectification +IRMS RECT
2 RRECT )QRECT VIN fOSC
2
IRMS RECT +ǒIPEAK2)IPP2)IPEAK IPPǓ
(VIN –V
O)
3 VIN
Ǹ
IO
0 A
Current
time
Inductor
The size and value of the inductor are critical in meeting overall
circuit dimensional requirements and in assuring proper
transient voltage regulation. The size of the core is determined
by the output power, the material of the core, and the operating
frequency. To handle higher output power, the core must be
larger. Luckily, a higher switching frequency will lower the
inductance value, decreasing the core size. However, a higher
switching frequency can also mean greater core loss.
In applications where the dc flux density is high and the ac flux
density swing is only 100 to 200 gauss, the core loss will be
negligible compared to the wire loss. Kool Mu is the best
material to use at 500 kHz to deliver 30 W in the minimum
volume. Ferrite has a lower core cost and loss at this
frequency, but the core size is fairly large. If the power supply
is designed on the motherboard and space is not a critical
issue, ferrite is a better choice.
The higher switching frequency reduces the core size by
decreasing the amount of energy that must be stored between
switching periods. It also accelerates the transient response to
the load by decreasing the inductance value. The inductance
is calculated with following equation:
Si9140
Vishay Siliconix
Document Number: 70026
S-40699—Rev. H, 19-Apr-04
www.vishay.com
15
L+VO2
VIN DI fOSC
DI = desired output current ripple. Typically DI = 25% of maximum
output current.
Finally, the time required to ramp up the current in the inductor
can be reduced with smaller inductance. A quick response
from the power supply relaxes the decoupling capacitance
required at the microprocessor, reducing the overall solution
cost and size.
Input Capacitor
The input capacitor’s function is to filter the raw power and
serve as the local power source to eliminate power-up and
transient surge failures. The type and characteristics of input
capacitors are determined by the input power and inductance
of the step-down converter. The ripple current handling
requirement usually dominates the selection criteria. The
capacitance required to maintain regulation will automatically
be achieved once it meets the ripple current requirement. The
following equation calculates the ripple current of the input
capacitor:
IRIPPLE +IRMSSW
2–I
IN2
Ǹ
An aluminum-electrolytic capacitor from Sanyo (OS-CON),
AVX (TPS Tantalum), or Nichicon (PL series) should be used
in high-power (30-W) applications to handle the ripple current.
The Sanyo capacitor is smaller and handles higher ripple
current than Nichicon, but at higher cost than the Nichicon
product. The AVX Tantalum capacitor has the best
capacitance and current handling capability per volume ratio,
but it takes extra surface area compared to OS-CON or PL
series. The TPS capacitors, lead time and cost have
increased drastically in the recent past due to high demand,
causing designers to shy away from the TPS Tantalum
capacitors. Nichicon capacitors can be used to provide an
economical solution if space is available or a large bulk
capacitance is already present on the input line. The number
of Sanyo (OS-CON) input capacitors required to handle
various output currents are specified in Table 2.
Output Capacitor
To regulate the microprocessor’s input voltage within 145 mV
during 10-A load transients, a large output capacitance with
low ESR is required. The output capacitor of the power supply
and decoupling capacitors at the microprocessor must hold up
the processor voltage until the power supply responds to the
change. Even with fastest known switching solution, it still
takes three 330-mF OS-CON capacitors to handle the load
transient. If it weren’t for the 10-A load transient, the output
capacitor would not need a low ESR value. The fundamental
output ripple current in a continuous step-down converter is
much lower than the input ripple current. Maintaining voltage
regulation during transients requires an ESR in the range of
30 mW. For microprocessors with lower transient
requirements, the number of output and decoupling capacitors
can be reduced. The lower transient requirements also allows
greater consideration for Tantalum or Nichicon PL series
capacitors.
Conclusion
The Si9140 synchronous Buck controller’s ability to switch up
to 1 MHz combined with a 25-MHz error amplifier provides the
best solution in powering high- performance microprocessors.
The high switching frequency reduces inductor size without
compromising output ripple voltage. The wide converter
bandwidth generated with the help of a 25-MHz error amplifier
reduces the amount of decoupling capacitors required to
handle the extreme transient requirement. The Si9140’s
synchronous fixed-frequency operation eliminates the pulse
skipping mode that generates random unpredictable
EMI/EMC problems in desktop and notebook computers. The
synchronous rectification also allows the converter to operate
in continuous current mode, independent of output load
current. This preserves the wide closed-loop converter
bandwidth required to meet the transient demand of the
microprocessor as it transitions from stop clock and auto halt
to active mode. The synchronous rectification improves the
efficiency of the converter by substituting the much smaller I2R
MOSFET loss for the VI diode loss. The need for heatsinking
is eliminated by using low rDS(on) TrenchFETs (Si4410DY and
Si4435DY).
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or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
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All Leads
0.101 mm
0.004 IN
E
H
C
D
e B A1 LĬ
4312 8756
131416 15 91012 11
Package Information
Vishay Siliconix
Document Number: 72807
28-Jan-04
www.vishay.com
1
SOIC (NARROW): 16-LEAD (POWER IC ONLY)
JEDEC Part Number: MS-012
MILLIMETERS INCHES
Dim Min Max Min Max
A1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B0.38 0.51 0.015 0.020
C0.18 0.23 0.007 0.009
D9.80 10.00 0.385 0.393
E3.80 4.00 0.149 0.157
e1.27 BSC 0.050 BSC
H5.80 6.20 0.228 0.244
L0.50 0.93 0.020 0.037
Ĭ0_8_0_8_
ECN: S-40080—Rev. A, 02-Feb-04
DWG: 5912
Vishay Siliconix
Package Information
Document Number: 74417
23-Oct-06
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Symbols
DIMENSIONS IN MILLIMETERS
Min Nom Max
A - 1.10 1.20
A1 0.05 0.10 0.15
A2 - 1.00 1.05
B 0.22 0.28 0.38
C - 0.127 -
D 4.90 5.00 5.10
E 6.10 6.40 6.70
E1 4.30 4.40 4.50
e-0.65-
L 0.50 0.60 0.70
L1 0.90 1.00 1.10
y--0.10
θ10°3°6°
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
TSSOP: 16-LEAD
PAD Pattern
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
RECOMMENDED MINIMUM PAD FOR TSSOP-16
0.281
(7.15)
Recommended Minimum Pads
Dimensions in inches (mm)
0.171
(4.35)
0.055
(1.40)
0.012
(0.30)
0.026
(0.65)
0.014
(0.35)
0.193
(4.90)
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