bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
SINGLE-CELL Li-ION CHARGE MANAGEMENT IC FOR PDAs
AND INTERNET APPLIANCES
FEATURES
DHighly Integrated Solution With FET Pass
Transistor and Reverse-Blocking Schottky
and Thermal Protection
DIntegrated Voltage and Current Regulation
With Programmable Charge Current
DHigh-Accuracy Voltage Regulation (±1%)
DIdeal for Low-Dropout Linear Charger
Designs for Single-Cell Li-Ion Packs With
Coke or Graphite Anodes
DUp to 1.2-A Continuous Charge Current
DSafety-Charge Timer During Preconditioning
and Fast Charge
DIntegrated Cell Conditioning for Reviving
Deeply Discharged Cells and Minimizing Heat
Dissipation During Initial Stage of Charge
DOptional Temperature or Input-Power
Monitoring Before and During Charge
DVarious Charge-Status Output Options for
Driving Single, Double, or Bicolor LEDs or
Host-Processor Interface
DCharge Termination by Minimum Current and
Time
DLow-Power Sleep Mode
DPackaging: 5 mm × 5 mm MLP or 20-Lead
TSSOP PowerPAD
APPLICATIONS
DPDAs
DInternet Appliances
DMP3 Players
DDigital Cameras
DESCRIPTION
The bq2400x series ICs are advanced Li-Ion linear
charge management devices for highly integrated and
space-limited applications. They combine high-
accuracy current and voltage regulation; FET pass-
transistor and reverse-blocking Schottky; battery
conditioning, temperature, or input-power monitoring;
charge termination; charge-status indication; and
charge timer in a small package.
The bq2400x measures battery temperature using an
external thermistor. For safety reasons, the bq2400x
inhibits charge until the battery temperature is within the
user-defined thresholds. Alternatively, the user can
monitor the input voltage to qualify charge. The
bq2400x series then charge the battery in three phases:
preconditioning, constant current, and constant
voltage. If the battery voltage is below the internal
low-voltage threshold, the bq2400x uses low-current
precharge to condition the battery. A preconditioning
timer is provided for additional safety. Following pre-
conditioning, the bq2400x applies a constant-charge
current to the battery. An external sense-resistor sets
the magnitude of the current. The constant-current
phase is maintained until the battery reaches the
charge-regulation voltage. The bq2400x then
transitions to the constant voltage phase. The user can
configure the device for cells with either coke or
graphite anodes. The accuracy of the voltage regulation
is better than ±1% over the operating junction
temperature and supply voltage range.
Charge is terminated by maximum time or minimum
taper current detection
The bq2400x automatically restarts the charge if the
battery voltage falls below an internal recharge
threshold.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of T exas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright 2002, Texas Instruments Incorporated
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION PACKAGE
CHARGE STATUS
TJ20-LEAD HTTSOP PowerP AD
(PWP)(1) 20-LEAD 5 mm × 5 mm MLP
(RGW)(2)
CHARGE ST ATUS
CONFIGURATION
bq24001PWP bq24001RGW Single LED
–40°C to 125°Cbq24002PWP bq24002RGW 2 LEDs
40 C
to
125 C
bq24003PWP bq24003RGW Single bicolor LED
(1) The PWP package is available taped and reeled. Add TR suf fix to device type (e.g. bq24001PWPTR) to order . Quantities 2500 devices per
reel.
(2) The RGW package is available taped and reeled. Add TR suffix to device type (e.g. bq24001RGWTR) to order . Quantities 3000 devices per
reel.
PACKAGE DISSIPATION RATINGS
PACKAGE ΘJA ΘJC TA ≤ 25°C
POWER RA TING DERATING F ACT OR
ABOVE T A = 25°C
PWP(1) 30.88°C/W 1.19°C/W 3.238 W 0.0324W/°C
RGW(2) 31.41°C/W 1.25°C/W 3.183 W 0.0318W/°C
(1) This data is based on using the JEDEC high-K board and topside traces, top and bottom thermal pad (6.5 × 3.4 mm), internal 1 oz power and
ground planes, 8 thermal via underneath the die connecting to ground plane.
(2) This data is based on using the JEDEC high-K board and topside traces, top and bottom thermal pad (3.25 × 3.25 mm), internal 1 oz power
and ground planes, 9 thermal via underneath the die connecting to ground plane.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
bq24001
bq24002
bq24003
Supply voltage (Vcc with respect to GND) 13.5 V
Input voltage (IN, ISNS, EN, APG/THERM/CR/STA T1/STAT2, VSENSE, TMR SEL, VSEL) (all with respect to GND) 13.5 V
Output current (OUT pins) 2 A
Output sink/source current (ST A T1 and ST A T2) 10 mA
Operating free-air temperature range, TA–40°C to 70°C
Storage temperature range, T stg –65°C to 150°C
Junction temperature range, TJ–40°C to 125°C
Lead temperature (Soldering, 10 sec) 300°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
Supply voltage, VCC 4.5 10 V
Input voltage, VIN 4.5 10 V
Continuous output current 1.2 A
Operating junction temperature range, TJ–40 125 °C
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
3
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature supply and input voltages, and VI (VCC)≥VI (IN) ( unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC current VCC > VCC_UVLO, EN ≤ VIH(EN) 1 mA
VCC current, standby mode EN ≤ VIL(EN) 1µA
IN current, standby mode EN ≤ VIL(EN) 10 µA
Standby current (sum of currents into OUT VCC < VCC_UVLO, VOUT = 4.3 V, VSENSE = 4.3V 2 4
µA
Standby
current
(sum
of
currents
into
OUT
and VSENSE pins) EN <= VilEN, VOUT = 4.3 V, VSENSE = 4.3 V 2 4 µA
VOLT AGE REGULATION, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Out
p
utvoltage
VSEL = VSS,0 < IO ≤ 1.2 A 4.059 4.10 4.141 V
Output voltage VSEL = VCC,0 < IO ≤ 1.2 A 4.158 4.20 4.242 V
Load regulation 1 mA ≤ IO ≤ 1.2 A,
VCC =5 V, VI(IN)= 5 V,
TJ = 25°C1 mV
Line regulation VOUT+VDO+Vilim(MAX) < VI(VCC) < 10 V, TJ = 25°C 0.01 %/V
Dro
p
outvoltage VI(IN) Vout
IO = 1.0 A, 4.9 V <VI(Vcc)< 10 V 0.7 V
Dropout voltage = VI(IN)-V out IO = 1.2 A, VOUT+VDO+VilimMAX <VI(VCC)< 10 V 0.8 V
CURRENT REGULATION, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Current regulation threshold VSENSE < VO(VSEL-LOW/HIGH) 0.095 0.1 0.105 V
Delay time VSENSE pulsed above VVLOWV to IO = 10% of
regulated value(1) 1 ms
Rise time IO increasing from 10% to 90% of regulated value.
RSNS≥ 0.2 Ω, (1) 0.1 1 ms
(1) Specified by design, not production tested.
CURRENT SENSE RESIST OR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
External current sense resistor range (RSNS)100 mA ≤ Ilim ≤1.2 A 0.083 1 Ω
PRECHARGE CURRENT REGULATION, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Precharge current regulation VSENSE<VLOWV, 0.083 ≤ RSNS ≤1.0 Ω40 60 80 mA
VCC UVLO COMPARATOR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Start threshold 4.35 4.43 4.50 V
Stop threshold 4.25 4.33 4.40 V
Hysteresis 50 mV
APG/THERM COMPARA T OR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Upper trip threshold 1.480 1.498 1.515 V
Lower trip threshold 0.545 0.558 0.570 V
Input bias current 1µA
LOWV COMPARA T OR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Start threshold 2.80 2.90 3.00 V
Stop threshold 3.00 3.10 3.20 V
Hysteresis 100 mV
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
4
ELECTRICAL CHARACTERISTICS CONTINUED
over recommended operating junction temperature supply and input voltages, and VI (VCC)≥VI (IN) ( unless otherwise noted)
HIGHV (RECHARGE) COMPARATOR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Start threshold 3.80 3.90 4.00 V
OVER V COMPARATOR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Start threshold 4.35 4.45 4.55 V
Stop threshold 4.25 4.30 4.35 V
Hysteresis 50 mV
TAPERDET COMPARATOR, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Trip threshold 12 18.5 25 mV
EN LOGIC INPUT, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
High-level input voltage 2.25 V
Low-level input voltage 0.8 V
Input pulldown resistance 100 200 kΩ
VSEL LOGIC INPUT, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
High-level input voltage 2.25 V
Low-level input voltage 0.8 V
Input pulldown resistance 100 200 kΩ
TMR SEL INPUT 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
High-level input voltage 2.7 V
Low-level input voltage 0.6 V
Input bias current VI(TMR SEL) ≤ 5V 15 µA
STAT1, STAT2 (bq24001, bq24003), 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output (low) saturation voltage IO = 10 mA 1.5 V
Output (low) saturation voltage IO = 4 mA 0.6 V
Output (high) saturation voltage IO = –10 mA VCC–1.5 V
Output (high) saturation voltage IO = –4 mA VCC–0.5 V
Output turn on/off time IO = ± 10 mA, C = 100 p(1) 100 µs
(1) Assured by design, not production tested.
POWER-ON RESET (POR), 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POR delay See Note 1 1.2 3 ms
POR falling-edge deglitch See Note 1 25 75 µs
(1) Assured by design, not production tested.
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
5
ELECTRICAL CHARACTERISTICS CONTINUED
over recommended operating junction temperature supply and input voltages, and VI (VCC)≥VI (IN) ( unless otherwise noted)
APG/THERM DELAY, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
APG/THERM falling-edge deglitch See Note 1 25 75 µs
(1) Assured by design, not production tested.
TIMERS, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
User selectabletimeraccuracy
TA = 25°C–15% 15%
User-selectable timer accuracy –20% 20%
Precharge and taper timer 22.5 minute
THERMAL SHUTDOWN, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Thermal trip See Note 1 165 °C
Thermal hysteresis See Note 1 10 °C
(1) Assured by design, not production tested.
CR PIN, 0°C ≤ TJ ≤ 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output voltage 0 < IO(CR) < 100 µA 2,816 2.85 2.88 V
PIN ASSIGNMENTS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
N/C
IN
IN
VCC
ISNS
N/C
APG/THERM
EN
VSEL
GND/HEATSINK
N/C
OUT
OUT
VSENSE
AGND
N/C
STAT1
TMR SEL
CR
N/C
bq24001
PWP P ACKAGE
(T OP VIEW) 1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
N/C
IN
IN
VCC
ISNS
N/C
APG/THERM
EN
VSEL
GND/HEATSINK
N/C
OUT
OUT
VSENSE
AGND
STAT2
STAT1
TMR SEL
CR
N/C
bq24002, bq24003
PWP P ACKAGE
(T OP VIEW)
N/C – Do not connect
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
6
20
19
18
17
16
6
7
8
9
10
N/C – Do Not Connect
EN
VSEL
GND
CR
N/C
N/C
N/C
N/C
OUT
OUT
11
12
13
14
15
5
4
3
2
1
TMR SEL
STAT1
N/C
AGND
VSENSE
bq24001
RGW PACKAGE
(T OP VIEW)
APG/THERM
ISNS
VCC
IN
IN
bq24002, bq24003
RGW P ACKAGE
(T OP VIEW)
20
19
18
17
16
6
7
8
9
10
EN
VSEL
GND
CR
N/C
N/C
N/C
N/C
OUT
OUT
11
12
13
14
15
5
4
3
2
1
TMR SEL
STAT1
STAT2
AGND
VSENSE
APG/THERM
ISNS
VCC
IN
IN
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO. NO. I/O DESCRIPTION
AGND 16 14 Ground pin; connect close to the negative battery terminal.
APG/THERM 7 5 I Adapter power good input/thermistor sense input
CR 12 9 I Internal regulator bypass capacitor
EN 8 6 I Charge-enable input. Active-high enable input with internal pull down. Low-current stand-by mode
active when EN is low .
GND/HEATSINK 10 8 Ground pin; connect to PowerP AD heat-sink layout pattern.
IN 2, 3 1, 2 IInput voltage. This input provides the charging voltage for the battery .
ISNS 5 4 I Current sense input
N/C 1, 6, 1 1,
15, 20 10, 13,
18–20 No connect. These pins must be left floating. Pin 15 is N/C on bq24001PWP only. Pin 13 is N/C on
bq24001RGW only .
OUT 18, 19 16, 17 OCharge current output
STAT1 14 12 O Status display output 1
STAT2 15 13 O Status display output 2 (for bq24002 and bq24003 only)
TMR SEL 13 11 ICharge timer selection input
VCC 4 3 I Supply voltage
VSEL 9 7 I 4.1 V or 4.2 V charge regulation selection input
VSENSE 17 15 I Battery voltage sense input
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
7
FUNCTIONAL BLOCK DIAGRAM
–
+
Charge Control, Charge T imer
and
Display Logic
OSC VCC
VCC
STAT1
STAT2
TaperDet
REG
PWRDWN
CR
ChargeOK
PWRDWN
UVS
Thermal
Shutdown
TMR SEL
–
+
–
+
Power On
Delay
CLRFLTAPG/
THERM
R9
Precharge
Bias and
Ref
Generator
Vref Vuvlo
H: Vreg = 4.2 V/Cell
L: V reg = 4.1 V/Cell
VSEL
EN
R8
ChipEN
UVS
Vuvlo
+
–
ChargeOK
LowV
+
–
Vilim
VCC
ISNS
–
+TaperDet
IN
Vref AGND
VSENSE
OUT
GND/
HEATSINK
+
–
OverV
+
–
HighV
–
+
LowV
Vref
PWRDWN
T wo Open
Drain
Outputs
for
bq24002
0.2*Vilim
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
8
TYPICAL CHARACTERISTICS
Figure 1
IO – Output Current – mA
4.06
4.08
4.10
4.12
4.14
4.16
4.18
4.20
4.22
4.24
0 200 400 600 800 1000 1200
VIN = 5 V
TA = 25°C
VO – Output V oltage – V
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VSEL = VSS
VSEL = VCC
Figure 2
TJ – Junction T emperature – °C
4.06
4.08
4.10
4.12
4.14
4.16
4.18
4.20
4.22
4.24
–50 0 50 100 150
VIN = 5 V
VO – Output V oltage – V
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
VSEL = VSS
VSEL = VCC
Figure 3
VI – Input Voltage – V
4.06
4.08
4.10
4.12
4.14
4.16
4.18
4.20
4.22
4.24
5678910
IO = 100 mA
TA = 25°C
VO – Output V oltage – V
OUTPUT VOLTAGE
vs
INPUT VOLT AGE
VSEL = VSS
VSEL = VCC
Figure 4
VI – Input Voltage – V
97
98
99
100
101
102
103
5678910
IO = 100 mA
TA = 25°C
Current Sense V oltage – mV
CURRENT SENSE VOLTAGE
vs
INPUT VOLT AGE
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
9
TYPICAL CHARACTERISTICS
Figure 5
TJ – Junction T emperature – °C
98
99
100
101
102
103
–50 0 50 100 150
Current Sense V oltage – mV
CURRENT SENSE VOLTAGE
vs
JUNCTION TEMPERATURE
VCC = 10 V
VCC = 5 V
IO = 100 mA
TA = 25°C
Figure 6
VI – Input Voltage – V
0.0
0.1
0.2
0.3
0.4
0.5
5678910
TA = 25°C
Quiescent Current – mA
QUIESCENT CURRENT
vs
INPUT VOLT AGE
Figure 7
VI – Input Voltage – V
0
5
10
15
20
25
30
5678910
TA = 25°C
Quiescent Current – nA
QUIESCENT CURRENT
(POWER DOWN)
vs
INPUT VOLT AGE
Figure 8
VI – Input Voltage – V
0
100
200
300
400
500
600
4.5 5.5 6.5 7.5 8.5 9.5
TA = 25°C
Dropout V oltage – mV
DROPOUT VOLT AGE
vs
INPUT VOLT AGE
100 mA
400 mA
1200 mA
800 mA
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
10
TYPICAL CHARACTERISTICS
Figure 9
IO – Output Current – mA
0
100
200
300
400
500
600
0 200 400 600 800 1000 1200
TA = 25°C
Dropout V oltage – mV
DROPOUT VOLT AGE
vs
OUTPUT CURRENT
VCC = 5 V
VCC = 10 V
Figure 10
TJ – Junction T emperature – °C
100
200
300
400
500
600
700
800
–50 0 50 100 150
Dropout V oltage – mV
DROPOUT VOLT AGE
vs
JUNCTION TEMPERATURE
VIN = 10 V
VIN = 5 V
IO = 1.2 A
Figure 11
TJ – Junction T emperature – °C
0
1
2
3
4
5
6
–50 0 50 100 150
IR – Reverse Current – µA
REVERSE CURRENT
vs
JUNCTION TEMPERATURE
VOUT = 4.3 V
Figure 12
VO – V oltage on Out Pin – V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
5678910
IR – Reverse Current Leakage – µA
REVERSE CURRENT LEAKAGE
vs
VOLTAGE ON OUT PIN
TA = 25°C
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
11
APPLICATION INFORMATION
U1
N/C N/C
120
IN OUT
219
IN OUT
318
VCC VSENSE
417
ISNS AGND
516
N/C STAT2
615
APG/THM STAT1
714
VSEL CR
912
EN TMR SEL
813
GND N/C
10 11
VCC
C2
0.1 µF
R1
0.1 Ω
C1
10 µF +
DC–
DC+
VCC
bq24002PWP
TEMP
PACK+
PACK–
R2
18.7 kΩ
C3
0.22 µF
+
–
C4
1 µF
Battery
Pack
R4
500 Ω
D1
VCC
R5
500 Ω
D2
R3
95.3 kΩ
Figure 13. Li-Ion/Li-Pol Charger
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
12
APPLICATION INFORMATION
FUNCTIONAL DESCRIPTION
The bq2400x supports a precision current- and voltage-regulated Li-Ion charging system suitable for cells with either coke
or graphite anodes. See Figure 14 for a typical charge profile and Figure 15 for an operational flowchart.
Preconditioning
Phase
Regulation V oltage
(VOUT)
Current Regulation
Phase Voltage Regulation and
Charge T erminationPhase
Regulation Current
(Ilim)
Minimum Charge
Voltage (LowV)
Preconditioning
Current (IPRECHG)
Charge V oltage
Charge Current
22.5 Minutes 22.5 Minutes
Charge T imer (3, 4.5 or 6 Hours)
Taper Detect
Figure 14. Typical Charge Profile
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
13
Yes
No
22.5min Timer
Expired? No
Yes
Indicate Fault
POR?
or
APG/THERM toggle?
or
EN toggle?
Yes
No
Yes
Charge timer
Expired?
No
Indicate Pre–
Charge
Regulate
I(PRECHG)
Indicate Charge
Regulate Current
or Voltage
Reset and Start
22.5 min Timer
POR
Reset All Timers,
Start Charge Timer
(TMR SEL input )
No
Fault Condition
No
Yes
Indicate DONE
Turn Off Charge
Taper
Detected?
No
No
Yes
Yes
No
Yes
No
Yes
22.5min Timer
Expired?
Yes
Yes
Indicate DONE
Start 22.5 minute
Timer
VI(VSENSE) < V(HIGHV)?
or
POR?
or
APG/THERM Toggle?
or
EN Toggle?
VI(VSENSE) < V(LOWV)?
VI(VSENSE) > V(OVERV)?
VI(VSENSE) > V(OVERV)?
VI(VSENSE) < V(LOWV)?
VI(VSENSE) < V(LOWV)?
Figure 15. Operational Flow Chart
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
14
Charge Qualification and Preconditioning
The bq2400x starts a charge cycle when power is applied
while a battery is present. Charge qualification is based on
battery voltage and the APG/THERM input.
As shown in the block diagram, the internal LowV
comparator output prevents fast-charging a deeply
depleted battery. When set, charging current is provided
by a dedicated precharge current source. The precharge
timer limits the precharge duration. The precharge current
also minimizes heat dissipation in the pass element during
the initial stage of charge.
The APG/THERM input can also be configured to monitor
either the adapter power or the battery temperature using
a thermistor. The bq2400x suspends charge if this input is
outside the limits set by the user. Please refer to the
APG/THERM input section for additional details.
APG/THERM Input
The bq400x continuously monitors temperature or system
input voltage by measuring the voltage between the
APG/THERM (adapter power good/thermistor) and GND.
For temperature, a negative- or a positive- temperature
coefficient thermistor (NTC, PTC) and an external voltage
divider typically develop this voltage (see Figure 16). The
bq2400x compares this voltage against its internal VTP1
and VTP2 thresholds to determine if charging is allowed.
(See Figure 17.)
U1
N/C N/C
120
IN OUT
219
IN OUT
318
VCC VSENSE
417
ISNS AGND
516
N/C STAT2
615
APG/THM STAT1
714
VSEL CR
912
EN TMR SEL
813
GND N/C
10 11
bq24002PWP
TEMP
PACK+
PACK–
RT1
C3
0.22 µF
+
–
Battery Pack
RT2
NTC Thermistor
Figure 16. Temperature Sensing Circuit
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
15
GND
VTP2
VTP1
Vcc
Normal Temp Range
Temp Fault
Temp Fault
Figure 17. Temperature Threshold Figure 18. APG Sensing Circuit
U1
N/C N/C
120
IN OUT
219
IN OUT
318
VCC VSENSE
417
ISNS AGND
516
N/C STAT2
615
APG/THM STAT1
714
VSEL CR
912
EN TMR SEL
813
GND N/C
10 11
DC–
DC+
VCC
bq24002PWP
R1
R2
Values of resistors R1 and R2 can be calculated using the following equation:
VAPG +VCC R2
(R1)R2)
where VAPG is the voltage at the APG/THM pin.
Current Regulation
The bq2400x provides current regulation while the battery-pack voltage is less than the regulation voltage. The current
regulation loop effectively amplifies the error between a reference signal, Vilim, and the drop across the external sense
resistor, RSNS.U1
N/C N/C
120
IN OUT
219
IN OUT
318
VCC VSENSE
417
ISNS AGND
516
N/C STAT2
615
APG/THM STAT1
714
VSEL CR
912
EN TMR SEL
813
GND N/C
10 11
VCC
C2
0.1 µF
RSNS
C1
10 µF+
DC–
DC+
VCC
bq24002PWP
Figure 19. Current Sensing Circuit
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
16
Charge current feedback, applied through pin ISNS,
maintains regulation around a threshold of Vilim. The
following formula calculates the value of the sense
resistor:
RSNS +Vilim
IREG
where IREG is the desired charging current.
Voltage Monitoring and Regulation
Voltage regulation feedback is through pin VSENSE. This
input is tied directly to the positive side of the battery pack.
The bq2400x supports cells with either coke (4.1 V) or
graphite (4.2 V) anode. Pin VSEL selects the charge
regulation voltage.
VSEL State
(see Note) CHARGE REGULA TION
VOLTAGE
Low 4.1 V
High 4.2 V
NOTE: VSEL should not be left floating.
Charge Termination
The bq2400x continues with the charge cycle until
termination by one of the two possible termination
conditions:
Maximum Charge Time: The bq2400x sets the maximum
charge time through pin TMRSEL. The TMR SEL pin
allows the user to select between three different total
charge-time timers (3, 4, 5, or 6 hours). The charge timer
is initiated after the preconditioning phase of the charge
and is reset at the beginning of a new charge cycle. Note
that in the case of a fault condition, such as an out-of-range
signal on the APG/THERM input or a thermal shutdown,
the bq2400x suspends the timer.
TMRSEL ST ATE CHARGE TIME
Floating(1) 3 hours
Low 6 hours
High 4.5 hours
(1) To improve noise immunity, it is recommended that a minimum of
10 pF capacitor be tied to Vss on a floating pin.
Minimum Current: The bq2400x monitors the charging
current during the voltage regulation phase. The bq2400x
initiates a 22-minute timer once the current falls below the
taperdet trip threshold. Fast charge is terminated once the
22-minute timer expires.
Charge Status Display
The three available options allow the user to configure the
charge status display for single LED (bq24001), two
individual LEDs (bq24002) or a bicolor LED (bq24003).
The output stage is totem pole for the bq24001 and
bq24003 and open-drain for the bq24002. The following
tables summarize the operation of the three options:
Table 1. bq24001 (Single LED)
CHARGE STA TE STAT1
Precharge ON (LOW)
Fast charge ON (LOW)
FAULT Flashing (1 Hz, 50% duty cycle)
Done (>90%) OFF (HIGH)
Sleep-mode OFF (HIGH)
APG/Therm invalid OFF (HIGH)
Thermal shutdown OFF (HIGH)
Battery absent OFF (HIGH)
Table 2. bq24002 (2 Individual LEDs)
CHARGE STA TE ST AT1 (RED) STAT2
(GREEN)
Precharge ON (LOW) OFF
Fast charge ON (LOW) OFF
FAULT Flashing (1 Hz,
50% duty cycle) OFF
Done (>90%) OFF ON (LOW)
Sleep-mode OFF OFF
APG/Therm invalid OFF OFF
Thermal shutdown OFF OFF
Battery absent OFF OFF(1)
(1) If thermistor is used, then the Green LED is off.
Table 3. bq24003 (Single Bicolor LED)
CHARGE STA TE LED1 (RED) LED2
(GREEN) APPARENT
COLOR
Precharge ON (LOW) OFF (HIGH) RED
Fast charge ON (LOW) OFF (HIGH) RED
FAULT ON (LOW) ON (LOW) YELLOW
Done (>90%) OFF (HIGH) ON (LOW) GREEN
Sleep-mode OFF (HIGH) OFF (HIGH) OFF
APG/Therm
invalid OFF (HIGH) OFF (HIGH) OFF
Thermal
shutdown OFF (HIGH) OFF (HIGH) OFF
Battery absent OFF (HIGH) OFF (HIGH)(1) OFF(1)
(1) If thermistor is used, then the Green LED is off.
Thermal Shutdown
The bq2400x monitors the junction temperature TJ of the
DIE and suspends charging if TJ exceeds 165°C.
Charging resumes when TJ falls below 155°C.
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
17
DETAILED DESCRIPTION
POWER FET
The integrated transistor is a P-channel MOSFET. The
power FET features a reverse-blocking Schottky diode,
which prevents current flow from OUT to IN.
An internal thermal-sense circuit shuts off the power FET
when the junction temperature rises to approximately
165°C. Hysteresis is built into the thermal sense circuit.
After the device has cooled approximately 10°C, the
power FET turns back on. The power FET continues to
cycle off and on until the fault is removed.
CURRENT SENSE
The bq2400x regulates current by sensing, on the ISNS
pin, the voltage drop developed across an external sense
resistor. The sense resistor must be placed between the
supply voltage (Vcc) and the input of the IC (IN pins).
VOLTAGE SENSE
To achieve maximum voltage regulation accuracy, the
bq2400x uses the feedback on the VSENSE pin.
Externally, this pin should be connected as close to the
battery cell terminals as possible. For additional safety, a
10kΩ internal pullup resistor is connected between the
VSENSE and OUT pins.
ENABLE (EN)
The logic EN input is used to enable or disable the IC. A
high-level signal on this pin enables the bq2400x. A
low-level signal disables the IC and places the device in a
low-power standby mode.
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
18
THERMAL INFORMATION
THERMALLY ENHANCED TSSOP-20
The thermally enhanced PWP package is based on the
20-pin TSSOP, but includes a thermal pad (see
Figure 20) to provide an effective thermal contact between
the IC and the PWB.
Traditionally, surface mount and power have been
mutually exclusive terms. A variety of scaled-down
TO220-type packages have leads formed as gull wings to
make them applicable for surface-mount applications.
These packages, however, suffer from several
shortcomings: they do not address the very low profile
requirements (<2 mm) of many of today’s advanced
systems, and they do not of fer a pin-count high enough to
accommodate increasing integration. On the other hand,
traditional low-power surface-mount packages require
power-dissipation derating that severely limits the usable
range of many high-performance analog circuits.
The PWP package (thermally enhanced TSSOP)
combines fine-pitch surface-mount technology with
thermal performance comparable to much larger power
packages.
The PWP package is designed to optimize the heat
transfer to the PWB. Because of the very small size and
limited mass of a TSSOP package, thermal enhancement
is achieved by improving the thermal conduction paths that
remove heat from the component. The thermal pad is
formed using a lead-frame design (patent pending) and
manufacturing technique to provide the user with direct
connection to the heat-generating IC. When this pad is
soldered or otherwise coupled to an external heat
dissipator, high power dissipation in the ultrathin,
fine-pitch, surface-mount package can be reliably
achieved.
DIE
Side View (a)
End View (b)
Bottom View (c)
DIE
Thermal
Pad
Figure 20. Views of Thermally Enhanced
PWP Package
Because the conduction path has been enhanced,
power-dissipation capability is determined by the thermal
considerations in the PWB design. For example, simply
adding a localized copper plane (heat-sink surface), which
is coupled to the thermal pad, enables the PWP package
to dissipate 2.5 W in free air. (Reference Figure 22(a), 8
cm2 of copper heat sink and natural convection.)
Increasing the heat-sink size increases the power
dissipation range for the component. The power
dissipation limit can be further improved by adding airflow
to a PWB/IC assembly (see Figure 22(b) and 22(c)). The
line drawn at 0.3 cm2 in Figures 21 and 22 indicates
performance at the minimum recommended heat-sink
size.
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
19
THERMAL INFORMATION
100
75
50
25 0235
– Thermal Resistance –
125
THERMAL RESISTANCE
vs
COPPER HEAT-SINK AREA
150
781460.3
Natural Convection
50 ft/min
250 ft/min
300 ft/min
C/W
°
Copper Heat-Sink Area – cm2
100 ft/min
150 ft/min
200 ft/min
RJA
θ
Figure 21
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
20
THERMAL INFORMATION
1
0.5
3
00246
2
1.5
2.5
3.5
8
0.3
300 ft/min
150 ft/min
Natural Convection
Copper Heat-Sink Size – cm2
TA = 55°C
(b)
1
0.5
3
00246
2
1.5
2.5
3.5
8
0.3
300 ft/min 150 ft/min
Natural Convection
Copper Heat-Sink Size – cm2
TA = 105°C
(c)
1
0.5
3
00246
– Power Dissipation Limit – W
2
1.5
2.5
3.5
8
0.3
300 ft/min
150 ft/min
Natural Convection
PD
Copper Heat-Sink Size – cm2
TA = 25°C
(a)
– Power Dissipation Limit – W
PD
– Power Dissipation Limit – W
PD
Figure 22. Power Ratings of the PWP Package at Ambient Temperatures of 25°C, 55°C, and 105°C
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
21
MECHANICAL DATA
PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE
4073225/F 10/98
0,50
0,75
0,25
0,15 NOM
Thermal Pad
(See Note D)
Gage Plane
2824
7,70
7,90
20
6,40
6,60
9,60
9,80
6,60
6,20
11
0,19
4,50
4,30
10
0,15
20
A
1
0,30
1,20 MAX
1614
5,10
4,90
PINS **
4,90
5,10
DIM
A MIN
A MAX
0,05
Seating Plane
0,65
0,10
M
0,10
0°–ā8°
20 PINS SHOWN
NOTES:A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153.
PowerPAD is a trademark of Texas Instruments.
bq24001
bq24002
bq24003
SLUS462C – SEPTEMBER 2000 – REVISED APRIL 2002
www.ti.com
22
MECHANICAL DATA
RGW (S-PQFP-N20) PLASTIC QUAD FLATPACK
Seating Plane
4204100/A 01/02
1,00
0,80
0,23
0,38
0,05
Exposed Thermal Die
Pad
(See Note D)
Pin 1 Index
Area
Top and Bottom
0,00
1
5,15
3,25 SQ MAX
0,75
0,35
4,85
0,08
0,10
4,85
5,15
5
20 6
11
15
16 10
2,60
20X
20X
0,65
0,20 REF.
NOTES:A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Quad Flatpack, No-leads, (QFN) package configuration.
D. The package thermal performance may be enhanced by bonding the thermal die pad to an external thermal plane.
E. Falls within JEDEC M0-220.
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