DATA SH EET
Product specification
Supersedes data of 1998 Apr 28 2002 Mar 12
INTEGRATED CIRCUITS
74LVC138A
3-to-8 line decoder/demultiplexer;
inverting
2002 Mar 12 2
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
FEATURES
•5 V tolerant inputs for interfacing with 5 V logic
•Wide supply voltage range from 1.2 to 3.6 V
•CMOS low power consumption
•Direct interface with TTL levels
•Inputs accept voltages up to 5.5 V
•Complies with JEDEC standard no. 8-1A
•Demultiplexing capability
•Multiple input enable for easy expansion
•Ideal for memory chip select decoding
•Active LOW mutually exclusive outputs
•Output drive capability 50 Ω transmission lines at
125 °C
•Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74LVC138A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
The 74LVC138A accepts three binary weighted address
inputs (A0,A
1and A2) and when enabled, provides 8
mutually exclusive active LOW outputs (Y0to Y7).
The 74LVC138A features three enable inputs: two active
LOW (E1and E2) and one active HIGH (E3). Every output
will be HIGH unless E1and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel
expansion of the 74LVC138A to a 1-of-32 (5 to 32 lines)
decoder with just four 74LVC138A ICs and one inverter.
The 74LVC138A can be used as an eight output
demultiplexer by using one of the active LOW enable
inputsasthedatainputandtheremainingenableinputsas
strobes. Unused enable inputs must be permanently tied
to their appropriate active HIGH or LOW state.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f≤2.5 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts;
Σ(CL×VCC2×fo) = sum of the outputs.
2. The condition is VI= GND to VCC.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH propagation delay CL= 50 pF; VCC = 3.3 V
Anto Yn3.5 ns
E3to Yn, Ento Yn3.5 ns
CIinput capacitance 4.0 pF
CPD power dissipation capacitance per package VCC = 3.3 V; notes 1 and 2 21 pF
2002 Mar 12 3
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
ORDERING INFORMATION
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
PINNING
TYPE NUMBER PACKAGES
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74LVC138AD −40 to +125 °C 16 SO plastic SOT109-1
74LVC138ADB −40 to +125 °C 16 SSOP plastic SOT338-1
74LVC138APW −40 to +125 °C 16 TSSOP plastic SOT403-1
INPUTS OUTPUTS
E1E2E3A0A1A2Y0Y1Y2Y3Y4Y5Y6Y7
HXXXXXHHHHHHHH
XHXXXXHHHHHHHH
XXLXXXHHHHHHHH
LLHLLLLHHHHHHH
LLHHLLHLHHHHHH
LLHLHLHHLHHHHH
LLHHHLHHHLHHHH
LLHLLHHHHHLHHH
LLHHLHHHHHHLHH
LLHLHHHHHHHHLH
LLHHHHHHHHHHHL
PIN SYMBOL DESCRIPTION
1, 2 and 3 A0to A2address input
4 and 5 E1, E2enable input (active LOW)
6E
3enable input (active HIGH)
7, 9, 10, 11, 12, 13, 14 and 15 Y7to Y0output
8 GND ground (0 V)
16 VCC supply voltage
2002 Mar 12 4
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
handbook, halfpage
138
MNA369
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A0
A1
A2
E1
E2
E3
Y7
GND Y6
Y5
Y4
Y3
Y2
Y1
Y0
VCC
Fig.1 Pin configuration.
handbook, halfpage
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y77
9
10
11
12
13
14
15A0
A1
A2
3
2
1
6
5
4E2
E1
E3
MNA370
Fig.2 Logic symbol.
handbook, halfpage
MNA371
7
9
10
11
12
13
14
&
X/Y 15
7
EN6
5
4
3
2
1
0
6
5
4
3
2
11
4
2
7
9
10
11
12
13
14
&
DX
(a) (b)
15
7
6
5
4
3
2
1
0
6
5
4
3
2
10
2
G0
7
Fig.3 Logic symbol (IEEE/IEC).
handbook, halfpage
MNA372
ENABLE
EXITING
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y77
9
10
11
12
13
14
15
A0
A1
A23-to-8
DECODER
3
2
1
6
5
4
E2
E1
E3
Fig.4 Functional diagram.
2002 Mar 12 5
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage for maximum speed
performance 2.7 3.6 V
for low voltage applications 1.2 3.6 V
VIinput voltage 0 5.5 V
VOoutput voltage output HIGH or LOW state 0 VCC V
Tamb operating ambient temperature −40 +125 °C
tr,t
finput rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V
VCC = 2.7 to 3.6 V 0 10 ns/V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5 V
IIK input diode current VI<0 −−50 mA
VIinput voltage note 1 −0.5 +6.5 V
IOK output diode current VO>V
CC or VO<0 −±50 mA
VOoutput voltage output HIGH or LOW state;
note 1 −0.5 VCC + 0.5 V
IOoutput source or sink current VO=0toV
CC −±50 mA
IGND, ICC VCC or GND current −±100 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation per package
SO package above 70 °C derate linearly
with 8 mW/K −500 mW
SSOP and TSSOP packages above 60 °C derate linearly
with 5.5 mW/K −500 mW
2002 Mar 12 6
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
DC CHARACTERISTICS
Over recommended operating conditions; voltages are referenced to GND (ground=0V).
Note
1. All typical values are measured at VCC = 3.3 V and Tamb =25°C.
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C) Tamb (°C)
UNIT
OTHER VCC (V) −40 to +85 −40 to +125
MIN. TYP.(1) MAX. MIN. MAX.
VIH HIGH-level
input voltage 1.2 VCC −−V
CC −V
2.7 to 3.6 2.0 −−2.0 −V
VIL LOW-level
input voltage 1.2 −−GND −GND V
2.7 to 3.6 −−0.8 −0.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=−100 µA 2.7 to 3.6 VCC −0.2 VCC −VCC −0.3 −V
IO=−12 mA 2.7 VCC −0.5 −−V
CC −0.65 −V
IO=−18 mA 3.0 VCC −0.6 −−V
CC −0.75 −V
IO=−24 mA 3.0 VCC −0.8 −−V
CC −1−V
VOL LOW-level
output voltage VI=V
IH or VIL
IO= 100 µA 2.7 to 3.6 −GND 0.2 −0.3 V
IO= 12 mA 2.7 −−0.4 −0.6 V
IO= 24 mA 3.0 −−0.55 −0.8 V
IIinput leakage
current VI= 5.5 Vor GND 3.6 −±0.1 ±5−±20 µA
ICC quiescent
supply
current
VI=V
CC or GND;
IO=0 3.6 −0.1 10 −40 µA
∆ICC additional
quiescent
supply
current per
input pin
VI=VCC −0.6 V;
IO=0 2.7 to 3.6 −5 500 −5000 µA
2002 Mar 12 7
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
AC CHARACTERISTICS
GND = 0 V; tr=t
f≤2.5 ns.
Notes
1. All typical values are measured at VCC = 3.3 V.
2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
by design.
AC WAVEFORMS
SYMBOL PARAMETER WAVEFORMS
Tamb (°C)
UNIT−40 to +85 −40 to +125
MIN. TYP.(1) MAX. MIN. MAX.
VCC = 1.2 V
tPHL/tPLH propagation delay Anto Ynsee Figs 5 and 7 −14 −−−ns
tPHL/tPLH propagation delay E3to Ynsee Figs 5 and 7 −14 −−−ns
tPHL/tPLH propagation delay Ento Ynsee Figs 6 and 7 −15 −−−ns
VCC = 2.7 V
tPHL/tPLH propagation delay Anto Ynsee Figs 5 and 7 1.5 3.1 6.8 1.5 8.5 ns
tPHL/tPLH propagation delay E3to Ynsee Figs 5 and 7 1.5 3.2 6.8 1.5 8.5 ns
tPHL/tPLH propagation delay Ento Ynsee Figs 6 and 7 1.5 3.2 6.4 1.5 8.0 ns
VCC = 3.0 to 3.6 V
tPHL/tPLH propagation delay Anto Ynsee Figs 5 and 7 1.0 2.6 5.8 1.0 7.5 ns
tPHL/tPLH propagation delay E3to Ynsee Figs 5 and 7 1.0 2.8 5.8 1.0 7.5 ns
tPHL/tPLH propagation delay Ento Ynsee Figs 6 and 7 1.0 2.7 5.8 1.0 7.5 ns
tsk(0) skew note 2 −−1.0 −1.5 ns
handbook, halfpage
MNA373
An, E3
input
Yn
tPHL tPLH
GND
VCC
VM
VM
VOH
VOL
Fig.5 The inputs An, E3 to outputs Yn propagation delays.
VM= 1.5 V at VCC ≥2.7 V;
VM= 0.5VCC at VCC < 2.7 V;
VOL and VOH are typical output voltage drop that occur with the output load.
2002 Mar 12 8
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
handbook, halfpage
MNA374
E1, E2
input
Yn
tPHL tPLH
GND
VCC
VM
VM
VOH
VOL
Fig.6 The inputs En to outputs Yn propagation delays.
VM= 1.5 V at VCC ≥2.7 V;
VM= 0.5VCC at VCC < 2.7 V;
VOL and VOH are typical output voltage drop that occur with the output load.
handbook, full pagewidth
open
GND
50 pF
2 × VCC
VCC
VIVO
MNA368
D.U.T.
CL
RT
RL
500 Ω
RL
500 Ω
PULSE
GENERATOR
S1
Fig.7 Load circuitry for switching times.
VCC VItPLH/tPHL
1.2 V VCC open
2.7 V 2.7 V open
3.0 to 3.6 V 2.7 V open
Definitions for test circuits:
RL= Load resistor.
CL= Load capacitance including jig and probe capacitance.
RT= Termination resistance should be equal to the output impedance Zo of the pulse generator.
2002 Mar 12 9
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
PACKAGE OUTLINES
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.0
0.4
SOT109-1 97-05-22
99-12-27
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.050
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
2002 Mar 12 10
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 95-02-04
99-12-27
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2.0
2002 Mar 12 11
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21.0
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 95-04-04
99-12-27
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.10
pin 1 index
2002 Mar 12 12
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesavery brief insighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,butitisnot suitable for finepitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit boardby screen printing,stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
•Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
•Forpackageswithleadsonfoursides,the footprint must
be placed at a 45°angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2002 Mar 12 13
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
PACKAGE SOLDERING METHOD
WAVE REFLOW(1)
BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not suitable(2) suitable
PLCC(3), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(3)(4) suitable
SSOP, TSSOP, VSO not recommended(5) suitable
2002 Mar 12 14
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DATA SHEET STATUS(1) PRODUCT
STATUS(2) DEFINITIONS
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at anyotherconditionsabove those giveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts,conveys no licence ortitle
under any patent, copyright, or mask work right to these
products,andmakes norepresentationsor warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2002 Mar 12 15
Philips Semiconductors Product specification
3-to-8 line decoder/demultiplexer; inverting 74LVC138A
NOTES
© Koninklijke Philips Electronics N.V. 2002 SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands 613508/03/pp16 Date of release: 2002 Mar 12 Document order number: 9397 750 09448
