
NJW1124
– 19 –
7.1 Level Detector Circuit
Fig.8 shows level detector circuit.
Level detector circuit includes logarithmic amplifier using diodes (D1,D2) to keep dynamic range.
The signals input to each level detector through external coupling capacitor Ci , are converted to current by input
resistance Rin and input logarithmic amplifier through TLI2,1 and RLI1,2.
The current input changes diode(D1) current .
When the current more than 0.54µA(Current Source circuit ) inputs ,diode D1 is off, and A point voltage drops.
In case of sinking current, the current increase D1 current, that increase A point voltage rises.
The point voltage is defined as follows. .
∆V
A
=0.026 x Ln [ { Iin
+ (0.54x10
-6
) } / (0.54x10
-6
) ]
Iin=Vin/Rin.( Actually, Ci effects)
The voltage A point goes through buffer Amplifier AMP2, charge the capacitor connected to TLO1.2,RLO1.2.
The charging completes immediately.
Response Example1 shows TLO2(Co=C5=0.1µF) signal waveform outputting 200mVrms/1kHz from
MICOUT(MCO pin).
without input signal from TL1,TL2,RL1,and RL2,Co releases current.
The Voltage Gradient is defined as follows:
δVc=-0.3µA/Co
Response Example 2 shows the signal response finishing input the signal.
Actual application being influenced on leak current and equivalent resistance in series,
δVc does not accords with the formula completely. Check on the operation using actual capacitor
(Use high input impedance probe like FET Measuring instrument)
Small capacitor shortens the time to detect, and deteriorate the low frequency rectification characteristics.
That influences on Noise Detector on next page.
Large capacitor improves rectification characteristics, and noise detector function.
However, extends the time to detect, it may judges the signal on noise.
Appropriate capacitor value depends on a application.
The input current TLI1,TLI2,RLI1,and RLI2 should be less than 100µΑ
µΑµΑ
µΑ for normal operating .
Especially, gain mode has 9dB gain max, care of excessive input.
Voice switch circuit may malfunctions with Excessive input current
Fig.9 shows Rin(input impedance) vs. minimum input sensitivity of noise detector and maximum permissible
voltage.
Fig.8 Level Detector Circuit Diagram
Iin
C
o
(C3,C20
C21,C4)
I1
0.54uA
I3
0.3uA
TLI2,1
RLI1,2
TLO2, 1
RLO1,2
C
i
(C7,C8
C18,C17)
R
in
(R4,R5
R12,R11)
Ref
MP1
D1
D2
I2
0.54uA
MP2
V
in
I
O
Outside parts Function recommend value Detail Memo
Cin DC decoupling 100nF~1
F-Sha
e HPF : fc=1/
2π×Cin×Rin
Rin V/I Convert 5kΩ~100kΩIin=Vin/Rin Use " Iin " by 100mA or less.
Co
etection level keepin
0.05µF~1.0mF δVC = -0.3uA / CO
Use the capacitor leaking a little. Small capacitor
deteriorate the low frequency rectification
characteristics .