Version 2.0 10 24 August 2009
Half-Bridge Resonant Controller
ICE1HS01G
Functional description
current source Ihys connected between VINS and
Ground, an adjustable hysteresis between the on and
off input voltage can be created as
[4]
The mains input voltage is divided by RINS1 and RINS2 as
shown in the typical application circuit. A current source
Ihys is connected from VINS pin to ground in the IC. If
the on and off threshold for mains voltage is Vmainon and
Vmainoff, the resistors can be decided as
[5]
[6]
3.7 Over load protection
In case of open control loop or output over load fault,
the FB voltage will increase to its maximum level. If FB
voltage is higher than VFBH and this condition last
longer than a fixed blanking time of TOLP (20ms), the IC
will start the extended blanking timer. The extended
blanking timer is realized by charging and discharging
the filter capacitor CFB via the pull up resistor RFB and
QFB. The circuit for extended blanking timer is shown in
Figure 11.
Figure 11 Circuit connected to FB pin
The FB voltage waveform during a OLP period is
shown in Figure 12. After FB voltage has been higher
than VFBH for the fixed blanking time t1 shown in Figure
11, IC will use internal switch QFB to discharge VFB to
VFBL. After the switch QFB is released, CFB will be
charged up by Vdd through RFB. The time needed for
CFB being charged to VFBH can be calculated as
[7]
If CFB is 10nF, the time is about 439us. After VFB
reaches VFBH, an internal counter will increase by 1 and
the capacitor is discharged to 0.5V by QFB again. The
charging and discharging process of CFB will be
repeated for NOLP_E times if the fault condition still exist.
After the last time of NOLP_E the FB voltage is pulled
down to zero, IC will stop the switch when FB voltage
rises to VFBH again. This is called over load/open loop
proteciton. During the charging and discharging period,
the IC will operate with frequency determined by Ichg_min
and ICS.
Figure 12 FB voltage waveform during over load
protection
If the converter returns to normal operation during the
extended blanking time period, FB voltage can not
reach VFBH again. Therefore, after FB voltage is
discharged to zero voltage, if it can not reach VFBH
within TOLP_R, IC will reset all the fault timer to zero and
return to normal operation.
After IC enters into OLP, both switches will be stopped.
However, the IC remains active and will try to start with
soft start after an adjustable period. This period is
realized by charging and discharging the capacitor CINS
connected to VINS pin for NOLP_R times. The time is
therefore determined by the capacitor CINS and resistor
RINS1 and RINS2. The circuit implementation of the
adjustable off time is shown in Figure 13 and Figure 14
shows the voltage waveform of VINS in this case.
As shown in Figure 14, the CINS is discharged to VINS_L
when IC enters into OLP at time t1. After that, an
internal constant current source IINST is turned on to
charge CINS. Once the voltage on VINS is charged to
VINS_H, the current source will be turned off and CINS is
discharged by another switch Q3 to VINS_L again. The
charging and discharging of CINS is thought as one
cycle. The cylce time is also influenced by the bus
VHYS RINS1 Ihys
⋅=
RINS1
Vmainon Vmainoff
–
Ihys
-------------------------------------------=
RINS2 RINS1
VINSON
Vmainoff VINSON
–
-------------------------------------------⋅=
FB
I
1.0V
IFB
Vdd
RFB
CFB1
4.5V
TOLP
24ms
CFB3
CFB2
EnA
EnA
0.5V
S
R
Q
QFB
CLK OLP
UP Reset
TOLP_R
1.2 ms
S
R
Q
CFB4
EnA
CFB5
EnA
0.8V
0.5V
S
RQGate_off
AR
Iref
S
R
Q
AR_R
ICE1HS01G
tchg
Vdd V– FBH
Vdd VFBL
–
---------------------------
ln–R
FB CFB
⋅⋅=
VFB(V)
Time
5V
4.5V
t1t2t3
0.5V