T-51381L064J-FW-P-AA OPTREX CORPORATION Page 1/22
LCD Module Technical Specification
T-51381L064J-FW-P-AA
Table of Contents
1. Applications............................................................................................................................................................. 2
2. Features........................................................................................................................................................................ 2
3. Mechanical specifications.............................................................................................................................. 2
4. Mechanical Drawing TFT LCD Module............................................................................................. 3
5. Input / Output Terminals................................................................................................................................. 4
6. Absolute Maximum Ratings.......................................................................................................................... 7
7. Electrical Characteristics.................................................................................................................................. 7
8. Optical Characteristics.................................................................................................................................... 19
9. Handing Cautions............................................................................................................................................... 20
10. Reliability................................................................................................................................................................. 21
11. Block Diagram.................................................................................................................................................... 22
Checked b
y
(
Desi
g
n En
g
ineerin
g
Div.
)
Checkedby(QualityAssuranceDiv.)
Prepared by (Production Div.)
Revision History
Rev. Date Pa
g
e Comment
Jan 1, 2001
OPTREX
First Edition
Final Revision
******
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1. Application
This technical specification applies t o 6.4” color T FT-LCD module. The applications of the
panel are car T V, por t able TV, mult im edia applications and others AV system.
2. Features
.
Compatible with NTSC and PAL system
. Pixel in stripe configuration
. Slim and compact
. High Brightness
. Opt imu m Viewing Dir ection : 6 o’clock
. Image Reversion : Up/Down and Lef t /Right
3. Mechanical Specifications
Parameter Specifications Unit
Screen Size 6.4 (diag onal) inch
Display Format 960 x 234 dot
Active Area 130.6 (H) x 97.3 (V) mm
Dot Pitch 0.136 (H) x 0.416 ( V) mm
Pixel Config uration Stripe
Outline Dimension 156.3 (W) x 119.8 (H) x 14.3 (D) mm
Weight 280±5 g
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4. Mechanical Drawing of TFT-LCD Module
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5. Input / Output Terminals
5-1) T F T-LCD Panel Driving
Pin No Symbol I/O Description Remark
1HSYI/O Horizontal Sync. Input / Output Note 5-1
2 FRP O Video Polarity Alternating Sig nal
3 CSY I Composite Sync. Signal Note 5-1
4V
GH I Supply Voltage fo r Gate Driver (Hi level) Note 5-3
5V
GL I Supply Voltage for G ate Driver (Low level) Note 5-4
6V
BI Video Signal (Blue)
7V
RI Video Signal (Red)
8V
GI Video Signal (G r een)
9 GND I Ground
10 VDD I Supply voltage for Controller Note 5-5
11 VSH I Supply voltage for sour ce driver Note 5-6
12 GND I Ground
13 CKC I Control pin for select I/O signal Note 5-1,
5-2
14 VSY I/O Vertical Sync. Input/ Output Note 5-1
15 PSI O Synchronize Pulse for Decoder Note 5-7
16 PSC O Synchronize Pulse for DC- DC Convert er Note 5-8
17 VIY I Vertical Sync. Input Pin for reset Vert ical Count er
18 UD I UP/DO WN Control Note 5-10
19 RL I Right/ Left Shift Control Note 5-9
20 NP I NTSC/PAL I nput Note 5- 11
Note 5-1 : Pin 13 ( CKC) can select the f unction for Pin 1 ( HSY ), Pin 3 (CSY) , and Pin 14
(VSY) .
Pin 13 (CKC) Pin 1 ( HSY )Pin 3 (CSY) Pin 14 ( VSY )
Hi HSY Output CSY Input VSY Output
Low External Horizontal Sync. Input External Clock I nput External Vertical Sync. Input
Note 5-1- 1: CKC= High:
a. If CKC=1, the phase lock loop (PLL) is adopted in the LCD module.
b. Inputs CSY, t he cont roller of LCD module will separate the Vert ical Sync and
Horizontal Sync from CSY.
C.Out put Horizontal Sync ( HSY , Pin 1) and Ver tical Sync ( VSY , Pin 14)..
d. The int er nal detect will detect Vert ical Sync to r eset the vertical counter.
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Note 5-1-2: CKC= Low
a. If CKC=0, the phase lock loop (PLL) is not adopted in the LCD m odule.
b. If CKC=0, the external clock input frequency of Pin 3 is 18.9 MHz.
c. Input external Vertical Sync (VIY, Pin 17) and Horizontal Sync (Pin 1) to synchronize
the LCD module. External Horizontal Sync and External Vertical Sync input pulse can
be high going or low going.
d. The pulse width of external Horizontal Sync input is 4.7µs±2 µs. The pulse width of
external Vertical Sync input is 2H~4H.
e. The pulse length of external input Vertical Sync of NTSC system is 262H±4H and
PAL system is 312H±4H.
Note 5-1-3: The timing char t of HSY and external Horizontal input:
External
H-Sync
(Input)
HSY
(Output)
CKC=1
CKC=0
Note 5-1-4: If t her e is any q uest ion about CKC=0, please contact PVI.
Note 5-2: If CKC=1, the phase lock loop (PLL) is adopted in the LCD module.
If CKC=0, the phase lock loop (PLL) is not adopted in the LCD module.
If CKC=0, the external clock input frequency of Pin 3 is 18.9 MHz.
Note 5-3: VGH TYP.｡=+20V
Note 5-4: VGL TYP.｡=-5V
Note 5-5: VDD TYP.｡=+5V
Note 5-6: VSH TYP.｡=+14V
Note 5-7: The f r equency of PSI is 15. 75KHz.
4.7µs63.5µs
CSY
15.75KHz
5
V
0
V
10µs
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Note 5-8 T he frequency of PSC is 70KHz or 39KHz(Default is 70KHz).
µ
s63.5
CSY
5V
0V
PSC
70KHz
or
39KHz
Note 5-9 : Default Hi ( + 5V) for shift Right; Input Low (0V) for inverse (shif t Left).
Note 5-10: Default Hi (+5V) for DO WN; Low (0V) for UP.
Note 5-11 : NTSC=Hi(+5V),PAL=LOW(0V)
5-2) Back light driving
Pin No Symbol Description Remark
1 VL1 Input te r m inal ( Hi voltage side)
2 VL2 Input terminal (Low voltage side) Note 5-12
Note 5-12 : Low voltage side of backlight inverter connect s with Gr ound of inverter circuits.
5-3) Input / Output Connect or
A) LCD Module Connector
FFC Up Connector
16 Pins or 20 Pins
Pitch : 1.0 mm
B) Backlight Connector
JST BHR-03VS-1
Pin No. : 3
Pitch : 4 mm
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6. Absolute Maximum Ratings: GND = 0 V｡A T a = 25 ℃
Parameter Symbol MIN. MAX. Unit Remark
Supply Voltage for Source Dr iver VSH -0.5 +16 V
Supply Voltage H Level VGH -0.3 +26.5 V
for Gate Driver L Level VGL -7 20 V
Supply voltage fo r controller VDD -0.3 +6.5 V
Analog input signals VB,VR,VG012 V
Digital input signals -0.5 5.5 V Note 6-1
Digital out put signals -0.5 5.5 V Note 6-2
Storage Temperature -30 +80 ℃
Operation Temperature -10 +60 ℃
Note 6-1 : HSY , CSY, VSY , CKC,
Note 6-2 : HSY , VSY , PSI, PSC
7. Electrical Characteristics
7-1) Recomm ended O per ating Conditions:
A) Driving for TFT- LCD Panel GND = 0V｡A T a = 25 ℃
Parameter Symbol MIN. TYP MAX. Unit Remar
k
Supply voltage for source
driver VSH +13.5 +14 +14.5 V
Supply voltage H Level VGH +19 +20 +24 V
for gate driver L level VGL -5.5 -5 -4 V
Supply voltage fo r controller VDD +4.7 +5 +5.3 V
Analog input Amplit ude VB,VR,VG+2 - +12 V
Voltage DC component +4 +6 +8 V
Digital input H level +2.4 - +5 V Note 7-
1
Voltage L level -0.3 - +0.8 V
Digital output H level +2.4 +4 +5 V Note 7-
2
Voltage L level 0 - +0.5 V
Note 7-1 : HSY , CSY, VSY , CKC
Note 7-2 : HSY , VSY , PSI, PSC
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B) Power on sequence(Voltage source)
The Power on sequence only effect by VDD,VGL and VGL, the others do not care.
1) 10ms•T1•T2•T3•T4•T5
2) 10ms•T6•T7•T8•T9•T10
C) Driving for backlight Ta= 25 ℃
Parameter Symbol Min. Typ. Max
.Unit Remark
Lamp voltage VL480 520 560 Vrms IL=6mA
Lamp current IL468mA
Lamp f r equency PL20 60 KHz Note 7-3
Kick-off voltage Vs 150
0Vrms
Note 7-3 : The wave form of lamp driving voltage should be as closed to a perfect SIN wave as
possible.
7-2) Power Consumption Ta= 25 ℃
Parameter Symbol Conditions TYP. MAX Unit Remark
Supply current for G ate Driver (Hi level) IGH VGH = +20V 6 9 mA
Supply current for Gate Driver (Low
level) IGL VGL = -5V 5 10 mA
Supply current for Source Dr iver ISH VEE = +14V 12 15 mA
Supply current for controller IDD VDD = +5V 22 30 mA
LCD Panel Power Consumption 0.45 W Note 7-4
Backlig ht Lamp Power Consumption 3.12 W Note 7-5
Note 7-4 T he power consumpt ion for backlight is not included.
Note 7-5 Back light lamp power consumpt ion is calculat ed by IL x VL.
0V(Gnd)
V
DD
V
GH
V
GL
ON
OFF
T1 T2 T3 T4 T5 T6
OF
F
Logic,VCom,
Videosignal
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7-3) Input / Output sig nal timing chart
FRP
Black
Black
White 2.2±0.2V 9.2±0.2V
VR
VG
VB
5V
0V f = 1 5.7 5k H z
CSY
Paramete
r
Symbol MIN. TYP. MAX. Unit Remarks
Horizontal Width THO 4.2 4.7 5.2 μs
Sync. Output Phase Dif ference THP 02 μs
Pulse Rising Tim e THR --0.5
μs
Falling T im e THF --0.5
μs
Vertical Sync. Widt h TVO -4H - μsH=1/15.75KHZ
Output Pulse Phase Dif ference TVPO -1H - μsodd field
Phase Difference TVPE -1.5H - μseven field
Rising T im e T VR --2μs
Frequency fFRP 7.67 7.87 8.07 KHZ
Polarity Delay time TFD --4μs
Alternat ing Signal Falling T im e TVF --2μs
7-4) Display Time Range
A) When sync. signal of NTSC system is applied.
a) Horizontally
12.6 ~ 63.39μs.
b) Vertical
19 ~ 253 H
FRP
V
R
V
G
V
B
CSY
5V
0V
f=15.75k
H
Black
White
Black
9.2V
2.2V
BlackBlack
White
Black
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B) When sync. signal of PAL system is applied.
a) Horizontally
13.0 ~ 63.8μs.
b) Vertical
26 ~ 298 H
c) odd field : Scan lines 14n+17 14n+23 (n = 1, 2, 3..) are not displayed.
even field : Scan lines 14n+12 14n+20 (n = 1, 2, 3..) are not displayed.
FRP
V
R
V
G
V
B
CSY
5V
0V
Black
White
Black
9.2V
2.2V
Black
Black
White
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C) NTSC System
Tvo=254£gS Typ
Vin
CSY
HSY
VSY
FRP
RGB
ODD
FIELD
EVEN
FIELD ODD FIELD
524 525 1 2 3 4 5 6 7 8 9 10 21 22 23 24
NTSC FIELD 1
CMOS output
258 259 260 261 262 1 2 3 4 5 6 7 18 19 20 21
Th Th=63.5£gS Typ
Tvo
Tvpo=63.5£gS Typ
Tvpo
Black
Black
White White
First
Line
Timing chart of I/O and RGB signal
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262 263 264 265 266 267 268 269 270 271 272 283 284 285 286
NTSC FIELD 2
EVEN FIELD
Vin
CSY
HSY
VSY
FRP
RGB
First
line
EVEN
FIELD
ODD
FIELD
259 260 261 262 263 1 2 3 4 5 6 18 19 20
White
White
Black
Black
17
Tvo=254£gS Typ
Tvo
Tvpe=95£gS Typ
Tvpe
Timing chart of I/O and RGB signal
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D) NTSC Display Timing
524 525 1 2 3 4 5 6 7 8 9 22 23 24
NTSC FIELD 1
ODD FIELD
Vin
Tvo=1H Typ
Tvo
Tvpo=1H Typ
Tvpo
EVEN FIELD
10
VSY
262 26
3264 265 266 267 268 269 270 271 272 283 284 285 286
NTSC FIELD 2 EVEN FIELD
Vin
VSY
EVEN
FIELD
ODD
FIELD
Tvo=4H Typ
Tvo
Tvpe=1.5H Typ
Tvpe
10.5H 18H
First
Line
234 H
Not Display Time
28.5/262.5=11%
Display Time
234/262.5=89%
10.6µs
Tho=4.7µs
63.5µs
2.1µs
50.79µs
50.79/63.5=78%
Display Time
Sampling Clock: 18.9MHz
(1) Horizontal Timing
(2) Vertical Timing
28.5H
ODD FIELD
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E) PAL System
Tvo=318£gS Typ
Vin
CSY
HSY
VSY
FRP
RGB
ODD
FIELD
EVEN
FIELD ODD FIELD
622 623 624 625 1 2 3 4 5 6 7 22 23 24 25
PAL
CMOS output
309 310 311 312 313 1 2 3 4 5 6 19 21 22 23
Th
Th=63.5£gS Typ
Tvo
Tvpo=64£gS Typ
Tvpo
Black
White
First
Line
Timing chart of I/O and RGB signal
FIELD 1
20 21
20 24 25 26
Black
White
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309 310 311 312 313 314 315 316 317 318 334 335 336 337
PAL FIELD 2
EVEN FIELD
Vin
CSY
HSY
VSY
FRP
RGB
First
line
EVEN
FIELD
ODD
FIELD
308 309 310 311 312 1 2 3 4 5 22 23 24
White
White
Black
Black
21
Tvo=318£gS Typ
Tvo
Tvpe=32£gS Typ
Tvpe
Timing chart of I/O and RGB signal
333
20 25 26 27
White
White
Black
338 339
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F) PAL Display Timing
10.6µs
Tho=4.7µs
64µs
2.1µs
51.14µs
51.14/64=79.9%
Display Time
Sampling Clock: 18.9MHz
(1) Horizontal Timing
(2) Vertical Timing
Vin
ODD
FIELD
EVEN
FIELD ODD FIELD
622 623 624 625 1 2 3 4 5 6 7 22 23 24 25
PAL FIELD 1
20 21
Tvo
10.5H 18H 234 H
Not Display Time
28.5/310=11%
Display Time
234/310=75.5%
Tvo=318£gS Typ
VSY
Tvpo=64£gS Typ
Tvpo
Tvo
309 310 311 312 313 314 315 316 317 318 334 335 336 337
PAL FIELD 2 EVEN FIELD
Vin
EVEN
FIELD
ODD
FIELD
333 338 339
Tvpe=32£gS
Typ
VSY Tvo=318£gS Typ
Tvpe
Tvo
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8.Optical Characteristics
8-1) Specification: Ta = 25℃
Parameter Symbol Condition MIN. TYP. MAX. Unit Remarks
Viewing Horizontal θ45 55 deg Note 8-1
Angle Vertical θ(to 12
o’clock) CR≧10 10 15 deg Note 8-1
θ(to 6
o’clock) 30 35 deg Note 8-1
Contrast Ratio CR 80 120 Note 8-2
Response time Rise Tr θ=0゜30 ms Not e 8- 4
Fall Tf Φ=0゜50 ms
Brightness 250 300 cd/m2Note 8-3
White x 0.250 0.300 0.350 Note 8-3
Chromaticity y 0.265 0.315 0.365
Lamp Lif e Time +25℃10,000 hr
Note 8-1: The def init ions of viewing angles
ABC
observer
θ
3
6
9
12
LCD panel
φ
φ
: Viewing direction
θ
: Viewing angle
normal
(
θ = 0)
Luminance when Testing point is White
Note 8-2 : CR = Luminance when Testing point is Black
(Test ing config ur at ion see 8-2 )
Contrast Ratio is measured in optimum common electrode voltage.
Note 8-3 : Topcon BM-7(fast ) luminance meter 2 ｢Xfield of view is used in the testing ( after
20~30 minutes operation). Lamp Current 6mA
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Note 8-4: The def init ion of response t im e:
100%
90%
10%
0%
White White
Brightness
Black
Tr Tf
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8-2)Testing configuration
y LCD Display
y R, G, B Waveform of Pattern A at Testing Point
V
W=2.2+/-0.2V
y R, G, B Waveform of Pattern B at Testing Point
V
b=9.2+/-0.2V
500mm
BM-7(fast)
LCD
Backlight
R,G,B signal
Pattern
generator
input
Pattern A Pattern B
Testing Point Testing Point
16ms 16ms
16ms 16ms
Caution: 1. Environmental illumination≦1 lux
2. Before test CR, Vcom v oltage must
be adjusted carefully to get the best
CR.
Vcom
RGB
waveform
RGB
waveform
Vcom
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9. Handling Cautions
9-1) Mounting of module
a) Please power off the module when you connect the input/output connector.
b) Please connect the ground pattern of the inverter circute surely. If the
connection is not perfect, some following problems may happen possibly.
1.The noise fro m the ba cklight unit will increase.
2.The output from inverter circuit will be un stable.
3.In some cases a part of module will heat.
c) Pol ar izer w hi ch i s made of soft material and susceptibl e to flaw must be handled
carefully.
d) Protective film (Laminator) is applied on surface to protect it against scratches
and dir ts. It i s r ecommended to peel off the laminator before use and taki ng car e
of static electricity.
9-2) Precautions in mounting
a) When metal part of the TFT-LCD module (s hi eldi ng l i d and r ear case) is soi l ed,
wipe it with soft dry cloth.
b) Wipe off water drops or finger grease immediately. Long contact with water
may cause discoloration or spots.
c) TFT-LCD module uses glass which breaks or cracks easily if dropped or
bumped on hard surface. Please handle with care.
d) Since CMOS LSI is used in the module. So take care of static electricity and
earth yourself when handling.
9-3) Adjusting module
a) Adjusting volumes on the rear face of the module have been set optimally
before shipment.
b) Therefore, do not change any adjusted val ues. If adjusted v al ues ar e chang ed,
the specifications described may not be satisfied.
9-4) Others
a) Do not expose the module to direct sunlight or intensive ultraviolet rays for
many Hours.
b) Store the module at a room temperature place.
c) The voltage of beginning electric discharge may over the normal voltage
because of leakage cur r ent from approach conductor by to dr aw lump read lead
line around.
d) If LCD panel breaks, it is possi bly that the li quid crystal escapes from the panel.
Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes
or feet. Wash it out immediately with soap.
e) Observe all other precautionary requirements in handling general electronic
components.
f) Please adjust the voltage of common electrode as material of attachment by 1
module.
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10. Reliability Test
No Test Item Test Condition
1 Hig h Temperatur e Storage Test Ta = +80 ℃, 240 hr s
2 Low Temperatur e St or age Test Ta = -30℃, 240 hrs
3 High Temper ature Operat ion Test Ta = +60 ℃, 240 hrs
4 Low Temperature O per at ion Test Ta = -10 ℃, 240 hr s
5High T em perature & High
Humidity Operation Test Ta = +60℃, 95%RH, 240 hrs
6Therm al Cycling Test
(non-operating) -25℃  +25℃  +70℃, 200 Cycles
30 min 5min 30 min
7Vibration T est
(non-operating)
Frequency: 10 ~ 55 HZ
Amplitude: 1.5 mm
Sweep time: 11 mins
Test Per iod: 6 Cycles for each direction of X, Y, Z
8Shock Test
(non-operating)
100G, 6ms
Direction: ±X, ±Y, ±Z
Cycle: 3 times
9 Electrostatic Discharge Test 150pF, 330Ω
Air: ± 15KV; Contact: ± 8 KV
10 times/point, 9 points/panel face
Ta: am bient temperatur e
[Criteria]
Under the display quality test conditions with normal operation state, t her e should be no
change which may affect practical display f unction.
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11. Block Diagram
Pin S
y
mbol
7V
R
6V
B
8V
G
3CSY
13 CKC
14 VSY
1
15
16
2
4
5
9
10
11
12
17
18
19
20
HSY
PSI
PSC
FRP
VGH
VGL
GND
VDD
VSH
GND
VIY
UD
RL
NP
Controller
PLL
Level Shift
Source
Driver
TFT-LCD
Pannel
Vcom
DC/AC Inverter
DC/DC Converter Backli
g
ht
+20V
-5V
GND
+5V
+14V
GND