This is information on a product in full production.
October 2012 Doc ID 022284 Rev 2 1/16
16
ECMF06-6AM16
Common mode filter with ESD protection
for MIPI D-PHY and MDDI interface
Datasheet production data
Features
■Very large differential bandwidth: higher than
6GHz
■High common mode attenuation:
– -24 dB at 900 MHz
– -20 dB between 800 MHz and 2.2 GHz
■Very low PCB space consumption
■Thin package: 0.55 mm max
■Lead-free package
■High reduction of parasitic elements through
integration
Complies with the following standards:
■IEC 61000-4-2 level 4:
–15 kV (air discharge)
–8 kV (contact discharge)
Applications
■Mobile phones
■Notebook, laptop
■Portable devices
Description
The ECMF06-6AM16 is a highly integrated
common mode filter designed to suppress
EMI/RFI common mode noise on high speed
differential serial buses like MIPI D-PHY or MDDI.
The ECMF06-6AM16 can protect and filter 3
differential lanes.
Figure 1. Pin configuration (top view)
1
µQFN-16L: 1.35 mm x 3.3 mm
D0+
D0-
GND
D1+
D1-
D2+
D2-
GND
D0+
D0-
NC
D1+
D1-
D2+
D2 -
GND
116
215
314
413
512
611
710
89
www.st.com
Characteristics ECMF06-6AM16
2/16 Doc ID 022284 Rev 2
1 Characteristics
Figure 2. Electrical characteristics (definitions)
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol Parameter Value Unit
VPP Peak pulse voltage IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
10
30 kV
IDC Maximum DC current 100 mA
Top Operating temperature -40 to +85 °C
TjMaximum junction temperature 125 °C
Tstg Storage temperature range - 55 to +150 °C
Symbol Parameter
V = Breakdown voltage
I = Leakage current @ V
V = Stand-off voltage
I = Breakdown current
BR
RM RM
RM
R
I
V
IRM
IR
VRM
VBR
Table 2. Electrical characteristics (values, Tamb = 25 °C)
Symbol Test conditions Min. Typ. Max. Unit
VBR IR = 1 mA 6 V
IRM VRM = 3 V per line 100 nA
RDC DC serial resistance 2.7 4
ECMF06-6AM16 Characteristics
Doc ID 022284 Rev 2 3/16
Figure 3. SDD21 differential attenuation measurement (Z0 diff = 100 )
Table 3. Pin description
Pin
name Description Pin
name Description Pin
name Description Pin
name Description
1 D0+
DSI receiver 5D1-
DSI receiver 9D2-
DSI transmitter 13 D1+
DSI transmitter
2D0-
DSI receiver 6GND
DSI receiver 10 D2+
DSI transmitter 14 NC
DSI transmitter
3GND
DSI receiver 7D2+
DSI receiver 11 GND
DSI transmitter 15 D0-
DSI transmitter
4D1+
DSI receiver 8D2-
DSI receiver 12 D1-
DSI transmitter 16 D0+
DSI transmitter
100k 1M 10M 100M 1G
-3
-2.5
-2
-1.5
-1
-0.5
0SDD21 (dB)
F/Hz
D2 D0
D1
Characteristics ECMF06-6AM16
4/16 Doc ID 022284 Rev 2
Figure 4. SCC21 common mode attenuation measurement (Z0 com = 50 )
Figure 5. SDD11 differential return loss measurement (Z0 diff = 100 )
100k 1M 10M 100M 1G
-40
-35
-30
-25
-20
-15
-10
-5
0SCC21 (dB)
F/Hz
D2 D0
D1
10M 30M 100M 300M 1G 3G
-45
-40
-35
-30
-25
-20
-15
-10
-5
0SDD11 (dB)
F/Hz D0
D1
D2
ECMF06-6AM16 Characteristics
Doc ID 022284 Rev 2 5/16
Figure 6. SDD22 differential attenuation measurement (Z0 diff = 100 )
Figure 7. SDDxx inter-lane differential cross-coupling measurement (Z0 diff = 100 )
100k 1M 10M 100M 1G
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0SDDxx (dB)
F/Hz
D0-D1 D0-D2
Characteristics ECMF06-6AM16
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Figure 8. SCCxx inter-lane common-mode cross-coupling measurement
(Z0 diff = 100 )
Figure 9. MIPI D-PHY low power mode test setup
100k 1M 10M 100M 1G
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0SCCxx (dB)
F/Hz
D0-D1 D0-D2
Generator Agilent 81110
Pattern mode, F = 10 MHz
modulation RZ, 50 outputΩ
CMF
Oscilloscope Lecroy
7300 1A, M inputΩ
ECMF06-6AM16 Characteristics
Doc ID 022284 Rev 2 7/16
Figure 10. Low power pulse response - see Figure 9 for test setup
Figure 11. ESD response to IEC61000-4-2 (+8 kV contact discharge)
- see Figure 13 for test set-up
Dx+
Dx-
500 mV/div
1 ns/div00
500 mV/div
1 ns/div00
50 V/div
93 V 29 V 24 V 11 V
20 ns/div
124
V : ESD peak voltage
PP
V :clamping voltage @ 30 ns
CL
V :clamping voltage @ 60 ns
CL
V :clamping voltage @ 100 ns
CL
1
2
3
4
3
122 V
9V 9V 7V
1
24
3
Characteristics ECMF06-6AM16
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Figure 12. ESD response to IEC61000-4-2 (-8 kV contact discharge)
- see Figure 13 for test set-up
Figure 13. ESD measurement test set-up
50 V/div
-76 V
-23 V -6 V -4 V
20 ns/div
1
24
V : ESD peak voltage
PP
V :clamping voltage @ 30 ns
CL
V :clamping voltage @ 60 ns
CL
V :clamping voltage @ 100 ns
CL
1
2
3
4
3
-120 V
-7 V -4 V -1 V
1
2
4
3
Oscilloscope
50 Ω
input
2 x 20 dB attenuator
2 x 20 dB attenuator
ESD contact zap
±8 kV on pins
D0+
D0-
GND
D1+
D1-
D2+
D2-
GND
D0+
D0-
NC
D1+
D1-
D2+
D2 -
GND
ECMF06-6AM16 Application information
Doc ID 022284 Rev 2 9/16
2 Application information
Figure 14. Application information
D0+
D0-
GND
D1+
D1-
CLK+
CLK-
GND
D0+
D0-
GND
D1+
D1-
CLK+
CLK-
GND
Display Application processor
DSI Receiver DSI Transmitter
Ordering information scheme ECMF06-6AM16
10/16 Doc ID 022284 Rev 2
3 Ordering information scheme
Figure 15. Ordering information scheme
ECMF yy - x - z M16
Function
Common mode filter with ESD protection
Number of filtered lines
yy = Number of filtered lines
Number of ESD protected lines
x = 6 lines with ESD protection
Version
z = Version
Package
M = µQFN, pitch 400 µm
16 = 16 pads
ECMF06-6AM16 Package information
Doc ID 022284 Rev 2 11/16
4 Package information
●Epoxy meets UL94, V0
●Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 18. Tape and reel specifications
Table 4. µQFN 3.3 x 1.35 16L dimensions
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.45 0.50 0.55 0.018 0.020 0.022
A1 0.00 0.02 0.05 0.00 0.0008 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
D 3.25 3.30 3.35 0.128 0.130 0.132
E 1.30 1.35 1.40 0.051 0.053 0.055
e 0.35 0.40 0.45 0.014 0.016 0.018
L 0.30 0.40 0.50 0.118 0.016 0.020
Figure 16. Footprint Figure 17. Marking
D
INDEX AREA
(D/2 x E/2)
TOP VIEW
SIDE VIEW
BOTTOM VIEW
E
A
e
L
b
A1
INDEX AREA
(D/2 x E/2)
PIN # 1 ID
18
9
16
0.20
0.40
0.60
1.75
3.00
XX
WW
Y P
Dot: Pin 1
XX: Marking
WW: Assembly week
Y: Assembly year
P: Assembly plant
Dot identifying Pin A1 location
User direction of unreeling
All dimensions in mm
4.00 ± 0.1
2.00 ± 0.1
12.00 ± 0.3
3.70 ± 0.1
4.00 ± 0.1
1.75 ± 0.1 5.5 ± 0.1
Ø 1.55 ± 0.05
0.80 ± 0.1 1.70 ± 0.1
XX
WW
YP
XX
WW
YP
XX
WW
YP
XX
WW
YP
XX
WW
YP
XX
WW
YP
Recommendation on PCB assembly ECMF06-6AM16
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5 Recommendation on PCB assembly
5.1 Stencil opening design
1. General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 19. Stencil opening dimensions
b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c) Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 20. Recommended stencil window position
L
TW
Aspect Ratio W
T
----- 1,5=
Aspect Area LW
2T L W+
----------------------------0,66=
180 µm
540 µm
200 µm
600 µm
10 µm
30 µm
Stencil window
Footprint
0.40
0.60
0.20
3.00
1.75
ECMF06-6AM16 Recommendation on PCB assembly
Doc ID 022284 Rev 2 13/16
5.2 Solder paste
1. Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste recommended.
3. Offers a high tack force to resist component displacement during PCB movement.
4. Use solder paste with fine particles: powder particle size 20-45 µm.
5.3 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
5.4 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Recommendation on PCB assembly ECMF06-6AM16
14/16 Doc ID 022284 Rev 2
5.5 Reflow profile
Figure 21. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Note: Minimize air convection currents in the reflow oven to avoid component movement.
250
0
50
100
150
200
240210180150120906030 300
270
-6°C/s
240-245 °C
2 - 3 °C/s
Temperature (°C) -2 °C/s
-3 °C/s
Time (s)
0.9 °C/s
60 sec
(90 max)
ECMF06-6AM16 Ordering information
Doc ID 022284 Rev 2 15/16
6 Ordering information
For the latest information on available order codes see the product pages on www.st.com.
7 Revision history
Table 5. Ordering information
Order code Marking Package Weight Base qty Delivery mode
ECMF06-6AM16 KF µQFN-16L 6.3 mg 3000 Tape and reel
Table 6. Document revision history
Date Revision Changes
14-Feb-2012 1 Initial release.
04-Oct-2012 2 Inserted Ta b l e 3 and updated Figure 1 to add A1 marker.
ECMF06-6AM16
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