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DESCRIPTION
Demonstration circuit 1449A is an Ultralow Pow er Boost
Converter w ith Dual Half-Bridge Sw itches featuring the
LT8415. It converts a 3V-10V source to 16V supplying
1.6mA at 3Vin and 10mA at 10Vin. The 16V output is
used to bias the Dual Half-Bridges w hich are activated by
IN1 and IN2 and are pinned out at VOUT1 and VOUT2.
IN1 controls VOUT1 w ith the same polarity and IN2 con-
trols VOUT2. Each Half-Bridge drives a 200pF on-board
capacitor.
The LT8415 features a low noise control scheme, inte-
grated pow er sw itch, dual half-bridge sw itches, schottky
diode and output disconnect function, ultra-low quies-
cent current, built in soft-start and overvoltage protec-
tion. The LT8415 datasheet gives a complete description
of the part, its operation and application information. The
datasheet must be read in conjunction w ith this quick
start guide for w orking on or modifying the demo circuit
1449.
This circuit is intended for space-conscious applications
such as Sensor Pow er, RF M ems, Low Pow er Actuator
Bias/Control, Liquid Lens Drivers and General Purpose
Bias Supplies.
Design files for this circuit board are available. Call
the LTC factory.
L
, LTC, LTM , LT are registered trademarks of Linear Technology Corporation.
PERF ORM ANCE SU M M ARY F OR DC1 3 8 7 A-A/L T8 4 1 0
Specifications are at TA = 25°C
SYM BOL PARAM ETER CONDITIONS M IN TYP M AX UNITS
V
IN
Input Supply Range
3 10
V
V
OUT
Output Voltage Range V
IN
= 3V, I
LOAD
= 1.6mA
15.54 16 16.48
V
V
OUT
Output Voltage Range V
IN
= 10V, I
LOAD
= 10mA
15.54 16 16.48
V
RIPPLE
V
IN
= 10V, I
LOAD
= 10mA 20
mV
EFFICIENCY
V
IN
= 3V, I
LOAD
= 1.6mA
73 %
EFFICIENCY
V
IN
= 10V, I
LOAD
= 10mA
83 %
DEMO
C IR C U IT
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Q U IC K S TA R T G U IDE
U ltra lo w P o w e r B o o st C o n v e rte r w ith Du a l H a lf-
B rid g e S w itc h e s
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Q U ICK START PROCEDU RE
Demonstration circuit 1449 is easy to set up to evaluate
the performance of the LT8415. Refer to Figure 1 for
proper measurement equipment setup and follow the
procedure below :
1.
Place jumpers in the follow ing positions:
Run
2.
W ith pow er off, connect the input pow er supply to
Vin and GND.
3.
Turn on the pow er at the input.
Check for the proper output voltages. Vout = 15.52V to 16.48V.
NOTE.
If there is no output, temporarily disconnect the load to make sure
that the load is not set too high.
4.
Once the proper output voltage is established, ad-
just the load w ithin the operating range and ob-
serve the output voltage regulation, ripple voltage,
efficiency and other parameters.
5.
To test the VOUT1 and VOUT2 outputs, apply a
logic level square w ave signal (typically 0V to 2V) at
IN1 and/or IN2 and observe the amplitude levels
and associated delays at VOUT1 and VOUT2. See
datasheet for response driving external capacitors.
Figure 1.
Proper M easurem ent Equipm ent Setup
JP1
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