1
RT9288A
DS9288A-02 April 2011 www.richtek.com
Applications
zTFT LCD Panels
zLED Backlighting
PWM Step-Up DC/DC Controller for White-LED Driver
Ordering Information
Features
zz
zz
zVIN Operating Range : 3V to 13.5V
zz
zz
zFixed PWM Frequency : 1MHz
zz
zz
z200Hz to 200kHz PWM Dimming Frequency
zz
zz
zFlexible PWM/Analog Dimming Control
zz
zz
zVoltage Mode with External Compensation
zz
zz
zSoft Start Function
zz
zz
zRoHS Compliant and 100% Lead (Pb)-Free
General Description
The RT9288A is a wide input operating voltage range step-
up controller. High voltage output and large output current
are feasible by using an external N-MOSFET . The RT9288A
input operating range is from 3V to 13.5V. Besides, it
could support up to 60V output at 12V input.
The RT9288A is an optimized design for WLED driver
a pplications. Adjusting the output current of the RT9288A
changes the brightness of the WLEDs. Chip Enable pin
ca n be used a s a digital in put allowing WLED brightness
control with a logic-level PWM signal.
Functional Pin Description
Pin No. Pin Name Pin Function
1 VDD Suppl y Input Volta ge Pin. B ypas s an 1uF capacitor to GND to reduce the input noise.
2 EN Chip Enable (Active High).
3 FB Feedback to Error Amplifier Input.
4 COMP Output of Error Amplifier. Connect a capacitor between the COMP pin and GN D for
compensation. W hile shutdo wn, this pin is pulled down by an internal resistor.
5 GND Ground Pin.
6 EXT Output for External Transistor.
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, conta ct our sales representative
directly or through a Richtek distributor located in your
area.
Pin Configurations
(TOP VIEW)
SOT-23-6
VDD EN FB
EXT GND COMP
4
23
56
RT9288A
Package Type
E : SOT-23-6
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
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RT9288A
www.richtek.com DS9288A-02 April 2011
Typical Application Circuit
Figure 1. LED Driver with PWM Brightness Control (5V J 30V)
Figure 2. LED Driver with PWM Brightness Control (12V J 60V)
Figure 3. Application f or Consta nt Output Voltage
VDD
GND
EXT
FB
COMP
RT9288A
VIN
EN
1
2
53
4
6
PWM
Dimming
C2
100nF
R3
D1
L1
10uH/1.5A
C4
10uF
5V VOUT
30V/25mA
C3 100nF
R2
10
C1 R1
VDD
GND
EXT
FB
COMP
RT9288A
VIN
EN
1
2
53
4
6
PWM
Dimming
C2
100nF
R3
D1
L1
10uH/1.5A
C4
10uF
12V VOUT
60V/25mA
C3 100nF
R2
10
C1 R1
VDD
GND
EXT
FB
COMP
RT9288A
VIN
EN
1
2
53
4
6
C2
100nF
R4
D1
L1
10uH/1.5A
C4
10uF
12V VOUT
24V
CC
6.8nF
R2
10
C1 R1
Chip Enable
R3
RC
30k
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RT9288A
DS9288A-02 April 2011 www.richtek.com
Function Block Diagram
Operation
Soft-Start and Short Circuit Protection
While power-on, the RT9288A enters soft-start cycle to reduce the in-rush current and output voltage overshoot. The
internal soft-start time is 10ms for the RT9288A. The RT9288A enters shutdown and ca n be re-enabled by turning off-on
EN pin.
In normal operation, if the output loading cha nges large enough to let error amplifier output larger tha n 1.8V, the short
circuit timer is started. If the time duration of this condition is kept continuously to more than 10ms, the short circuit
state is latched a nd the RT9288 enters shutdown a nd can be re-ena bled by turning off-on EN pin.
Dimming Control for LED Lighting
EN is also used a s a digital input allowing LED brightness control with a logic-level PWM signal applied directly to EN.
The frequency ra nge is from 200Hz to 200kHz, while 0% duty cycle corresponds to zero current a nd 100% duty cycle
corresponds to full current. The error amplifier a nd compensation ca p acitor f orm a lowpa ss filter , so the PWM di mming
results in DC current to the LEDs without any additional RC filters. The PWM signal must be applied after soft-start
finished.
Under-Voltage Lock-out
The under voltage lock-out circuit is adopted as a voltage detector a nd always monitors the supply voltage (VDD) while
EN at logic High. While power-on, the chi p is kept in shutdown mode till the VDD rises to higher tha n 2.5V (MAX). While
power-off, the chi p does not leave operating mode till VDD falls to less tha n 2.2V(MIN).
PWM
Logic
Pre-
Regulator
Power On
& UVLO
+
-
+
Soft Start/Short
Circuit
Protection
-
+
1.8V
-
+Error
Amplifier
1MHz
OSC PWM
Dimming
Timer
Bandgap
Reference
OC
VDD
EN
FB
COMP
GND
EXT
POR
CMP
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RT9288A
www.richtek.com DS9288A-02 April 2011
Absolute Maximum Ratings (Note 1)
zSupply Input Voltage, VDD ------------------------------------------------------------------------------------------- −0.3V to 16V
zEN, EXT Pins----------------------------------------------------------------------------------------------------------- −0.3V to VDD + 0.3V
zFB, COMP Pins ------------------------------------------------------------------------------------------------------- −0.3V to 7V
zPower Dissipation, PD @ TA = 25°C
SOT-23-6 ---------------------------------------------------------------------------------------------------------------- 0.455W
zPa ckage Thermal Resista nce (Note 2)
SOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 220°C/W
zLead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------- 260°C
zJunction T emperature------------------------------------------------------------------------------------------------- 150°C
zStorage T emperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV
MM (Ma chine Mode) -------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
zSupply Input Voltage, VDD ------------------------------------------------------------------------------------------- 3V to 13.5V
zJunction T emperature Range---------------------------------------------------------------------------------------- −40°C to 125°C
zAmbient T emperature Range---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
To be continued
(VDD = 5V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Power- On Reset
Operating Supply Voltage Range VDD Normal operation 3 5 13.5 V
Under Voltage Lock Out UVLO VDD Rising 2.2 -- 2.5 V
S upply current in PWM Mode IPWM V
FB = VREF + 0.1V -- 2 -- mA
Sh utdown Cu rrent ISHDN V
EN = 0V -- 1 10 uA
Sawtooth Gene rator
Oscillation Frequency fOSC 0.8 1 1.2 MHz
Frequency Stability VDD = 3V to 13.5 V -- 2 10 %
Maximum Duty Cycle 85 90 95 %
Error Amplifier
Trans-Conductance GM -- 60 -- uA/V
Feedback Voltage VFB -- 0.5 -- V
Feedback Line Regulation VDD = 3V to 13.5V -- 5 -- mV
Maximum Output Voltage VFB_MAX V
COMP = VFB = low -- 2.4 -- V
Minimum Output V olta ge V FB_MIN V
COMP = VFB = high -- 0.05 -- V
Output Source Cur rent VCOMP = 0.7V, VFB = low -- 20 -- uA
Output Sink Current VCOMP = 0.7V, VFB = high -- 20 -- uA
So ft Start & Sh ort Circ uit Un it
So ft-Start Ra mp Time 5 10 20 m s
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RT9288A
DS9288A-02 April 2011 www.richtek.com
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guarantee by design.
Parameter Symbol Test Conditions Min Typ Max Unit
Outp ut dr iver
On Resistance (P-MOSF ET) RDS(ON)_P -- 30 60 Ω
On Resistance (N-MOSFET) RDS(ON)_N -- 20 40 Ω
Output rising/falling time ( Note 5) CL = 1000pF, VFB = Low -- 100 -- ns
Logic
EN Pin Low Voltage VIL -- -- 0.5 V
EN Pin High Voltage VIH 1.8 -- VDD V
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RT9288A
www.richtek.com DS9288A-02 April 2011
Typical Operating Characteristics
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 200 400 600 800 1000
Output Current (mA)
Eff iciency (% )
VIN = 12V, VOUT = 15V, COUT = 10uF, L = 10uH
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 100 200 300 400 500 600 700
Output Current (mA)
Efficiency (%)
VIN = 12V, VOUT = 30V, COUT = 10uF, L = 10uH
Output Voltage vs. Output Current
14.95
14.98
15.01
15.04
15.07
15.10
0 100 200 300 400 500 600 700 800 900 100
0
Output Current (mA)
Output Volt age (V)
VIN = 12V, VOUT = 15V, COUT = 10uF, L = 10uH
1000
Output Voltage vs. Output Current
30.20
30.22
30.24
30.26
30.28
30.30
30.32
30.34
30.36
30.38
30.40
0 100 200 300 400 500 600 700
Output Current (mA)
Output Voltage (V)
VIN = 12V, VOUT = 30V, COUT = 10uF, L = 10uH
Output Voltage vs . Input Voltage
15.60
15.65
15.70
15.75
15.80
15.85
15.90
15.95
16.00
16.05
16.10
16.15
3 5.1 7.2 9.3 11.4 13.5
In put Voltage (V)
Output Voltage (V)
VOUT = 15.9V, I OUT = 1mA, COUT = 10uF, L = 10uH
Supply Current vs. Input Voltage
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
3 5.1 7.2 9.3 11.4 13.5
In put Voltage (V)
Suppl y Current ( m A)
Duty = 50%, f = MHz
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RT9288A
DS9288A-02 April 2011 www.richtek.com
VFB vs. Input Voltage
0.5025
0.5035
0.5045
0.5055
0.5065
0.5075
3 5.1 7.2 9.3 11.4 13.5
In put Voltage ( V)
VFB (V)
TA = 25°C
Maximum Duty vs. Temperature
85
86
87
88
89
90
91
92
93
94
95
-50 -25 0 25 50 75 100 125
Temperature
Maximum Duty (%)
(°C)
VIN = 5V
Frequency vs. Temperature
700
800
900
1000
1100
1200
1300
-50 -25 0 25 50 75 100 125
Temperature
Fr equency (kHz)
VIN = 5V, COUT = 10uF, L = 10uH
(°C)
VFB vs. Tempe rature
0.495
0.497
0.499
0.501
0.503
0.505
-50 -25 0 25 50 75 100 125
Temperature
VFB (V)
(°C)
VIN = 5V
Frequency vs . Input Voltage
900
920
940
960
980
1000
1020
1040
1060
1080
1100
3 5.1 7.2 9.3 11.4 13.5
In put Voltage ( V)
Fr equency (kHz)
COUT = 10uF, L = 10uH, TA = 25°C
Supply Current v s. Temperature
0
0.5
1
1.5
2
2.5
-50 -25 0 25 50 75 100 125
Temperature
Supply Current (mA)
VIN = 5V, Duty = 50%, f = MHz
(°C)
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RT9288A
www.richtek.com DS9288A-02 April 2011
VIN = 5V, VOUT = 12V, L = 4.7uH, IOUT = 100mA
Stability
Time (500ns/Div)
VOUT_ac
(50mV/Div)
VLX
(10V/Div)
ILOAD
(0.5A/Div)
VIN = 5V, IOUT = 100mA
Disable Operating
Time (5ms/Div)
VOUT
(10V/Div)
VEN
(5V/Div)
VCOMP
(2V/Div)
VIN = 5V, IOUT = 100mA
Power Off
Time (5ms/Div)
VOUT
(10V/Div)
VIN
(5V/Div)
VLX
(10V/Div)
VIN = 5V, IOUT = 100mA
Enable Operating
Time (5ms/Div)
VOUT
(10V/Div)
VEN
(5V/Div)
VCOMP
(2V/Div)
VIN = 5V, IOUT = 100mA
Power On
VOUT
(10V/Div)
VIN
(5V/Div)
VLX
(10V/Div)
Time (5ms/Div)
ILED vs. Duty
0
5
10
15
20
25
0 20406080100
Duty (%)
ILED (mA)
200Hz
2kHz
20kHz
200kHz
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RT9288A
DS9288A-02 April 2011 www.richtek.com
VIN = 12V, L = 4.7uH, Duty = 50%
PWM Dimming by EN
Time (2.5ms/Div)
VEN
(5V/Div)
VCOMP
(0.5V/Div)
VEXT
(10V/Div) fPWM = 2kHz, CCOMP = 100nF
VIN = 5V, VOUT = 12V, L = 4.7uH, IOUT = 200mA
Stability
Time (500ns/Div)
VOUT_ac
(100mV/Div)
VLX
(10V/Div)
ILOAD
(0.5A/Div) VIN = 5V, VOUT = 12V, L = 4.7uH, IOUT = 300mA
Stability
Time (500ns/Div)
VOUT_ac
(100mV/Div)
VLX
(10V/Div)
ILOAD
(1A/Div)
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RT9288A
www.richtek.com DS9288A-02 April 2011
Application Information
The RT9288A is a boost controller for DC to DC conversion.
The main switch of the power stage can stand significant
current that is greater than the internal main switch. There
is no significant power dissipated in the RT9288A,
therefore the thermal performance could be excellent. For
the RT9288A, determine the maximum input current is
the first step of the design procedure.
Inductor Selection
For the inductor selection, the inductance value depends
on the maximum input current. Generally the inductor
ripple current ra nge is 20% to 40% of the maximum input
current. Take 40% as an example, the value can be
calculated as follows :
OUT OUT(MAX)
IN(MAX) IN
RIPPLE IN(MAX)
VI
I = V
I= 0.4I
η
×
×
×
Where η is the efficiency, IIN(MAX) is the maximum input
current a nd IRIPPLE is the inductor ripple current. Beside,
the input pea k current is the maximum in put current plus
half of the inductor ripple current.
PEAK IN(MAX)
I= 1.2I×
Note that the saturated current of inductor must be greater
than IPEAK. The inductance value can be eventually
determined a s follows :
2
IN OUT IN
2
OUT OUT(MAX) OSC
(V ) (V V )
L = 0.4 (V ) I f
η
×× −
×× ×
Where fOSC is the switching frequency. Consider the
system performance, a shielded inductor is preferred to
avoid EMI issue.
Figure 4. The Waveform of the Inductor Current
Diode Selection
Schottky diode is a good choice for an asynchronous
Boost converter due to the small forward voltage. However ,
power dissipation, reverse voltage rating and pulsating peak
current are the important parameters of Schottky diode
consideration. It is recommended to choose a suitable
diode whose reverse voltage rating is greater than the
maximum output voltage.
Input Capacitor Selection
Low ESR cera mic ca pacitors are recommended for input
capacitor applications. Low ESR will effectively reduce
the input ripple voltage caused by switching operation. A
10uF is sufficient for most a pplications. Nevertheless, this
value can be decreased with lower output current
requirement. Another consideration is the voltage rating
of input ca pacitor must be greater than the maximum input
voltage.
Output Capacitor Selection
Output ripple voltage is a n importa nt index for esti mating
the performance. This portion consists of two parts, one
is the product of (IIN − IOUT) and ESR of the output
capacitor, another part is formed by charging and
discharging process of output ca pacitor. Refer to figure 5,
evaluate ΔVOUT1 by ideal energy equalization. According
to the definition of Q that is calculated as follows :
⎡⎤
⎛⎞⎛⎞
×+Δ− +−Δ−
⎜⎟⎜⎟
⎢⎥
⎝⎠⎝⎠
⎣⎦
×× ×Δ
OUT OUT
IN L IN L
IN OUT OUT1
OUT OSC
11 1
Q = I I I I I I
22 2
V1
= C V
Vf
Where TS is the inverse of switching frequency and the
ΔIL is the inductor ripple current. Move COUT to left side to
esti mate the value of ΔVOUT1 as :
η
×
Δ××
OUT
OUT1 OUT OSC
DI
V = Cf
Finally, the output ripple voltage can be determined a s :
()
η
×
Δ−×+
××
OUT
OUT IN OUT OUT OSC
DI
V = I I ESR Cf
0A
IL
IOUT(MAX)
IPEAK IIN(MAX
)IRIPPLE
tON
(1)
(2)
(3)
(4)
(6)
(7)
(5)
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RT9288A
DS9288A-02 April 2011 www.richtek.com
Figure 5. The Output Ri pple Voltage without the
Contribution of ESR
Main Switch Selection
The RT9288A uses a n N-MOSFET a s the main switch to
a chieve power conversion. The main switch stays in two
states in the operation, one is the on state a nd the other
is the off state. The potential of switching point, LX, is 0V
in the on state. Nevertheless, the potenti al of LX rises to
output voltage plus the forward voltage of D1 in the off
state, this potential is the highest voltage in the Boost
converter. Thus, the absolute VDS rating of the main switch
must be greater tha n this voltage to prevent main switch
da mage in the off state or reliability problem. Another key
parameter of main switch is the maximum continuous
drain current. For a safety design, it is important to choose
a maximum continuous drain current at two times the
maximum input current. Energy saving is the trend in
recent years. Therefore, design a high efficiency system
is the important course. Conduction loss and switching
loss play important roles for the efficiency in heavy load
and light load respectively. Main switch with a small on
resistance leads to lower conduction loss, however , it also
means a greater gate ca pacitance. Great gate capacitance
prolongs rising and falling transition in LX, t1 and t2. IL and
VLX produce the main switching loss during t1 and t2. Thus,
choose a main switch with proper gate ca pacitance could
reduce switching loss.
Time
Time
Inductor Current
Output Current
Output Ripple
Voltage (ac)
(1-D)TS
ΔVOUT1
ΔIL
Input Current
VTH Time
Time
Time
t1
ΔIL
t2VOUT + VD1
IOUT
VIN
VEXT
VLX
IL
Figure 6. The Waveforms of EXT, LX and Inductor Current
Related to the Switching Loss
Loop Compensation
It is easy to compensate the loop stability for the
RT9288A's application in LED driving. Compensation
network only contains a ca pacitor between COMP pin and
GND as shown in figure 1. The best criterion to opti mize
the loop compensation is by inspecting the transient
response a nd adjusting the compensation network.
Layout Consideration
The PCB layout is a very important issue for switching
converter circuits design. There are some recommended
layout guidelines that are shown as follows :
`The power components M1, L1, D1, CIN and COUT should
be placed as close to the IC as possible to reduce the
ac current loop. The connections between power
components must be short and wide a s possible due to
large current strea m flowing through these traces during
operation.
`The function of C1 is to regulate VDD. Place C1 close to
pin 1 is necessary.
EXT
VDD
VIN CIN IL
L1 D1
FB
COUT
VOUT
RF1
RF2
RT9288A
LX
M1
RT9288A
12
www.richtek.com DS9288A-02 April 2011
`RF1 and RF2 formed a voltage divider to set correct output
voltage. Pin 3 is connected to the branch of voltage
divider and is a very sensitive point, placed this trace
short and wide as possibly and far away from the
switching point to avoid perturbation.
`Pin 4 is the compensation point for system stability.
Pla ce the compensation components as close to pin 4
as possibly, no matter the compensation is RC or
capacitance. Note that, the GND of the compensation
components should be connected with pin 5. Then, short
it to system ground by via or trace. This will provide a
clean reference for the IC.
VDD
EN
FB
EXT
COMP
VIN
CIN
VOUT
GND
COUT
CC
GND
2
3
6
4
1
5
C1
R1
L1
RC
RF2
RF1
GND
D1
M1
GND
Figure 7. Sketch Map of PCB Layout.
RT9288A
13
DS9288A-02 April 2011 www.richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Outline Dimension
AA1
e
b
B
D
C
H
L
SOT-23-6 Surface Mount Package
Di mensions In Millimeters Dimens ions In Inche s
Symbol Min Max Min Max
A 0.889 1.295 0.031 0.051
A1 0.000 0.152 0.000 0.006
B 1.397 1.803 0.055 0.071
b 0.250 0.560 0.010 0.022
C 2.591 2.997 0.102 0.118
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
