LTC1644 CompactPCI Bus Hot Swap Controller DESCRIPTIO U FEATURES Allows Safe Board Insertion and Removal from a Live, CompactPCITM Bus Controls -12V, 3.3V, 5V and 12V Supplies Adjustable Foldback Current Limit with Circuit Breaker Dual-Level Circuit Breakers Protect 5V and 3.3V Supplies from Overcurrent and Short-Circuit Faults LOCAL_PCI_RST# Logic On-Chip PRECHARGE Output Biases I/O Pins During Card Insertion and Extraction Adjustable Supply Voltage Power-Up Rate The LTC(R)1644 is a Hot SwapTM controller that allows a board to be safely inserted and removed from a CompactPCI bus slot. External N-channel transistors control the 3.3V/5V supplies, while on-chip switches control the -12V and 12V supplies. The 3.3V and 5V supplies can be ramped up at a programmable rate. Electronic circuit breakers protect all four supplies against overcurrent faults. The PWRGD output indicates when all of the supply voltages are within tolerance. The OFF/ON pin is used to cycle the board power or reset the circuit breaker. The PRECHARGE output can be used to bias the bus I/O pins during card insertion and extraction. PCI_RST# is combined on-chip with HEALTHY# in order to generate LOCAL_PCI_RST#. Hot Board Insertion into CompactPCI Bus , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. CompactPCI is a trademark of the PCI Industrial Computer Manufacturers Group. U APPLICATIO S U TYPICAL APPLICATIO C9 0.1F PER 10 POWER PINS C8 0.1F PER 10 POWER PINS PCB EDGE BACKPLANE CONNECTOR 5V R2 0.007 5VIN* R22 2.74 LONG 5V 3.3V R1 0.005 3VIN* R21 1.74 LONG 3.3V C6 0.01F Z3 17 Z1 18 15 3VOUT 13 5VIN 2 -12V 5VIN R20 1.2k BD_SEL# R19 1k EARLY V(I/O) 5 6 R17 2k R18 2k HEALTHY# 7 9 PCI_RST# R16 1 3 5VOUT VEEOUT Z1, Z2: SMAJ12CA Z3, Z4: 1PMT5.0AT3 12VOUT 12V AT 500mA 20 19 CLOAD(VEEOUT) TIMER FAULT C2 0.1F R6 2k PWRGD RESETOUT RESETIN PRECHARGE 11 C3 4.7nF R11 51k 10 3VOUT DRIVE 12 R10 18 5% VEEOUT -12V AT 100mA 4 R12 51k R8 1k R9 24 1V 10% Q3 MMBT2222A 3VIN R7 12 RESET# I/O #1 * * * I/O DATA LINE 128 + C1 0.047F LTC1644 20-PIN SSOP OFF/ON R13 10 * * * * * * I/O PIN 128 14 5VSENSE VEEIN GROUND I/O DATA LINE 1 3VOUT 3.3V AT 8A 12VIN 8 C5 0.01F + CLOAD(12VOUT) GND I/O PIN 1 R5 1k 12VOUT 1 C4 0.01F R4 10 Z2 12V R15 1 16 3VSENSE GATE 5VOUT 5V AT 5.7A CLOAD(3VOUT) R3 10 3VIN + CLOAD(5VOUT) Q1 IRF7413 Z4 C7 0.01F Q2 IRF7413 + BACKPLANE CONNECTOR R14 10 *5VIN AND 3VIN MAY BE USED AS SOURCES OF EARLY POWER I/O #128 PCI BRIDGE CHIP 1644 F01 Figure 1 1644f 1 LTC1644 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Supply Voltages 12VIN ................................................................ 13.2V VEEIN .................................................................. -14V Input Voltages (Pins 5, 9) .......................- 0.3V to 13.5V Output Voltages (Pins 6, 7, 10) ..............- 0.3V to 13.5V Analog Voltages and Currents Pins 3, 11 to 14, 16 to 18 ...................- 0.3V to 13.5V Pins 4, 15 ............................. - 0.3V to (12VIN + 0.3V) VEEOUT ...................................................- 14V to 0.3V 12VOUT ...............................................- 0.3V to 13.2V Operating Temperature Range LTC1644C ............................................... 0C to 70C LTC1644I ............................................ - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C ORDER PART NUMBER TOP VIEW 12VIN 1 20 12VOUT VEEIN 2 19 VEEOUT 5VOUT 3 18 3VOUT TIMER 4 17 3VIN OFF/ON 5 16 3VSENSE FAULT 6 15 GATE PWRGD 7 14 5VSENSE GND 8 13 5VIN RESETIN 9 12 PRECHARGE RESETOUT 10 LTC1644CGN LTC1644IGN 11 DRIVE GN PACKAGE 20-LEAD PLASTIC SSOP TJMAX = 140C, JA = 135C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V12VIN = 12V, VEEIN = -12V, V3VIN = 3.3V, V5VIN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IDD V12VIN Supply Current OFF/ON = 0V MIN TYP MAX 3 8 VLKO Undervoltage Lockout 12VIN, Ramping Down 3VIN, 5VIN, Ramping Down VFB Foldback Current Limit Voltage VFB = (V5VIN - V5VSENSE), V5VOUT = 0V, TIMER = 0V VFB = (V5VIN - V5VSENSE), V5VOUT = 3V, TIMER = 0V VFB = (V3VIN - V3VSENSE), V3VOUT = 0V, TIMER = 0V VFB = (V3VIN - V3VSENSE), V3VOUT = 2V, TIMER = 0V VCB Circuit Breaker Trip Voltage tOC 6.00 2.25 8.30 2.48 10.80 2.75 8 40 8 40 12 51 12 51 15 70 15 70 mV mV mV mV VCB = (V5VIN - V5VSENSE), TIMER = FLOAT VCB = (V3VIN - V3VSENSE), TIMER = FLOAT 40 40 55 55 70 70 mV mV Overcurrent Fault Response Time (V5VIN - V5VSENSE) = 100mV, TIMER = FLOAT (V3VIN - V3VSENSE) = 100mV, TIMER = FLOAT 30 30 45 45 60 60 s s tSC Short-Circuit Response Time (V5VIN - V5VSENSE) = 200mV, TIMER = FLOAT (V3VIN - V3VSENSE) = 200mV, TIMER = FLOAT 0.1 0.1 1.0 1.0 s s ICP GATE Pin Output Current OFF/ON = 0V, VGATE = 0V, TIMER = 0V VGATE = 5V, OFF/ON = 4V OFF/ON = 0V, VGATE = 2V, TIMER = FLOAT, FAULT = 0V - 65 225 10 -100 300 20 A A mA - 20 100 3 UNITS mA V V VGATE External Gate Voltage VGATE = (V12VIN - VGATE), IGATE = -1A 50 200 mV VDROP Internal Switch Voltage Drop VDROP = (V12VIN - V12VOUT), I = 500mA VDROP = (VEEOUT - VEEIN), IEE = 100mA 200 110 600 250 mV mV ICL Current Foldback 12VIN = 12V, 12VOUT = 0V, TIMER = 0V 12VIN = 12V, 12VOUT = 10V, TIMER = 0V VEEIN = -12V, VEEOUT = 0V, TIMER = 0V VEEIN = -12V, VEEOUT = -10V, TIMER = 0V -360 - 840 100 320 - 600 - 1500 300 650 mA mA mA mA TTS Thermal Shutdown Temperature - 50 - 525 20 200 130 C 1644f 2 LTC1644 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V12VIN = 12V, VEEIN = -12V, V3VIN = 3.3V, V5VIN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VTH Power Good Threshold Voltage 12VOUT VEEOUT 3VOUT 5VOUT 10.8 - 10.4 2.8 4.50 11.1 - 10.5 2.9 4.62 11.4 - 11.1 3.0 4.75 V V V V V3VONLY 3V Only Window Voltage V3VONLY = V5VIN - V3VIN, V5VOUT = V3VOUT = 3V 50 107 200 mV VNOVEEIN No VEEIN Threshold Voltage VEEIN -4 - 4.6 - 6.3 V VIL Input Low Voltage OFF/ON, RESETIN, FAULT 0.8 V VIH Input High Voltage OFF/ON, RESETIN, FAULT IIN OFF/ON, RESETIN Input Current OFF/ON, RESETIN = 0V OFF/ON, RESETIN = 12VIN 0.08 0.08 10 10 A A RESETOUT, FAULT Output Current RESETOUT, FAULT = 5V, OFF/ON = 0V, RESETIN = 3.3V 0.08 10 A PWRGD Output Current PWRGD = 5V, OFF/ON = 4V 0.08 10 A 5VSENSE Input Current 5VSENSE = 5V, 5VOUT = 0V 55 100 A 3VSENSE Input Current 3VSENSE = 3.3V, 3VOUT = 0V 55 100 A 5VIN Input Current 5VIN = 5V, TIMER = 0V 1 1.5 mA 3VIN Input Current 3VIN = 3.3V, TIMER = FLOAT 3VIN = 3.3V, TIMER = 0V 490 380 625 550 A A 5VOUT Input Current 5VOUT = 5V, OFF/ON = 0V, TIMER = 0V 102 400 A 2 3VOUT Input Current 3VOUT = 3.3V, OFF/ON = 0V, TIMER = 0V ITIMER TIMER Pin Current OFF/ON = 0V, VTIMER = 0V VTIMER = 5V, OFF/ON = 4V -15 30 VTIMER TIMER Threshold Voltages (V12VIN - VTIMER), FAULT = 0V 0.5 RDIS 5VOUT Discharge Impedance 3VOUT Discharge Impedance 12VOUT Discharge Impedance VEEOUT Discharge Impedance OFF/ON = 4V OFF/ON = 4V OFF/ON = 4V OFF/ON = 4V VOL Output Low Voltage PWRGD, RESETOUT, FAULT, I = 3mA VPXG PRECHARGE Reference Voltage V5VIN = 5V V5VIN = V3VIN = 3.3V 0.95 0.95 V 161 500 A - 21 45 -27 70 A mA 1 1.3 V 45 60 430 625 100 100 1000 1000 0.4 V 1.05 1.05 V V 1.00 1.00 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. 1644f 3 LTC1644 U W TYPICAL PERFOR A CE CHARACTERISTICS 3.3V and 5V Current Foldback Profile 1.0 10 0.9 - 12V Output Current 0.40 TA = 25C 12VIN = 12V 6 5 4 3 OUTPUT CURRENT (A) 7 0.7 0.6 0.5 0.4 0.3 0.2 2 TA = 25C RSENSE = 0.005 1 0.25 0.20 0.15 0.10 0 1 2 3 4 OUTPUT VOLTAGE (V) 5 0 0 2 4 6 8 OUTPUT VOLTAGE (V) 10 1644 G01 12 0 3.2 2.8 -50 -25 50 25 0 TEMPERATURE (C) 75 RAMPING UP 8.45 8.40 8.35 RAMPING DOWN 8.30 8.25 8.20 -50 100 -25 25 50 0 TEMPERATURE (C) 75 RAMPING UP 3VIN UVLO THRESHOLD VOLTAGE (V) 2.55 2.54 2.53 2.52 2.51 2.50 2.49 RAMPING DOWN 2.48 2.47 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G07 60 RAMPING UP 2.53 2.52 2.51 2.50 RAMPING DOWN 2.49 2.48 2.47 2.46 -50 100 -25 0 50 25 TEMPERATURE (C) 75 100 1644 G06 5V Foldback Current Limit Voltage vs Temperature 3V Foldback Current Limit Voltage vs Temperature TIMER = 0V 3V FOLDBACK CURRENT LIMIT VOLTAGE (mV) 5V FOLDBACK CURRENT LIMIT VOLTAGE (mV) 2.56 2.54 1644 G05 1644 G04 3VIN UVLO Threshold Voltage vs Temperature -12 2.55 5VIN UVLO THRESHOLD VOLTAGE (V) 12VIN UNDERVOLTAGE LOCKOUT (V) 2.9 -10 5VIN UVLO Threshold Voltage vs Temperature 8.50 3.0 -4 -6 -8 OUTPUT VOLTAGE (V) 1644 G03 12VIN Undervoltage Lockout vs Temperature 3.1 -2 1644 G02 12VIN Supply Current vs Temperature 12VIN SUPPLLY CURRENT (mA) 0.30 0.05 0.1 0 0 TA = 25C VEEIN = -12V 0.35 0.8 5VOUT 3VOUT 8 OUTPUT CURRENT (A) 9 OUTPUT CURRENT (A) 12V Output Current 11 5VOUT = 3V 50 40 30 20 5VOUT = 0V 10 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G08 60 TIMER = 0V 3VOUT = 2V 50 40 30 20 3VOUT = 0V 10 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G09 1644f 4 LTC1644 U W TYPICAL PERFOR A CE CHARACTERISTICS 5V/3.3V Circuit Breaker Overcurrent Fault Response Time vs Temperature 56.0 55.8 55.6 55.4 55.2 55.0 -25 50 25 0 TEMPERATURE (C) 0.125 48.0 TIMER PIN FLOATING 54.8 -50 75 47.5 47.0 46.5 46.0 45.5 45.0 44.5 -50 100 -25 50 25 0 TEMPERATURE (C) 75 1644 G10 0.105 0.100 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G12 GATE Pin Current vs Temperature (VGATE = 0V, OFF/ON = 0V) -40 VGATE = 5V OFF/ON = 4V -45 VGATE = 5V OFF/ON = 4V 10 8 6 4 -50 GATE PIN CURRENT (A) GATE PIN CURRENT (A) GATE PIN CURRENT (mA) 300 200 150 100 -55 -60 -65 -70 -75 50 2 -80 0 -50 -25 0 50 25 TEMPERATURE (C) 75 0 -50 100 -25 50 25 0 TEMPERATURE (C) 75 1644 G13 11.95 11.94 11.93 11.92 -50 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G16 0 25 50 TEMPERATURE (C) 0.35 0.18 I = 500mA 100 75 VEE Internal Switch Voltage Drop vs Temperature VEE INTERNAL SWITCH VOLTAGE DROP (V) 11.96 -25 1644 G15 12V Internal Switch Voltage Drop vs Temperature VCC INTERNAL SWITCH VOLTAGE DROP (V) IGATE = -1A -85 -50 100 1644 G14 GATE Pin Voltage vs Temperature GATE PIN VOLTAGE (V) 0.110 250 12 11.97 0.115 GATE Pin Current vs Temperature (VGATE = 5V, OFF/ON = 4V) VGATE = 2V FAULT = 0V 14 100 0.120 1644 G11 GATE Pin Current vs Temperature (VGATE = 2V, FAULT = 0V) 16 5V/3.3V Circuit Breaker ShortCircuit Response Time vs Temperature 5V/3.3V CIRCUIT BREAKER SHORT-CIRCUIT RESPONSE TIME (s) 56.2 5V/3.3V CIRCUIT BREAKER OVERCURRENT FAULT RESPONSE TIME (s) 5V/3.3V CIRCUIT BREAKER TRIP VOLTAGE (mV) 5V/3.3V Circuit Breaker Trip Voltage vs Temperature IEE = 100mA 0.16 0.30 0.14 0.25 0.12 0.20 0.10 0.08 0.15 0.06 0.10 0.04 0.05 0 -50 0.02 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G17 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G18 1644f 5 LTC1644 U W TYPICAL PERFOR A CE CHARACTERISTICS 12V Foldback Current Limit vs Temperature 0.45 0.90 12VOUT = 10V 11.11 12VOUT PWRGD THRESHOLD VOLTAGE (V) 1.00 0.40 VEE FOLDBACK CURRENT LIMIT (A) 12V FOLDBACK CURRENT LIMIT (A) 12VOUT PWRGD Threshold Voltage vs Temperature VEE Foldback Current Limit vs Temperature 0.80 VEEOUT = -10V 0.35 0.70 0.30 0.60 0.25 0.50 12VOUT = 0V 0.40 0.20 0.15 0.30 VEEOUT = 0V 0.10 0.20 0.05 0.10 0 -50 -25 0 25 50 TEMPERATURE (C) 0 -50 100 75 -25 0 25 50 TEMPERATURE (C) VEEOUT PWRGD Threshold Voltage vs Temperature 4.622 -10.48 -10.49 -10.50 -10.51 -10.52 -10.53 0 50 25 TEMPERATURE (C) 75 11.07 11.06 11.05 20 40 60 -60 -40 -20 0 TEMPERATURE (C) 4.620 1644 G21 3VOUT PWRGD Threshold Voltage vs Temperature 2.903 4.618 2.901 4.616 2.899 4.614 2.897 4.612 4.610 -50 100 -25 0 25 50 TEMPERATURE (C) 75 100 2.895 -50 60 0.13 -4.30 50 5VSENSE INPUT CURRENT (A) VEEIN THRESHOLD VOLTAGE (V) -4.20 -4.40 -4.50 3VIN - 5VIN -4.60 0.09 -4.70 0.08 75 0.07 -4.80 0.06 -50 -4.90 -50 100 5VSENSE Input Current vs Temperature 0.14 0.10 0 25 50 TEMPERATURE (C) 1644 G24 No VEEIN Threshold Voltage vs Temperature 5VIN - 3VIN -25 1644 G23 3V Only Window Voltage vs Temperature 0.11 100 2.905 1644 G22 0.12 80 3VOUT PWRGD THRESHOLD VOLTAGE (V) 5VOUT PWRGD THRESHOLD VOLTAGE (V) VEEOUT PWRGD THRESHOLD VOLTAGE (V) -10.47 -25 11.08 5VOUT PWRGD Threshold Voltage vs Temperature -10.46 3V ONLY WINDOW VOLTAGE (V) 100 11.09 1644 G20 1644 G19 -10.54 -50 75 11.10 5VOUT = 0V 40 30 20 10 5VOUT = 3V -25 0 50 25 TEMPERATURE (C) 75 100 1644 G25 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G26 0 -50 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G27 1644f 6 LTC1644 U W TYPICAL PERFOR A CE CHARACTERISTICS 3VSENSE Input Current vs Temperature 5VIN Input Current vs Temperature 1.04 40 30 20 10 -25 1.02 1.01 1.00 0.99 0.98 50 25 0 TEMPERATURE (C) 0.96 -50 100 75 -25 50 25 0 TEMPERATURE (C) 75 1644 G28 102 101 25 50 0 TEMPERATURE (C) 75 164 21.6 163 21.4 162 161 160 159 -25 25 50 0 TEMPERATURE (C) 75 10 -25 0 25 50 TEMPERATURE (C) 75 21.0 20.8 100 1644 G34 -25 25 50 0 TEMPERATURE (C) 75 5VOUT Discharge Resistance vs Temperature 70 1.10 1.05 1.00 0.95 0.90 0.85 0.80 -50 100 1644 G33 5VOUT DISCHARGE RESISTANCE () 20 VTIMER = 0V ON = 0V 20.4 -50 100 1.15 TIMER THRESHOLD VOLTAGE (V) TIMER PIN CURRENT (mA) 30 100 21.2 TIMER Threshold Voltage vs Temperature 40 75 1644 G32 TIMER Pin Current vs Temperature (OFF/ON = 4V) 50 0 25 50 TEMPERATURE (C) 20.6 157 -50 100 VTIMER = 5V OFF/ON = 4V -25 TIMER Pin Current vs Temperature (ON = 0V) 1644 G31 0 -50 350 1644 G30 158 60 TIMER = 0V 300 -50 100 TIMER PIN CURRENT (A) 3VOUT INPUT CURRENT (A) 5VOUT INPUT CURRENT (A) 103 70 400 3VOUT Input Current vs Temperature 104 -25 450 1644 G29 5VOUT Input Current vs Temperature 100 -50 TIMER PIN FLOATING 500 0.97 3VOUT = 2V 0 -50 TIMER = 0V 3VIN INPUT CURRENT (A) 50 3VIN Input Current vs Temperature 550 1.03 3VOUT = 0V 5VIN INPUT CURRENT (mA) 3VSENSE INPUT CURRENT (A) 60 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G35 60 50 40 30 20 10 0 -50 -25 50 25 0 TEMPERATURE (C) 75 100 1644 G36 1644f 7 LTC1644 U W TYPICAL PERFOR A CE CHARACTERISTICS 3VOUT Discharge Resistance vs Temperature 12VOUT Discharge Resistance vs Temperature 70 60 50 40 30 20 10 -25 0 25 50 TEMPERATURE (C) 75 VEEOUT DISCHARGE RESISTANCE () 8O 0 -50 900 700 12VOUT DISCHARGE RESISTANCE () 3VOUT DISCHARGE RESISTANCE () 90 VEEOUT Discharge Resistance vs Temperature 600 500 400 300 200 100 0 -50 100 -25 50 25 0 TEMPERATURE (C) 75 1.005 PRECHARGE REFERENCE VOLTAGE (V) I = 3mA 0.25 FAULT 0.20 VOL (V) 600 500 400 300 200 100 0 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G39 Precharge Reference Voltage vs Temperature VOL vs Temperature V5VIN = 5V 1.004 RESETOUT 0.15 PWRGD 1.003 0.10 0.05 0 -50 700 1644 G38 1644 G37 0.30 100 80O -25 0 25 50 TEMPERATURE (C) 75 100 1644 G40 1.002 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1644 G41 U U U PI FU CTIO S 12VIN (Pin 1): 12V Supply Input. A 0.5 switch is connected between 12VIN and 12VOUT with a foldback current limit. An undervoltage lockout circuit prevents the switches from turning on while the 12VIN pin voltage is less than 8.3V. 12VIN also provides power to the LTC1644's internal circuitry. VEEIN (Pin 2): -12V Supply Input. A 1 switch is connected between VEEIN and VEEOUT with a foldback current limit. If no VEE supply input is available, tie the VEEIN pin to the GND pin in order to disable the VEEOUT power good function. 5VOUT (Pin 3): 5V Output Sense. The PWRGD pin will not pull low until the 5VOUT pin voltage exceeds 4.62V. If no 5V input supply is available, tie the 5VOUT pin to the 3VOUT pin in order to disable the 5VOUT power good function. TIMER (Pin 4): Current Fault Inhibit Timing Input. Connect a capacitor from TIMER to GND. With the chip turned off (OFF/ON = HIGH), the TIMER pin is internally held at GND. When the chip is turned on, a 21A pull-up current source is connected to TIMER. Current limit faults will be ignored until the voltage at the TIMER pin rises to within 1V of 12VIN. 1644f 8 LTC1644 U U U PI FU CTIO S OFF/ON (Pin 5): Digital Input. Connect the CPCI BD_SEL# signal to the OFF/ON pin. When the OFF/ON pin is pulled low, the GATE pin is pulled high by a 65A current source and the internal 12V and -12V switches are turned on. When the OFF/ON pin is pulled high, the GATE pin will be pulled to ground by a 225A current source and the 12V and -12V switches turn off. 5VIN (Pin 13): 5V Supply Sense Input. An undervoltage lockout circuit prevents the switches from turning on when the voltage at the 5VIN pin is less than 2.48V. If no 5V input supply is available, tie the 5VIN to the 3VIN pin. The OFF/ON pin is also used to reset the electronic circuit breaker. If the OFF/ON pin is cycled high and low following the trip of the circuit breaker, the circuit breaker is reset and a normal power-up sequence will occur. 5VSENSE (Pin 14): 5V Current Limit Sense. With a sense resistor placed in the supply path between 5VIN and 5VSENSE, the GATE pin voltage will be adjusted to maintain a constant 51mV across the sense resistor and a constant current through the switch while the TIMER pin is low. A foldback feature reduces the current limit as the voltage at the 5VOUT pin approaches GND. FAULT (Pin 6): Open-Drain Digital I/O. FAULT is pulled low when a current limit fault is detected. Current limit faults are ignored until the voltage at the TIMER pin is within 1V of 12VIN. Once the TIMER cycle is complete, FAULT will pull low and the chip latches off in the event of an overcurrent fault. The chip will remain latched in the off state until the OFF/ON pin is cycled high then low. When the TIMER pin is high, the circuit breaker function is enabled. If the voltage across the sense resistor exceeds 55mV but is less than 150mV, the circuit breaker is tripped after a 45s time delay. In the event the sense resistor voltage exceeds 150mV, the circuit breaker trips immediately and the chip latches off. To disable the current limit, 5VSENSE and 5VIN can be shorted together. Forcing the FAULT pin low with an external pull-down will cause the chip to be latched into the off state after a 45s deglitching time. GATE (Pin 15): High Side Gate Drive for the External 3.3V and 5V N-Channels pass transistors. Requires an external series RC network to compensate the current limit loop and set the minimum ramp-up rate. During power up, the slope of the voltage rise at the GATE is set by the 65A current source connected to 12VIN and the external capacitor connected to GND (C1, see Figure 1) or by the 3.3V or 5V current limit and the bulk capacitance on the 3VOUT or 5VOUT supply lines (CLOAD(5VOUT) or CLOAD(3VOUT), see Figure 1). During power down, the slew rate of the GATE voltage is set by the 225A current source connected to GND and the external GATE capacitor (C1, see Figure 1). PWRGD (Pin 7): Open-Drain Digital Power Good Output. Connect the CPCI HEALTHY# signal to the PWRGD pin. PWRGD remains low while V12VOUT 11.1V, V3VOUT 2.9V, V5VOUT 4.62V and VEEOUT -10.5V. When any of the supplies falls below its power good threshold voltage, PWRGD will go high after a 10s deglitching time. GND (Pin 8): Chip Ground. RESETIN (Pin 9): Digital Input. Connect the CPCI PCI_RST# signal to the RESETIN pin. Pulling RESETIN low will cause RESETOUT to pull low. RESETOUT (Pin 10): Open-Drain Digital Output. Connect the CPCI LOCAL_PCI_RST# signal to the RESETOUT pin. RESETOUT is the logical combination of RESETIN and PWRGD. DRIVE (Pin 11): Precharge Base Drive Output. Provides base drive for an external NPN emitter-follower which in turn biases the PRECHARGE node. PRECHARGE (Pin 12): Precharge Monitor Input. An onchip error amplifier servos the DRIVE pin voltage to keep the precharge node at 1V. The voltage at the GATE pin will be modulated to maintain a constant current when either the 3V or 5V supplies go into current limit while the TIMER pin is low. In the event of a fault or an undervoltage condition, the GATE pin is immediately pulled to GND. 3VSENSE (Pin 16): 3.3V Current Limit Set. With a sense resistor placed in the supply path between 3VIN and 3VSENSE, the GATE pin voltage will be adjusted to maintain a constant 51mV across the sense resistor and a constant current through the switch while the TIMER pin is low. A foldback feature reduces the current limit as the voltage at the 3VOUT pin approaches GND. 1644f 9 LTC1644 U U U PI FU CTIO S When the TIMER pin is high, the circuit breaker function is enabled. If the voltage across the sense resistor exceeds 55mV but is less than 150mV, the circuit breaker is tripped after a 45s time delay. In the event the sense resistor voltage exceeds 150mV, the circuit breaker trips immediately and the chip latches off. To disable the current limit, 3VSENSE and 3VIN can be shorted together. 3VOUT (Pin 18): Analog Input used to monitor the 3.3V output supply voltage. The PWRGD pin cannot pull low until the 3VOUT pin voltage exceeds 2.9V. If no 3.3V input supply is available, tie the 3VOUT pin to the 5VOUT pin. VEEOUT (Pin 19): -12V Supply Output. A 1 switch is connected between VEEIN and VEEOUT. VEEOUT must exceed -10.5V before the PWRGD pin pulls low unless the VEE PWRGD function is disabled by grounding the VEEIN pin. 3VIN (Pin 17): 3.3V Supply Sense Input. An undervoltage lockout circuit prevents the switches from turning on when the voltage at the 3VIN pin is less than 2.48V. If no 3.3V input supply is available, connect two series diodes between 5VIN and 3VIN (tie anode of first diode to 5VIN and cathode of second diode to 3VIN, see Figure 11). 12VOUT (Pin 20): 12V Supply Output. A 0.5 switch is connected between 12VIN and 12VOUT. 12VOUT must exceed 11.1V before the PWRGD pin can pull low. W BLOCK DIAGRA 5VIN 5VSENSE 13 14 +- TIMER 3VSENSE GATE 15 5VOUT 12VIN + +- Q1 3 TIMER -+ - 225A + + CP1 +- 18 A2 - 55mV 3VOUT 5VOUT 3VIN 17 -+ + 65A A1 51mV, TIMER LO 150mV, TIMER HI 16 3VOUT CP2 - Q2 51mV, TIMER LO 150mV, TIMER HI 55mV -+ - Q3 2.5V UVL 2.5V UVL CP3 + OFF/ON 5 - FAULT 6 REF Q11 CP4 + LOGIC PWRGD 7 - Q10 10 RESETOUT REF Q4 RESETIN 9 8.3V UVL Q6 Q9 REF 12VIN - Q8 Q12 21A + CP7 + Q7 CP5 1V A3 + 12 PRECHARGE Q5 - - REF 1 20 4 2 19 12VIN 12VOUT TIMER VEEIN VEEOUT 8 GND 11 1644 BD DRIVE NOTE: V12VIN - VTIMER < 1V = TIMER HI, V12VIN - VTIMER > 1V = TIMER LOW 1644f 10 LTC1644 W UW TI I G DIAGRA S tSC Short-Circuit Fault Detect tOC Overcurrent Fault Detect 5V OR 3.3V V5VSENSE OR V3VSENSE 100mV FALL TIME 1s 5VIN = 5V, 3VIN = 3.3V 5V OR 3.3V V5VSENSE OR V3VSENSE 200mV tOC FALL TIME 10ns 5VIN = 5V, 3VIN = 3.3V tSC FAULT FAULT 1644 TD01 1644 TD02 U W U U APPLICATIO S I FOR ATIO Hot Circuit Insertion When a circuit board is inserted into a live CompactPCI (CPCI) slot, the supply bypass capacitors on the board can draw huge supply transient currents from the CPCI power bus as they charge up. The transient currents can cause glitches on the power bus, causing other boards in the system to reset. The LTC1644 is designed to turn a board's supply voltages on and off in a controlled manner, allowing the board to be safely inserted or removed from a live CPCI slot without glitching the system power supplies. The chip also protects the supplies from shorts, precharges the bus I/O pins during insertion and extraction and monitors the supply voltages. The LTC1644 is specifically designed for CPCI applications where the chip resides on the plug-in board. LTC1644 Feature Summary * Allows safe board insertion and removal from a CPCI backplane. * Controls all four CPCI supplies: -12V, 12V, 3.3V and 5V. * Adjustable foldback current limit: an adjustable analog current limit with a value that depends on the output voltage. If the output is shorted to ground, the current limit drops to keep power dissipation and supply glitches to a minimum. * 12V and -12V circuit breakers: if either supply remains in current limit too long, the circuit breaker will trip, the supplies are turned off and the FAULT pin is pulled low. * Dual-level, adjustable 5V and 3.3V circuit breakers: if either supply exceeds current limit for too long, the circuit breaker will trip, the supplies will be turned off and the FAULT pin will be asserted. In the event that either supply exceeds 3 times the nominal current level, all supplies will be turned off and the FAULT pin will be asserted immediately. * Current limit during power up: the supplies are allowed to power up in current limit. This allows the chip to power up boards with widely varying capacitive loads without tripping the circuit breaker. The maximum allowable power-up time is adjustable using the TIMER pin. * 12V and -12V power switches on chip. * PWRGD output: monitors the voltage status of the four supply voltages. * PCI_RST# combined on-chip with HEALTHY# to create LOCAL_PCI_RST# output. If HEALTHY# deasserts, LOCAL_PCI_RST# is asserted independent of PCI_RST#. * Precharge output: on-chip reference and amplifier provide 1V for biasing bus I/O connector pins during CPCI card insertion and extraction. * Space saving 20-pin SSOP package. CPCI Power Requirements CPCI systems usually require four power rails: 5V, 3.3V, 12V and -12V. The tolerance of the supplies as measured at the components on the plug-in card is summarized in Table 1. Table 1. Compact PCI Power Specifications SUPPLY TOLERANCE MAX RIPPLE (P-P) 5V +5%/-3% 50mV 3.3V +5%/-3% 50mV 12V 5% 240mV -12V 5% 240mV 1644f 11 LTC1644 U W U U APPLICATIO S I FOR ATIO Power-Up Sequence The LTC1644 is specifically designed for live insertion and removal of CPCI boards. The typical application is shown in Figure 1. The 3.3V, 5V, 12V and -12V inputs to the LTC1644 come from the medium length power pins. The long 5V and 3.3V connector pins are connected through decoupling resistors to the medium length 5V and 3.3V connector pins on the CPCI plug-in card and provide early power for the LTC1644's precharge circuit, pull-up resistors and the PCI bridge chip. The BD_SEL# signal is connected to the OFF/ON pin while the PWRGD pin is connected to the HEALTHY# signal. The HEALTHY# signal is combined with the PCI_RST# signal on-chip to generate the LOCAL_PCI_RST# signal which is available at the RESETOUT pin. The power supplies are controlled by placing external N-channel pass transistors in the 3.3V and 5V power paths and internal pass transistors for the 12V and -12V power paths (Figure 1). Resistors R1 and R2 provide current fault detection and R5 and C1 provide current control loop compensation. Resistors R3 and R4 prevent high frequency oscillations in Q1 and Q2. Shunt RC snubbers R15-C4 and R16-C5 and zener diodes Z1 and Z2 prevent the 12VIN and VEEIN pins, respectively, from ringing beyond the absolute maximum rated supply voltages during hot insertion. When the CPCI card is inserted, the long 5V and 3.3V connector pins and GND pins make contact first. The LTC1644's precharge circuit biases the bus I/O pins to 1V during this stage of the insertion (Figure 2). The 12V, -12V and 5V and 3.3V medium length pins make contact during the next stage of insertion. At this point the LTC1644 powers on but slot power is disabled as long as the OFF/ON pin is pulled high by the 1.2k pull-up resistor to 5VIN. During the final stage of board insertion, the BD_SEL# short connector pin makes contact and the OFF/ON pin can be pulled low. This enables the pass transistors to turn on and a 21A current source is connected to TIMER (Pin 4). The current in each pass transistor increases until it reaches the current limit for each supply. The 5V and 3.3V supplies are then allowed to power up based on one of the following rates: Power-up rate: (1) I I dV 65A = , or = LIMIT (5 V) , or = LIMIT (3 V) dt C1 C LOAD(5 VOUT ) C LOAD(3 VOUT ) whichever is slower. Current limit faults are ignored while the TIMER pin voltage is ramping up and is less than 1V below 12VIN (Pin 1). Once all four supply voltages are within tolerance, HEALTHY# (Pin 7) will pull low and LOCAL_PCI_RST# is free to follow PCI_RST#. Power-Down Sequence When the BD_SEL# is pulled high, a power-down sequence begins (Figure 3). Internal switches are connected to each of the output supply voltage pins to discharge the bypass capacitors to ground. The TIMER pin is immediately pulled low. The GATE pin (Pin 15) is pulled down by a 225A current source to prevent the load currents on the 3.3V and 5V supplies from going to zero instantaneously and glitching the power supply voltages. When any of the output voltages dips below its threshold, the HEALTHY# signal pulls high and LOCAL_PCI_RST# will be asserted low. Once the power-down sequence is complete, the CPCI card may be removed from the slot. During extraction, the precharge circuit will continue to bias the bus I/O pins at 1V until the 5V and 3.3V long connector pin connections are broken. 1644f 12 LTC1644 U W U U APPLICATIO S I FOR ATIO TIMER 10V/DIV TIMER 10V/DIV GATE 5V/DIV GATE 5V/DIV 12VOUT 10V/DIV 12VOUT 10V/DIV 5VOUT 10V/DIV 3VOUT 10V/DIV 5VOUT 10V/DIV 3VOUT 10V/DIV VEEOUT 10V/DIV VEEOUT 10V/DIV BD_SEL# 5V/DIV BD_SEL# 5V/DIV LOCAL_PCI_RST# 5V/DIV LOCAL_PCI_RST# 5V/DIV HEALTHY# 5V/DIV HEALTHY# 5V/DIV PRECHARGE 5V/DIV PRECHARGE 5V/DIV 10ms/DIV 1644 F02 1644 F03 Figure 3. Normal Power-Down Sequence Figure 2. Normal Power-Up Sequence TIMER During a power-up sequence, a 21A current source is connected to the TIMER pin (Pin 4) and current limit faults are ignored until the voltage ramps to within 1V of 12VIN (Pin 1). This feature allows the chip to power up CPCI boards with widely varying capacitive loads on the supplies. The power-up time for any one of the four outputs is given by Equation 2: C LOAD(XVOUT) * XVOUT tON ( XVOUT ) = 2 * ILIMIT (XVOUT) - ILOAD(XVOUT) 10ms/DIV (2) where XVOUT = 5VOUT, 3VOUT, 12VOUT or VEEOUT (-12V). For example, for CLOAD(5VOUT) = 2000F, ILIMIT(5VOUT) = 7A and ILOAD(5VOUT) = 5A, the 5VOUT turn-on time will be ~10ms. By substituting the variables in Equation 2 with the appropriate values, the turn-on time for the other three outputs can be calculated. The timer period should be set longer than the maximum supply turn-on time but short enough to not exceed the maximum safe operating area of the pass transistor during a short circuit. The timer period for the LTC1644 is given by: tTIMER = C TIMER * 11V 21A (3) As a design aid, the timer period as a function of the timing capacitor using standard values from 0.01F to 1F is shown in Table 2. 1644f 13 LTC1644 U W U U APPLICATIO S I FOR ATIO Table 2. tTIMER vs CTIMER CTIMER tTIMER CTIMER tTIMER 0.01F 5.24ms 0.22F 115ms 0.022F 11.5ms 0.33F 173ms 0.033F 17.3ms 0.47F 246ms 0.047F 24.6ms 0.68F 356ms 0.068F 35.6ms 0.82F 430ms 0.082F 43.0ms 1F 524ms 0.1F 52.4ms The TIMER pin is immediately pulled low when the BD_SEL# signal goes high. Thermal Shutdown The internal switches for the 12V and -12V supplies are protected by an internal current limit and a thermal shutdown circuit. When the temperature of the chip reaches 130C, all switches will be latched off and the FAULT pin (Pin 6) will be pulled low. After power-up, the 5V and 3.3V supplies are protected from overcurrent and short-circuit conditions by duallevel circuit breakers. In the event that either supply current exceeds the nominal limit but is less than 3 times the current limit, an internal timer is started. If the supply is still overcurrent after 45s, the circuit breaker trips and all the supplies are turned off (Figure 5). If a short-circuit occurs and the supply current exceeds 3 times the set limit, the circuit breakers trip without any delay and the chip latches off (Figure 6). The chip will stay in the latched off state until OFF/ON (Pin 5) is cycled high then low or the 12VIN (Pin 1) power supply is cycled off then on. The current limit and the foldback current level for the 5V and 3.3V outputs are both a function of the external sense resistor (R1 for 3VOUT and R2 for 5VOUT, see Figure 1). As shown in Figure 1, a sense resistor is connected between 5VIN (Pin 13) and 5VSENSE (Pin 12) for the 5V supply. For the 3V supply, a sense resistor is connected between 3VIN (Pin 9) and 3VSENSE (Pin 10). The current limit and the foldback current level are given by Equations 4 and 5: Short-Circuit Protection During a normal power-up sequence, if the TIMER (Pin 4) is done ramping and any supply is still in current limit, all of the pass transistors will be immediately turned off and FAULT (Pin 6) will be pulled low as shown in Figure 4. In order to prevent excessive power dissipation in the pass transistors and to prevent voltage spikes on the supplies during short-circuit conditions, the current limit on each supply is designed to be a function of the output voltage. As the output voltage drops, the current limit decreases. Unlike a traditional circuit breaker function where large currents can flow before the breaker trips, the current foldback feature assures that the supply current will be kept at a safe level. In addition, current foldback prevents voltage glitches when powering up into a short. If either the 12V or -12V supply exceeds current limit after power up, the shorted supply's current will drop immediately to its ILIMIT value. If that supply remains in current limit for more that 45s, all of the supplies will be latched off. The 45s delay prevents quick current spikes--for example, from a fan turning on--from causing false trips of the circuit breaker. ILIMIT (XVOUT) = 51mV (4) RSENSE(XVOUT) IFOLDBACK(XVOUT) = 12mV (5) RSENSE(XVOUT) where XVOUT = 5VOUT or 3VOUT. As a design aid, the current limit and foldback level for commonly used values for RSENSE is shown in Table 3. Table 3. ILIMIT(XVOUT) and IFOLDBACK(XVOUT) vs RSENSE RSENSE () ILIMIT(XVOUT) IFOLDBACK(XVOUT) 0.005 10.2A 2.4A 0.006 8.5A 2.0A 0.007 7.3A 1.7A 0.008 6.4A 1.5A 0.009 5.7A 1.3A 0.01 5.1A 1.2A where XVOUT = 3VOUT or 5VOUT. The current limit for the internal 12V switch is set at 840mA folding back to 360mA and the -12V switch at 320mA folding back to 100mA. 1644f 14 LTC1644 U U W U APPLICATIO S I FOR ATIO TIMER 10V/DIV GATE 5V/DIV 12VOUT 10V/DIV 5VOUT 5V/DIV 3VOUT 5V/DIV VEEOUT 10V/DIV LOCAL_PCI_RST# 5V/DIV BD_SEL# 5V/DIV FAULT 5V/DIV HEALTHY# 5V/DIV PRECHARGE 5V/DIV 20ms/DIV 1644 F04 Figure 4. Power-Up into a Short on 3.3V Output TIMER 10V/DIV TIMER 10V/DIV GATE 10V/DIV GATE 10V/DIV 5VIN - 5VSENSE 100mV/DIV 50mV 150mV 5VIN - 5VSENSE 100mV/DIV FAULT 5V/DIV FAULT 5V/DIV 20s/DIV Figure 5. Overcurrent Fault on 5V 1644 F05 10s/DIV 1644 F06 Figure 6. Short-Circuit Fault on 5V 1644f 15 LTC1644 U W U U APPLICATIO S I FOR ATIO Calculating RSENSE An equivalent circuit for one of the LTC1644's circuit breakers useful in calculating the value of the sense resistor is shown in Figure 7. To determine the most appropriate value for the sense resistor first requires the maximum current required by the load under worst-case conditions. ILOAD(MAX) The second step is to determine the nominal value of the sense resistor which is dependent on its tolerance (RTOL = 1%, 2%, or 5%) and standard sense resistor values. Equation 7 can be used to calculate the nominal value from the maximum value found by Equation 6: RSENSE(N0M) = RSENSE 5VIN 13 14 VCB + - LTC1644* + - *ADDITIONAL DETAILS OMITTED FOR CLARITY VCB(MAX) = 70mV VCB(NOM) = 55mV VCB(MIN) = 40mV 1644 F07 Figure 7. Circuit Breaker Equivalent Circuit for Calculating RSENSE Two other parameters affect the value of the sense resistor. First is the tolerance of the LTC1644's circuit breaker threshold. The LTC1644's nominal circuit breaker threshold is VCB(NOM) = 55mV; however, it exhibits 15mV tolerance over process and temperature. Second is the tolerance (RTOL) in the sense resistor. Sense resistors are available in RTOLs of 1%, 2% and 5% and exhibit temperature coefficients of resistance (TCRs) between 75ppm/C and 100ppm/C. How the sense resistor changes as a function of temperature depends on the I2R power being dissipated by it. The power rating of the sense resistor should accommodate steady-state fault current levels so that the component is not damaged before the circuit breaker trips. The first step in calculating the value of RSENSE is based on ILOAD(MAX) and the lower limit for the circuit breaker threshold, VCB(MIN). The maximum value for RSENSE in this case is expressed by Equation 6: RSENSE = VCB(MIN) ILOAD(MAX) (7) Often, the result of Equation 7 may not yield a standard sense resistor value. In this case, two sense resistors with the same RTOL can be connected in parallel to yield RSENSE(NOM). 5VSENSE 5VIN RSENSE(MAX) RTOL 1+ 100 The last step requires calculating a new value for ITRIP(MAX) (ITRIP(MAX,NEW)) based on a minimum value for RSENSE (RSENSE(MIN)) and the upper limit for the circuit breaker threshold, VCB(MAX). The new value for ITRIP(MAX,NEW) is given by Equation 8: ITRIP(MAX,NEW) = VCB(MAX) RSENSE(MIN) (8) RTOL where RSENSE(MIN) = RSENSE(NOM) * 1 - 100 Table 4 lists ITRIP(MIN) and ITRIP(MAX) versus some suggested values of RSENSE. Table 8 lists manufacturers and part numbers for these resistor values. Table 4. ITRIP vs RSENSE Table RSENSE (1% RTOL) ITRIP(MIN) ITRIP(MAX) 0.005 7.92A 14.14A 0.007 5.66A 10.10A 0.011 3.60A 6.43A 0.028 1.41A 2.53A 0.055 0.72A 1.29A (6) 1644f 16 LTC1644 U U W U APPLICATIO S I FOR ATIO Output Voltage Monitor The status of all four output voltages is monitored by the power good function. In addition, the PCI_RST# signal is logically combined on-chip with the HEALTHY# signal to create LOCAL_PCI_RST# (see Table 5). As a result, LOCAL_PCI_RST# will be pulled low whenever HEALTHY# is pulled high independent of the state of the PCI_RST# signal. Table 5. LOCAL_PCI_RST# Truth Table PCI_RST# HEALTHY# LOCAL_PCI_RST# LO LO LO LO HI LO HI LO HI HI HI LO If any of the output voltages drop below the power good threshold for more than 10s, the PWRGD pin will be pulled high and the LOCAL_PCI_RST# signal will be asserted low. Precharge The PRECHARGE input and DRIVE output pins are intended for use in generating the 1V precharge voltage that is used to bias the bus I/O connector pins during board insertion. The LTC1644 is also capable of generating precharge voltages other than 1V. Figure 8 shows a circuit that can be used in applications requiring a precharge voltage less than 1V. The circuit in Figure 9 can be used for applications that need precharge voltages greater than 1V. Table 6 lists suggested resistor values for R10A and R10B vs precharge voltage for the application circuits shown in Figures 8 and 9. Table 6. R10A and R10B Resistor Values vs Precharge Voltage VPRECHARGE R10A R10B VPRECHARGE R10A R10B 1.5V 18 9.09 0.9V 16.2 1.78 1.4V 18 7.15 0.8V 14.7 3.65 1.3V 18 5.36 0.7V 12.1 5.11 1.2V 18 3.65 0.6V 11 7.15 1.1V 18 1.78 0.5V 9.09 9.09 1V 18 0 Due to leakage current constraints, precharge resistor values of less than 50k are often required. In these precharge applications, it may also be necessary to disconnect the individual resistors from the LTC1644's PRECHARGE pin when the plug-in board is completely seated in the board slot. The circuit in Figure 10 uses a bus switch to connect the individual precharge resistors to the LTC1644's PRECHARGE pin while the BD_SEL# pin voltage is pulled up to 5VIN, i.e., when the BD_SEL# short connector pin is still unconnected. After the plug-in board is completely seated, the BD_SEL# pin voltage will drop to approximately 3.8V (assuming BD_SEL# isn't asserted low), and the bus switch OE pin is pulled high by Q2. When the plug-in card is removed from the connector, the BD_SEL# connection is broken first and the BD_SEL# pin voltage pulls up to 5V. This causes Q2 to turn off, which reenables the bus switch and the precharge resistors are reconnected to the LTC1644's PRECHARGE pin for the remainder of the board extraction process. Other CompactPCI Applications The LTC1644 can be easily configured for applications where no VEE supply is present by simply connecting the VEEIN pin to GND and floating the VEEOUT pin (Figure 11). For CPCI applications where no 5V supply input is required, short both the 5VIN and 5VSENSE pins to the 3VIN pin and short the 5VOUT pin to the 3VOUT pin (Figure 12). If no 3.3V supply input is required, Figure 13 illustrates how the LTC1644 should be configured. First, 3VSENSE (Pin 16) is connected to 3VIN (Pin 17), 3VOUT (Pin 18) is connected to 5VOUT (Pin 3) and the LTC1644's 3VIN pin is connected through a pair of signal diodes (BAV99) to 5VIN. For applications where the BD_SEL# connector pin is typically grounded on the backplane, the circuit in Figure 14 allows the LTC1644 to be reset simply by pressing a pushbutton switch on the CPCI plugin board. This arrangement eliminates the requirement to extract and reinsert the CPCI board in order to reset the LTC1644's circuit breakers. Power MOSFET Selection Criteria Three device parameters are key in selecting the optimal power MOSFET for Hot Swap applications. The three parameters are: (1) device power dissipation (PD); (2) device drain-source channel ON resistance, RDS(ON); and 1644f 17 LTC1644 U U W U APPLICATIO S I FOR ATIO LTC1644* GND 8 LTC1644* PRECHARGE DRIVE 12 11 C3 4.7nF R9 18 R10A R10B GND 8 R8 1k R7 12 3VIN R22 2.74 LONG 5V R7 12 MMBT2222A 3VIN *ADDITIONAL DETAILS OMITTED FOR CLARITY 1644 F08 13 R20 1.2k 5% BD_SEL# 1644 F09 Figure 9. Precharge Voltage >1V Application Circuit C9 0.1F PER 10 POWER PINS 5VIN 5V R9 18 R8 1k PRECHARGE OUT R10A + R10B VPRECHARGE = * 1V R10A Figure 8. Precharge Voltage <1V Application Circuit PCB EDGE BACKPLANE CONNECTOR R10B R10A *ADDITIONAL DETAILS OMITTED FOR CLARITY DRIVE 11 C3 4.7nF MMBT2222A PRECHARGE OUT R10A VPRECHARGE = * 1V R10A + R10B BACKPLANE CONNECTOR PRECHARGE 12 R19 1k 5% 5 5VIN LTC1644* OFF/ON GND C7 0.01F PRECHARGE 8 DRIVE 12 11 R8 1k 5% Z4 R10 18 5% C3 4.7nF GROUND R23 51k 5% Q1 R7 MMBT2222A 12 5% PRECHARGE OUT 1V 10% IOUT = 55mA Q2 MMBT3906 R24 75k 5% OE BUS SWITCH R11 10k 5% R13 10 5% R9 24 R12 10k 5% I/O I/O PIN 1 UP TO 128 I/O LINES I/O PIN 128 Z4: 1PMT5.0AT3 *ADDITIONAL PINS OMITTED FOR CLARITY * * * * * * * * * R14 10 5% DATA BUS 3VIN I/O PCI BRIDGE CHIP 1644 F10 Figure 10. Precharge Circuit with Bus Switch (3) the gate-source (VGS) voltage drive for the specified RDS(ON). Power MOSFET power dissipation is dependent on four parameters: current delivered to the load, ILOAD; device RDS(ON); device thermal resistance, junction-toambient, JA; and the maximum ambient temperature to which the circuit will be exposed, TA(MAX). All four of these parameters determine the junction temperature of the MOSFET. For reliable circuit operation, the maximum junction temperature (TJ(MAX)) for a power MOSFET should not exceed the manufacturer's recommended value. For a given set of conditions, the junction temperature of a power MOSFET is given by Equation 9: MOSFET Junction Temperature, TJ(MAX) TA(MAX) + JA * PD (9) where PD = ILOAD * RDS(ON) PCB layout techniques for optimal thermal management of power MOSFET power dissipation help to keep device JA as low as possible. See PCB Layout Considerations section for more information. The RDS(ON) of the external pass transistor should be low to make its drain-source voltage (VDS) a small percentage of 3VIN or 5VIN. For example, at 3VIN = 3.3V, VDS + VCB = 0.1V yields a 3% error at maximum load current. This 1644f 18 LTC1644 U U W U APPLICATIO S I FOR ATIO BACKPLANE CONNECTOR C8 0.1F PER 10 POWER PINS PCB EDGE BACKPLANE CONNECTOR C9 0.1F PER 10 POWER PINS R2 0.007 5VIN* 5V Q2 IRF7413 R22 2.74 LONG 5V 3.3V R1 0.005 3VIN* R21 1.74 Z3 LONG 3.3V C6 0.01F Q1 IRF7413 Z4 R3 10 17 16 R4 10 18 15 3VSENSE GATE 3VIN 12V 2 5VIN R20 1.2k BD_SEL# R19 1k 5 EARLY V(I/O) 6 R17 2k R18 2k 7 HEALTHY# 9 PCI_RST# 3VOUT 13 5VIN 14 3 5VSENSE 5VOUT 20 VEEIN LTC1644 VEEOUT NC 4 TIMER C2 0.1F FAULT R6 2k PWRGD 10 RESETOUT RESETIN PRECHARGE 8 11 R10 18 5% C3 4.7nF R11 51k R13 10 3VOUT DRIVE 12 R12 51k R8 1k R9 24 GROUND 1V 10% 3VIN Q3 MMBT2222A R7 12 RESET# I/O #1 * * * * * * * * * I/O PIN 128 19 VEEOUT OFF/ON C4 0.01F I/O DATA LINE 128 12VOUT + 12VIN GND I/O PIN 1 3VOUT CLOAD(12VOUT) R15 1 I/O DATA LINE 1 + C1 0.047F R5 1k 12VOUT 1 5VOUT CLOAD(3VOUT) C7 0.01F Z1 + CLOAD(5VOUT) R14 10 I/O #128 Z1: SMAJ12CA Z3, Z4: 1PMT5.0AT3 *5VIN AND 3VIN MAY BE USED AS SOURCES OF EARLY POWER PCI BRIDGE (21154) 1644 F11 Figure 11. No VEE (-12V) Supply Application Circuit BACKPLANE CONNECTOR 3.3V PCB EDGE BACKPLANE CONNECTOR C8 0.1F PER 10 POWER PINS 3VIN R1 0.005 Q1 IRF7413 3VOUT R21 1.74 LONG 3.3V R3 10 C6 Z3 0.01F 13 5VIN 8 GROUND GND 14 5VSENSE 17 3VIN 16 3VSENSE 15 GATE R5 1k 18 3 3VOUT 5VOUT C1 0.047F LTC1644* 1644 F12 Z3: 1PMT5.0AT3 *ADDITIONAL PINS OMITTED FOR CLARITY Figure 12. No 5V Supply Application Circuit 1644f 19 LTC1644 U U W U APPLICATIO S I FOR ATIO BACKPLANE CONNECTOR C9 0.1F PER 10 POWER PINS 5VIN PCB EDGE BACKPLANE CONNECTOR 5V R2 0.007 5VOUT R22 2.74 D1 LONG 5V C6 Z4 0.01F R4 10 NC D2 17 3VIN 8 GROUND Q2 IRF7413 16 3VSENSE 13 5VIN GND 14 R5 1k 3 18 5VOUT 3VOUT 15 GATE 5VSENSE C1 0.047F LTC1644* 1644 F13 D1, D2: BAV99 Z4: 1PMT5.0AT3 *ADDITIONAL PINS OMITTED FOR CLARITY Figure 13. No 3.3V Supply Application Circuit 5VIN BACKPLANE CONNECTOR PCB EDGE BACKPLANE CONNECTOR PUSHBUTTON SWITICH 100 BD_SEL# 1.2k 1k 5 OFF/ON LTC1644* GROUND 8 *ADDITIONAL PINS OMITTED FOR CLARITY GND 1644 F14 Figure 14. BD_SEL# Pushbutton Toggle Switch restricts the choice of power MOSFETs to those devices with very low RDS(ON). Table 9 lists some power MOSFETs that can be used with the LTC1644. Power MOSFETs are classified into two categories: standard MOSFETs (RDS(ON) specified at VGS = 10V) and logiclevel MOSFETs (RDS(ON) specified at VGS = 5V). Since external pass transistors are required for the 3.3V and 5V supply rails, logic-level power MOSFETs should be used with the LTC1644. Overvoltage Transient Protection Good engineering practice calls for bypassing the supply rail of any analog circuit. Bypass capacitors are often placed at the supply connection of every active device, in addition to one or more large-value bulk bypass capacitors per supply rail. If power is connected abruptly, the large bypass capacitors slow the rate of rise of the supply voltage and heavily damp any parasitic resonance of lead or PC track inductance working against the supply bypass capacitors. The opposite is true for LTC1644 Hot Swap circuits mounted on plug-in cards. In most cases, there is no supply bypass capacitor present on the powered 12V (12VIN), -12V (VEEIN) of the PCB edge connector or on the 3.3V (3VIN) or the 5V (5VIN) side of the MOSFET switch. An abrupt connection, produced by inserting the board into a backplane connector, results in a fast rising edge applied on these input supply lines of the LTC1644. Since there is no bulk capacitance to damp the parasitic track inductance, supply voltage transients excite parasitic resonant circuits formed by the power MOSFET capacitance and the combined parasitic inductance from the wiring harness, the backplane and the circuit board traces. These ringing transients appear as a fast edge on the input supply lines, exhibiting a peak overshoot up to 2.5 times the steady-state value followed by a damped 1644f 20 LTC1644 U U W U APPLICATIO S I FOR ATIO sinusoidal response whose duration and period is dependent on the resonant circuit parameters. Since the absolute maximum supply voltage of the LTC1644 is 13.2V, transient protection against 12VIN and VEEIN supply voltage spikes and ringing is highly recommended. that in all LTC1644 circuit schematics, zener diodes and snubber networks have been added to the 12VIN and VEEIN (-12V) supply rail and should be used always. Since the absolute maximum supply voltage of the LTC1644 is 13.2V, snubber networks are not necessary on the 3VIN or the 5VIN supply lines. Zener diodes, however, are recommended as these devices provide large-scale transient protection for the LTC1644 against PCI backplane fault occurrences. All protection networks should be mounted very close to the LTC1644's supply voltage using short lead lengths to minimize lead inductance. This is shown schematically in Figures 15 and 16 and a recommended layout of the transient protection devices around the LTC1644 is shown in Figure 17. In these applications, there are two methods for eliminating these supply voltage transients: using Zener diodes to clip the transient to a safe level and snubber networks. Snubber networks are series RC networks whose time constants are experimentally determined based on the board's parasitic resonant circuits. As a starting point, the capacitors in these networks are chosen to be 10x to 100x the power MOSFET's COSS under bias. The series resistor is a value determined experimentally and ranges from 1 to 50, depending on the parasitic resonant circuit. Note R2 0.007 5VIN 5V R1 0.005 3VIN 3.3V Q2 IRF7413 Q1 IRF7413 3VOUT 3.3V R3 10 17 16 3VIN 5VOUT 5V 15 3VSENSE GATE R4 10 18 13 3VOUT Z3 5VIN 14 R5 1k C1 0.047F 3 5VOUT 5VSENSE Z4 LTC1644* GND Z3, Z4: 1PMT5.0AT3 *ADDITIONAL DETAILS OMITTED FOR CLARITY 8 1644 F15 Figure 15. Place Transient Protection Devices Close to LTC1644's 5VIN and 3VIN Pins 11 12 14 15 16 17 18 -12VIN 19 20 12VIN 13 5VIN 3VIN Z3 LTC1644* C4 8 1644 F16 Z1, Z2: SMAJ12CA *ADDITIONAL DETAILS OMITTED FOR CLARITY Figure 16. Place Transient Protection Devices Close to LTC1644's 12VIN and VEEIN Pins R13 Z2 Z1 12VIN 10 C5 0.01F 9 C5 R14 8 VIAS TO GND PLANE 7 GND Z2 6 LTC1644* R16 1 5 VEEIN 4 C4 0.01F 12VIN 3 R15 1 2 Z1 Z4 2 1 1 1644 F17 VEEIN GND *ADDITIONAL DETAILS OMITTED FOR CLARITY DRAWING IS NOT TO SCALE! Figure 17. Recommended Layout for Transient Protection Components 1644f 21 LTC1644 U W U U APPLICATIO S I FOR ATIO PCB Layout Considerations For proper operation of the LTC1644's circuit breaker operation, 4-wire Kelvin-sense connections between the sense resistor and the LTC1644's 5VIN and 5VSENSE pins and 3VIN and 3VSENSE pins are strongly recommended. The PCB layout should be balanced and symmetrical to minimize wiring errors. In addition, the PCB layout for the sense resistors and the power MOSFETs should include good thermal management techniques for optimal device power dissipation. A recommended PCB layout for the sense resistor, the power MOSFET and the GATE drive components around the LTC1644 is illustrated in Figure 18. In Hot Swap applications where load currents can be 10A, narrow PCB tracks exhibit more resistance than wider tracks and operate at more elevated temperatures. Since the sheet resistance of 1 ounce copper foil is approximately 0.45m/ , track resistances add up quickly in high current applications. Thus, to keep PCB track resistance and temperature rise to a minimum, the suggested trace width in these applications for 1 ounce copper foil is 0.03" for each ampere of DC current. In the majority of applications, it will be necessary to use plated-through vias to make circuit connections from component layers to power and ground layers internal to the PC board. For 1 ounce copper foil plating, a general rule is 1 ampere of DC current per via, making sure the via is properly dimensioned so that solder completely fills any void. For other plating thicknesses, check with your PCB fabrication facility. Table 7. Manufacturers' Web Site MANUFACTURER International Rectifier ON Semiconductor IRC-TT WEB SITE www.irf.com www.onsemi.com www.irctt.com Vishay-Dale www.vishay.com Vishay-Siliconix www.vishay.com Diodes, Inc. www.diodes.com Obtaining Information on Specific Parts For more information regarding or to request a copy of the CompactPCI specification, contact the PCI Industrial Computer Manufacturers Group at: PCI Industrial Computer Manufacturers Group Wakefield, MA 01880 USA Phone: 01 (617) 224-1100 Web Site: http://www.picmg.com TransZorb SMAJ12CA and diodes BAV99 are supplied by: Diodes, Incorporated Westlake Village, CA 91362 USA Phone: 01 (805) 446-4800 Web Site: http://www.vishay-liteon.com or http://www.diodes.com Transistors MMBT2222A and TVS 1PMT5.0AT3 are supplied by: Semiconductor Components Industries, LLC Phoenix, AZ 85008 USA Phone: 01 (602) 244-6600 Web Site: http://www.onsemi.com Power MOSFET and Sense Resistor Selection Table 8 lists some current sense resistors that can be used the LTC1644's circuit breakers and Table 9 list some power MOSFET transistors that are available. Table 7 lists supplier web site addresses for discrete component mentioned throughout the LTC1644 data sheet. 1644f 22 LTC1644 U U W U APPLICATIO S I FOR ATIO Table 8. Sense Resistor Selection Guide CURRENT LIMIT VALUE PART NUMBER DESCRIPTION MANUFACTURER 1A LR120601R055F WSL1206R055 0.055, 0.5W, 1% Resistor IRC-TT Vishay-Dale 2A LR120601R028F WSL1206R028 0.028, 0.5W, 1% Resistor IRC-TT Vishay-Dale 5A LR120601R011F WSL2010R011 0.011, 0.5W, 1% Resistor IRC-TT Vishay-Dale 7.6A WSL2512R007 0.007, 1W, 1% Resistor Vishay-Dale 10A WSL2512R005 0.005, 1W, 1% Resistor Vishay-Dale Table 9. N-Channel Power MOSFET Selection Guide CURRENT LEVEL (A) PART NUMBER DESCRIPTION MANUFACTURER 0 to 2 MMDF3N02HD RDS(ON) = 0.1 Dual N-Channel SO-8 ON Semiconductor 2 to 5 MMSF5N02HD RDS(ON) = 0.025 Single N-Channel SO-8 ON Semiconductor 5 to 10 MTB50N06V RDS(ON) = 0.028 Single N-Channel DD Pak ON Semiconductor 5 to 10 IRF7413 RDS(ON) = 0.01 Single N-Channel SO-8 International Rectifier 5 to 10 Si4410DY RDS(ON) = 0.01 Single N-Channel SO-8 Vishay-Siliconix U PACKAGE DESCRIPTIO GN Package 20-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .337 - .344* (8.560 - 8.737) .045 .005 20 19 18 17 16 15 14 13 12 .254 MIN .150 - .165 .0165 .0015 11 .229 - .244 (5.817 - 6.198) .058 (1.473) REF .150 - .157** (3.810 - 3.988) .0250 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .015 .004 x 45 (0.38 0.10) .007 - .0098 (0.178 - 0.249) 2 3 4 5 6 7 8 .053 - .068 (1.351 - 1.727) 9 10 .004 - .0098 (0.102 - 0.249) 0 - 8 TYP .016 - .050 (0.406 - 1.270) .008 - .012 (0.203 - 0.305) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .0250 (0.635) BSC 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE GN20 (SSOP) 0502 1644f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC1644 U U W U APPLICATIO S I FOR ATIO CURRENT FLOW TO LOAD 3VIN 3.3V CURRENT FLOW TO LOAD SENSE RESISTOR SO-8 W D G D S D S D S VIA/PATH TO GND R3 TRACK WIDTH W: 0.03" PER AMPERE ON 1OZ Cu FOIL 3VOUT 3.3V W GATE R5 12 11 10 13 9 14 8 15 7 16 17 18 19 20 C1 6 5 4 3 2 1 LTC1644* CTIMER CURRENT FLOW TO SOURCE VIA TO GND PLANE W GND *ADDITIONAL DETAILS OMITTED FOR CLARITY DRAWING IS NOT TO SCALE! GND 1644 F18 Figure 18. Recommended Layout for Power MOSFET, Sense Resistor and GATE Components for the 3.3V Rail RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1421 Hot Swap Controller Dual Supplies from 3V to 12V, Additionally -12V LTC1422 Hot Swap Controller in SO-8 Single Supply from 3V to 12V, RESET Output LT1640AL/LT1640AH Negative Voltage Hot Swap Controllers in SO-8 Negative High Voltage Supplies from -10V to - 80V LT1641-1/LT1641-2 Positive Voltage Hot Swap Controller in SO-8 Supplies from 9V to 80V, Latch Off/Autoretry LTC1642 Fault Protected Hot Swap Controller 3V to 15V, Overvoltage Protection Up to 33V LTC1643AL/LTC1643AL-1/LTC1643AH PCI Bus Hot Swap Controllers 3.3V, 5V, 12V, -12V Supplies for PCI Bus LTC1645 2-Channel Hot Swap Controller Operates from 1.2V to 12V, Power Sequencing LTC1646 Dual CompactPCI Hot Swap Controller 3.3V, 5V Supplies Only, 1V Precharge, PCI Reset Logic LTC1647 Dual Hot Swap Controller Dual ON Pins for Supplies from 3V to 15V LTC4211 Hot Swap Controller with Multifunction Current Control Single Supply, 2.5V to 16.5V, MSOP LTC4230 Triple Hot Swap Controller 1.7V to 16.5V Operation, Multifunction Current Control LT4250 - 48V Hot Swap Controller in SO-8 - 20V to - 80V, Active Current Limiting LTC4251 - 48V Hot Swap Controller in SOT-23 Floating Supply, Active Current Limiting and Fast Circuit Breaker 1644f 24 Linear Technology Corporation LT/TP 0203 2K * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2001