VCNL4040M3OE-H5 - Vishay Semiconductors

VCNL4040

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Fully Integrated Proximity and Ambient Light Sensor with

Infrared Emitter, I2C Interface, and Interrupt Function

DESCRIPTION

VCNL4040 integrates a proximity sensor (PS), ambient

light sensor (ALS), and a high power IRED into one small

package. It incorporates photodiodes, amplifiers, and

analog to digital converting circuits into a single chip by

CMOS process. The 16-bit high resolution ALS offers

excellent sensing capabilities with sufficient selections to

fulfill most applications whether dark or high transparency

lens design. High and low interrupt thresholds can be

programmed for both ALS and PS, allowing the component

to use a minimal amount of the microcontrollers resources.

The proximity sensor features an intelligent cancellation

scheme, so that cross talk phenomenon is eliminated

effectively. To accelerate the PS response time, smart

persistence prevents the misjudgment of proximity sensing

but also keeps a fast response time. In active force mode, a

single measurement can be requested, allowing another

good approach for more design flexibility to fulfill different

kinds of applications with more power saving.

The patented FiltronTM technology achieves ambient light

spectral sensitivity closest to real human eye response and

offers the best background light cancellation capability

(including sunlight) without utilizing the microcontrollers’

resources. VCNL4040 provides an excellent temperature

compensation capability for keeping output stable under

various temperature configurations. ALS and PS functions

are easily set via the simple command format of I2C (SMBus

compatible) interface protocol. Operating voltage ranges

from 2.5 V to 3.6 V. VCNL4040 is packaged in a lead-free

8-pin molding package, which offers the best

market-proven reliability quality.

FEATURES

• Package type: surface mount

• Dimensions (L x W x H in mm): 4.0 x 2.0 x 1.1

• Integrated modules: infrared emitter (IRED),

ambient light sensor (ALS), proximity sensor

(PS), and signal conditioning IC

• Operates ALS and PS in parallel structure

•Filtron

TM technology adoption for robust

background light cancellation

• Temperature compensation: -40 °C to +85 °C

• Low power consumption I2C (SMBus compatible)

interface

• Floor life: 168 h, MSL 3, according to J-STD-020

• Output type: I2C bus (ALS / PS)

• Operation voltage: 2.5 V to 3.6 V

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

PROXIMITY FUNCTION

• Immunity to red glow (940 nm IRED)

• Programmable IRED sink current

• Intelligent cancellation to reduce cross talk phenomenon

• Smart persistence scheme to reduce PS response time

• Selectable for 12- / 16-bit PS output data

AMBIENT LIGHT FUNCTION

• High accuracy of ALS ±10 %

• Fluorescent light flicker immunity

• Spectrum close to real human eye responses

• Selectable maximum detection range (819 / 1638 / 3277 /

6553) lux with highest sensitivity 0.0125 lux/step

INTERRUPT

• Programmable interrupt function for ALS and PS with

upper and lower thresholds

• Adjustable persistence to prevent false triggers for ALS

and PS

APPLICATIONS

• Handheld device

• Notebook, tablet PC

• Consumer device

• Industrial application

VCNL4040

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Note

(1) Adjustable through I2C interface

Note

(1) MOQ: minimum order quantity

PRODUCT SUMMARY

PART

NUMBER

OPERATING

RANGE

(mm)

OPERATING

VOLTAGE

RANGE

(V)

I2C BUS

VOLTAGE

RANGE

(V)

IRED PULSE

CURRENT (1)

(mA)

AMBIENT

LIGHT

RANGE

(lx)

AMBIENT

LIGHT

RESOLUTION

(lx)

OUTPUT

CODE

ADC RESOLUTION

PROXIMITY /

AMBIENT LIGHT

VCNL4040 0 to 200 2.5 to 3.6 1.8 to 3.6 200 0.0125 to 6553 0.0125 16 bit, I2C 16 bit / 16 bit

ORDERING INFORMATION

ORDERING CODE PACKAGING VOLUME (1) REMARKS

VCNL4040M3OE

Tape and reel

MOQ: 2500 pcs 4.0 mm x 2.0 mm x 1.1 mm

VCNL4040M3OE-H3 MOQ: 1500 pcs 4.34 mm x 2.35 mm x 3.25 mm

VCNL4040M3OE-H5 4.34 mm x 2.35 mm x 3.65 mm

ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT

Supply voltage VDD 2.5 3.6 V

Operation temperature range Tamb -40 +85 °C

Storage temperature range Tstg -40 +100 °C

RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT

Supply voltage VDD 2.5 3.6 V

Operation temperature range Tamb -40 +85 °C

I2C bus operating frequency f(I2CCLK) 10 400 kHz

PIN DESCRIPTIONS

PIN ASSIGNMENT SYMBOL TYPE FUNCTION

1 GND I Ground

2 CATHODE I Cathode (sensor) connection

DD I Power supply input

4ANODEIAnode for IRED

5 CATHODE I Cathode (LED) connection

6 INT O Interrupt pin

7 SDAT I / O (open drain) I2C data bus data input / output

8SCLKII

2C digital bus clock input

VCNL4040

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BLOCK DIAGRAM

Notes

(1) Test condition: VDD = 3.3 V, temperature: 25 °C

(2) Maximum detection range to ambient light can be determined by ALS refresh time adjustment. Refer to table “ALS Resolution and Maximum

Detection Range”

(3) Based on IRED on / off duty ratio = 1/40, 1/80, 1/160, and 1/320

BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT

Supply voltage VDD 2.5 3.6 V

Supply current Excluded LED driving IDD 300 μA

Light condition = dark, VDD = 3.3 V IDD (SD) 0.2 μA

I2C supply voltage VPULL UP 1.8 3.6 V

ALS shut down ALS disable, PS enable IALSSD 200 μA

PS shut down ALS enable, PS disable IPSSD 260 μA

I2C signal input

Logic high VDD = 3.3 V VIH 1.55 V

Logic low VIL 0.4

Logic high VDD = 2.6 V VIH 1.4 V

Logic low VIL 0.4

Peak sensitivity wavelength of

ALS λp550 nm

Peak sensitivity wavelength of PS λpps 940 nm

Full ALS counts 16-bit resolution 65 535 steps

Full PS counts 12-bit / 16-bit resolution 4096 / 65 535 steps

ALS sensing tolerance White LED light source ± 10 %

Detectable

intensity

Minimum IT = 640 ms, 1 step (1)(2) 0.0125 lx

Maximum IT = 80 ms, 65 535 step (1)(2) 6553

ALS dark offset IT = 80 ms, normal sensitivity (1) 03steps

PS detection range Kodak white card 0 200 mm

Operating temperature range Tamb -40 +85 °C

Cathode (sensor) voltage 2.5 3.6 V

IRED driving current (3) 200 mA

GND

Low Pass Filter

Temperature

Sensor

C Bus Logic

Control ALS

16 bits

Data

Buffer

ALS

DSP

PD Timing

Controller

Oscillator LED Driver

Buffer

LED_CATHODE

SCLK

SDAT

INT

Anode

IR LED

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Fig. 1 - I2C Bus Timing Diagram

I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER SYMBOL STANDARD MODE FAST MODE UNIT

MIN. MAX. MIN. MAX.

Clock frequency f(SMBCLK) 10 100 10 400 kHz

Bus free time between start and stop condition t(BUF) 4.7 1.3 μs

Hold time after (repeated) start condition;

after this period, the first clock is generated t(HDSTA) 4.0 0.6 μs

Repeated start condition setup time t(SUSTA) 4.7 0.6 μs

Stop condition setup time t(SUSTO) 4.0 0.6 μs

Data hold time t(HDDAT) 3450 900 ns

Data setup time t(SUDAT) 250 100 ns

I2C clock (SCK) low period t(LOW) 4.7 1.3 μs

I2C clock (SCK) high period t(HIGH) 4.0 0.6 μs

Clock / data fall time t(F) 300 300 ns

Clock / data rise time t(R) 1000 300 ns

VIH

t(LOW)

VIL

t(R)

t(HDSTA)

t(BUF)

VIL

t(HDDAT)

t(F)

t(HIGH) t(SUSTA)

t(SUDAT)

t(SUSTO)

{{

Stop Condition

Star Condition

{{

t(LOSEXT)

t(LOWMEXT)

SCLK

ACK

SDA

ACK

Start Stop

t(LOWMEXT)

I2C bus

CLOCK

(SCLK)

I2C bus

DATA

(SDAT)

I2C bus

CLOCK

(SCLK)

I2C bus

DATA

(SDAT)

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PARAMETER TIMING INFORMATION

Fig. 2 - I2C Bus Timing for Sending Word Command Format

Fig. 3 - I2C Bus Timing for Receiving Word Command Format

SA6 SA5 SA4 SA3 SA2 SA1SA7

I2CBus Slave Address Byte

Start by

Master

ACK by

SA6 SA5 SA4 SA3 SA2 SA0

SA7

Command Code

SA1

ACK by

SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

ACK by

SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

Stop by

Master

ACK by

Data Byte Low Data Byte High

I2C bus

CLOCK

(SCLK)

I2C bus

DATA

(SDAT)

I2C bus

CLOCK

(SCLK)

I2C bus

DATA

(SDAT)

VCNL4040

I2CBus

CLOCK

(SCLK)

I2CBus

DATA

(SDAT)

SA6 SA5 SA4 SA3 SA2 SA1SA7

I2CBus Slave Address Byte

Start by

Master

ACK by

SA6 SA5 SA4 SA3 SA2 SA0

SA7

Command Code

SA1

ACK by

SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

Stop by

Master

ACK by

Master

Data Byte High

I2CBus

CLOCK

(SCLK)

I2CBus

DATA

(SDAT)

I2CBus

CLOCK

(SCLK)

I2CBus

DATA

(SDAT)

SA6 SA5 SA4 SA3 SA2

I2CBus Slave Address Byte

Start by

Master

ACK by

SA6 SA5 SA4 SA3 SA2 SA0

SA7

Data Byte Low

SA1

ACK by

Master

SA1

SA7

VCNL4040

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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

Fig. 4 - Normalized Spectral Response

Fig. 5 - Forward Current IF = f (VF)

Fig. 6 - ALS Refresh Time vs. Maximum Detection Range

Fig. 7 - IDD vs.Temperature

Fig. 8 - ALS View Angle

Fig. 9 - White Channel Spectral Response

100

1000

10000

100

400 500 600 700 800 900 1000

Axis Title

1st line

2nd line

Normalized Output (%)

λ- Wavelength (nm)

2nd line

PS-CH

ALS-CH

100

1000

10000

10 000

20 000

30 000

40 000

50 000

60 000

70 000

0 2000 4000 6000 8000 10 000

Axis Title

1st line

2nd line

Step

1st line

Lux

2nd line

80 ms

160 ms

320 ms

640 ms

100

1000

10000

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

400 500 600 700 800 900 1000

Axis Title

1st line

2nd line

Normalized Output

1st line

Wavelength (nm)

2nd line

VCNL4040

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Fig. 10 - IRED Profile

APPLICATION INFORMATION

Pin Connection with the Host

VCNL4040 integrates proximity sensor, ambient light Sensor, and IRED all together with I2C interface. It is very easy for the

baseband (CPU) to access PS and ALS output data via I2C interface without extra software algorithms. The hardware schematic

is shown in the following diagram.

Two additional capacitors in the circuit can be used for the following purposes: (1) the 0.1 μF capacitor near the VDD pin is used

for power supply noise rejection, (2) the 2.2 μF capacitor - connected to the anode - is used to prevent the IRED voltage from

instantly dropping when the IRED is turned on, and (3) 2.2 kΩ is suitable for the pull up resistor of I2C except for the 8.2 kΩ

applied on the INT pin.

Note

• Cathode (LED) and cathode (sensor): pins need to be connected together externally

Fig. 11 - Hardware Pin Connection Diagram

Baseband

INT INT

SCLK

CATHODE

(Sensor)

0.1uF

GND

SDAT

SCK

SDA

2.2KΩ2.2KΩ

DD_LED

2.2uF

8.2KΩ

Pull_up

CATHODE

(LED)

Anode

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Digital Interface

VCNL4040 applies single slave address 0x60 (HEX) of 7-bit addressing following I2C protocol. As figure 12 shows, VCNL4040’s

I2C command format is simple for read and write operations between VCNL4040 and the host. The white sections indicate host

activity and the gray sections indicate VCNL4040’s acknowledgement of the host access activity. Write word and read word

protocol is suitable for accessing registers particularly for 16-bit data ALS and 12-bit / 16-bit PS data. Interrupt can be cleared

by reading data out from register: INT_Flag. All command codes should follow read word and write word protocols.

Fig. 12 - Write Word and Read Word Protocol

Function Description

VCNL4040 applies a 16-bit high resolution ALS that provides the best ambient light sensing capability down to 0.01 lux/step

which works well under a low transmittance lens design (dark lens). A flexible interrupt function of ALS (register: ALS_CONF)

is also supported. The INT signal will not be triggered by VCNL4040 if the ALS value is not over high INT threshold window level,

or lower than low INT threshold window level of ALS. VCNL4040 detects different light sources such as fluorescent light,

incandescent light, sunlight, and white LED with high accuracy ALS data output after detecting algorithm is implemented.

For proximity sensor function, VCNL4040 supports different kinds of mechanical designs to achieve the best proximity detection

performance for any color of object with more flexibility. The basic PS function settings, such as duty ratio, integration time,

interrupt, and PS enable / disable, and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS response

time. Integration time represents the duration of the energy being received. The interrupt is triggered when the PS detection

levels over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the interrupt

function is enabled, the host can react to the interrupt pin, instead of polling the PS data registers. The INT flag (register:

INT_Flag) indicates the type of interrupt that has been triggered, depending on the interrupt settings in the configuration

registers. PS persistence (PS_PERS) sets up the PS INT trigger conditions, defining the amount of consecutive hits required

before an interrupt event occurs. The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk

phenomenon.

VCNL4040 also supports an easy to use proximity detection logic mode, that triggers when the PS high threshold is exceeded

and automatically resets the interrupt pin when the proximity reading falls beneath the PS low threshold. This functionality can

be set in the register: PS_MS. A smart persistence is provided to be able to prevent false PS interrupt trigger events.

Descriptions of each of these parameters are shown in table 1.

SSlave Address

A Command Code A Data Byte Low AData Byte High A

17 811 1 818

Send Byte ɦWrite Command to VCNL4040

Slave Address

A Command Code A S Slave Address

AData Byte Low AData Byte High A P

11 8 11711818 11

Receive Byte ɦRead Data from VCNL4040

S = start condition

P = stop condition

A = acknowledge

Shaded area = VCNL4040 acknowledge

VCNL4040

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Note

• All of reserved register are used for internal test. Please keep as default setting.

Command Register Format

VCNL4040 provides an 8-bit command register for ALS and PS controlling independently. The description of each command

format is shown in following tables.

TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION

COMMAND

CODE

DATE BYTE

LOW / HIGH

NAME R / W DEFAULT

VALUE FUNCTION DESCRIPTION

0x00 L ALS_CONF R / W 0x01 ALS integration time, persistence, interrupt, and function enable / disable

H Reserved R / W 0x00 Reserved

0x01 L ALS_THDH_L R / W 0x00 ALS high interrupt threshold LSB byte

H ALS_THDH_M R / W 0x00 ALS high interrupt threshold MSB byte

0x02 L ALS_THDL_L R / W 0x00 ALS low interrupt threshold LSB byte

H ALS_THDL_M R / W 0x00 ALS low interrupt threshold MSB byte

0x03 L PS_CONF1 R / W 0x01 PS duty ratio, integration time, persistence, and PS enable / disable

H PS_CONF2 R / W 0x00 PS output resolution selection, PS interrupt trigger method

0x04

L PS_CONF3 R / W 0x00 PS smart persistence, active force mode

H PS_MS R / W 0x00 White channel enable / disable, PS mode selection, PS protection setting,

and LED current selection

0x05 L PS_CANC_L R / W 0x00 PS cancellation level setting

H PS_CANC_M R / W 0x00 PS cancellation level setting

0x06 L PS_THDL_L R / W 0x00 PS low interrupt threshold setting LSB byte

H PS_THDL_M R / W 0x00 PS low interrupt threshold setting MSB byte

0x07 L PS_THDH_L R / W 0x00 PS high interrupt threshold setting LSB byte

H PS_THDH_M R / W 0x00 PS high interrupt threshold setting MSB byte

0x08 L PS_Data_L R 0x00 PS LSB output data

H PS_Data_M R 0x00 PS MSB output data

0x09 L ALS_Data_L R 0x00 ALS LSB output data

H ALS_Data_M R 0x00 ALS MSB output data

0x0A L White_Data_L R 0x00 White LSB output data

H White_Data_M R 0x00 White MSB output data

0x0B L Reserved R 0x00 Reserved

H INT_Flag R 0x00 ALS, PS interrupt flags

0x0C L ID_L R 0x86 Device ID LSB

H ID_M R 0x01 Device ID MSB

TABLE 2 - REGISTER: ALS_CONF DESCRIPTION

Command Bit76543210

Command Bit Description

ALS_IT 7 : 6 (0 : 0) = 80 ms; (0 : 1) = 160 ms; (1 : 0) = 320 ms; (1 : 1) = 640 ms

ALS integration time setting, longer integration time has higher sensitivity

Reserved 5 : 4 Default = (0 : 0)

ALS_PERS 3 : 2 (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8

ALS interrupt persistence setting

ALS_INT_EN 1 0 = ALS interrupt disable, 1 = ALS interrupt enable

ALS_SD 0 0 = ALS power on, 1 = ALS shut down, default = 1

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TABLE 3 - REGISTER: 00H_H DESCRIPTION

Command Bit Description

Reserved 7 : 0 Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0)

TABLE 4 - REGISTER ALS_THDH_L AND ALS_THDH_M DESCRIPTION

COMMAND CODE: 0x01_L (0x01 DATA BYTE LOW) OR 0x01_H (0x01 DATA BYTE HIGH)

ALS_THDH_L 7 : 0 0x00 to 0xFF, ALS high interrupt threshold LSB byte

ALS_THDH_M 7 : 0 0x00 to 0xFF, ALS high interrupt threshold MSB byte

TABLE 5 - REGISTER: ALS_THDL_L AND ALS_THDL_M DESCRIPTION

COMMAND CODE: 0x02_L (0x02 DATA BYTE LOW) AND 0x02_H(0x02 DATA BYTE HIGH)

ALS_THDL_L 7 : 0 0x00 to 0xFF, ALS low interrupt threshold LSB byte

ALS_THDL_M 7 : 0 0x00 to 0xFF, ALS low interrupt threshold MSB byte

TABLE 6 - REGISTER: PS_CONF1 DESCRIPTION

Command Bit Description

PS_Duty 7 : 6 (0 : 0) = 1/40, (0 : 1) = 1/80, (1 : 0) = 1/160, (1 : 1) = 1/320

PS IRED on / off duty ratio setting

PS_PERS 5 : 4 (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4

PS interrupt persistence setting

PS_ IT 3 : 1 (0 : 0 : 0) = 1T, (0 : 0 : 1) = 1.5T, (0 : 1 : 0) = 2T, (0 : 1 : 1) = 2.5T, (1 : 0 : 0) = 3T, (1 : 0 : 1) = 3.5T,

(1 : 1 : 0) = 4T, (1 : 1 : 1) = 8T, PS integration time setting

PS_SD 0 0 = PS power on, 1 = PS shut down, default = 1

TABLE 7 - REGISTER: PS_CONF2 DESCRIPTION

Command Bit Description

Reserved 7 : 6 (0 : 0), reserved

Reserved 5 : 4 (0 : 0), reserved

PS_HD 3 0 = PS output is 12 bits; 1 = PS output is 16 bits

Reserved 2 Default = 0

PS_INT 1 : 0 (0 : 0) = interrupt disable, (0 : 1) = trigger when close, (1 : 0)= trigger when away,

(1 : 1)= trigger when close or away

TABLE 8 - REGISTER: PS_CONF3 DESCRIPTION

Command Bit Description

Reserved 7 0

Reserved 6 : 5 (0 : 0)

PS_SMART_PERS 4 0 = disable; 1 = enable PS smart persistence

PS_AF 3 0 = active force mode disable (normal mode), 1 = active force mode enable

PS_TRIG 2

0 = no PS active force mode trigger, 1 = trigger one time cycle

VCNL4040 output one cycle data every time host writes in ‘1’ to sensor.

The state returns to ‘0’ automatically.

Reserved 1 : 0 (0 : 0)

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TABLE 9 - REGISTER: PS_MS DESCRIPTION

Command Bit Description

White_EN 7 0 = white channel enabled

1 = white channel disabled

PS_MS 6

0 = proximity normal operation with interrupt function

1 = proximity detection logic output mode enable

Reserved 5 : 3 ( 0 : 0 : 0 )

LED_I 2 : 0

(0 : 0 : 0) = 50 mA; (0 : 0 : 1) = 75 mA; (0 : 1 : 0) = 100 mA; (0 : 1 : 1) = 120 mA

(1 : 0 : 0) = 140 mA; (1 : 0 : 1) = 160 mA; (1 : 1 : 0) = 180 mA; (1 : 1 : 1) = 200 mA

LED current selection setting

TABLE 10 - REGISTER PS_CANC_L AND PS_CANC_M DESCRIPTION

COMMAND CODE: 0x05_L (0x05 DATA BYTE LOW) AND 0x05_H(0x05 DATA BYTE HIGH)

PS_CANC_L 7 : 0 0x00 to 0xFF, PS cancellation level setting_LSB byte

PS_CANC_M 7 : 0 0x00 to 0xFF, PS cancellation level setting_MSB byte

TABLE 11 - REGISTER: PS_THDL_L AND PS_THDL_M DESCRIPTION

COMMAND CODE: 0x06_L (0x06 DATA BYTE LOW) AND 0x06_H(0x06 DATA BYTE HIGH)

PS_THDL_L 7 : 0 0x00 to 0xFF, PS interrupt low threshold setting_LSB byte

PS_THDL_M 7 : 0 0x00 to 0xFF, PS interrupt low threshold setting_MSB byte

TABLE 12 - REGISTER: PS_THDH_L AND PS_THDH_M DESCRIPTION

COMMAND CODE: 0x07_L (0x07 DATA BYTE LOW) AND 0x07_H(0x07 DATA BYTE HIGH)

PS_THDH_L 7 : 0 0x00 to 0xFF, PS interrupt high threshold setting_LSB byte

PS_THDH_M 7 : 0 0x00 to 0xFF, PS interrupt high threshold setting_MSB byte

TABLE 13 - READ OUT REGISTER DESCRIPTION

PS_Data_L 0x08_L (0x08 data byte low) 7 : 0 0x00 to 0xFF, PS LSB output data

PS_Data_M 0x08_H (0x08 data byte high) 7 : 0 0x00 to 0xFF, PS MSB output data

ALS_Data_L 0x09_L (0x09 data byte low) 7 : 0 0x00 to 0xFF, ALS LSB output data

ALS_Data_M 0x09_H (0x09 data byte high) 7 : 0 0x00 to 0xFF, ALS MSB output data

White_Data_L 0x0A_L (0x0A data byte low) 7 : 0 0x00 to 0xFF, white LSB output data

White_Data_M 0x0A_H (0x0A data byte high) 7 : 0 0x00 to 0xFF, white LSB output data

Reserved 0x0B_L (0x0B data byte low) 7 : 0 Default = 0x00

INT_Flag 0x0B_H (0x0B data byte high)

Reserved

PS_SPFLAG, PS entering protection mode

ALS_IF_L, ALS crossing low THD INT trigger event

ALS_IF_H, ALS crossing high THD INT trigger event

Reserved

PS_IF_CLOSE, PS rises above PS_THDH INT trigger event

PS_IF_AWAY, PS drops below PS_THDL INT trigger event

ID_L 0CH_L (0CH data byte low) 7 : 0 86H for MP version sample, device ID LSB byte

ID_M 0CH_H (0CH data byte high)

7 : 6

5 : 4

3 : 0

(0 : 0)

(0 : 0) Slave address = 0x60 (7-bit)

Version code (0 : 0 : 0 : 1), device ID MSB byte

VCNL4040

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Adjustable Sampling Time

VCNL4040’s LED driver drives the internal IRED with the “LED CATHODE” pin by a pulsed duty cycle. The IRED on / off duty

ratio can be set in register: PS_Duty which is related to the current consumption and PS response time. The higher the duty

ratio, the faster the response time achieved with higher power consumption. For example, PS_Duty = 1/320, peak IRED current

= 100 mA, averaged current consumption is 100 mA/320 = 0.3125 mA.

Initialization

VCNL4040 includes default values for each register. As long as power is on, it is ready to be controlled by host via I2C bus.

Threshold Window Setting

• ALS Threshold Window Setting (Applying ALS INT)

ALS_THDL_L and ALS_THDL_M defines 16-bit ALS low threshold data for LSB byte and MSB byte. As long as ALS INT

function is enabled, INT will be triggered once the ALS data exceeds ALS_THDH or goes below ALS_THDL. To easily define

the threshold range, multiply the value of the resolution (lux/step) by the threshold level (refer to table 14).

•ALS Persistence

The ALS INT is triggered once the ALS value is higher or lower than the threshold window. The ALS_PERS (1, 2, 4, 8 times)

parameter, sets the amount of consecutive hits needed, in order for an interrupt event to trigger.

• Programmable PS Threshold

VCNL4040 provides both high and low thresholds setting for PS (register: PS_THDL, PS_THDH).

•PS Persistence

The PS persistence function (PS_PERS, 1, 2, 3, 4) helps to avoid false trigger of the PS INT. It defines the amount of

consecutive hits needed in order for a PS interrupt event to be triggered.

• PS Active Force mode

An extreme power saving way to use PS is to apply PS active force (register: PS_CONF3 command: PS_AF = 1) mode.

Anytime host would like to request one proximity measurement, write a ‘1’ into register: PS_CONF3 command: PS_Trig. This

triggers a single PS measurement, which can be read from the PS result registers. VCNL4040 stays in standby mode

constantly.

Data Access

All of VCNL4040 16 bit command registers are readable. The result data for ALS, white, and PS measurements can be read out

form their respective registers. Each result is made of 2 bytes.

Intelligent Cancellation

VCNL4040 provides an intelligent cancellation method to reduce cross talk phenomenon for the proximity sensor. The output

data will be subtracted by the value set in register: PS_CANC.

TABLE 14 - ALS RESOLUTION AND MAXIMUM DETECTION RANGE

ALS_IT SENSITIVITY MAXIMUM DETECTION

RANGE

ALS_IT

(7 : 6)

INTEGRATION TIME

(typ.)

UNIT

(lux/step)

UNIT

(lux)

(0, 0) 80 ms 0.10 6553.5

(0, 1) 160 ms 0.05 3276.8

(1, 0) 320 ms 0.025 1638.4

(1, 1) 640 ms 0.0125 819.2

TABLE 15 - 16-BIT ALS DATA FORMAT

VCNL4040

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

VCNL4040

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Interruption (INT)

The VCNL4040 has an interrupt feature for both the PS and ALS channel. The purpose of the interrupt feature is to actively

inform the host once INT has been triggered. When the interrupt is enabled, the host does not need to continuously read the

data registers of the sensor, but instead can simply react to the interrupt pin. As long as the host enables ALS interrupt (register:

ALS_INT_EN) or PS interrupt (register: PS_INT) function, the level of INT pin (pin 6) is pulled low once an interrupt event has

been triggered. All registers are accessible even if INT is triggered.

ALS INT is triggered when ALS value crosses over the value set in register: ALS_THDH or below the value set by

register: ALS_THDL. PS INT is triggered when the PS value crosses over the value set in register: PS_THDH or falls below the

value set in register: PS_THDL. Which of these thresholds to react to, can be set by the PS_INT bits in the register: PS_CONF2.

Interruption Flag

Register: INT_Flag represents all of the interrupt trigger statuses for ALS and PS. If any of these flags trigger from “0” to “1”,

the INT pin will be pulled low. Once the host reads INT_Flag register, all the flags are cleared (reset to "0"), and the INT pin is

reset to high.

PROXIMITY DETECTION LOGIC OUTPUT MODE

VCNL4040 has a proximity detection logic mode, enabling the host to read the state of PS (near or far) simply by monitoring the

INT pin (pin 6). When this mode is selected, the INT pin is pulled low when an object is close to the sensor (value is above high

threshold) and is reset to high when the object moves away (value is below low threshold). Register: PS_THDH / PS_THDL

define where these threshold levels are set.

It should be noted that whenever the proximity detection logic mode has been enabled, the INT pin only reacts to proximity

interrupt events. If the host would like to use ALS INT function, the bit PS_MS in the register: PS_MS needs to be set to normal

operation mode (PS_MS = 0). In order for the proximity detection logic mode to function, one of the PS_INT bits in register:

PS_CONF2 must be enabled (“trigger when close”, “trigger when away”, or “trigger when close or away”). If PS_INT is set to

“INT Disable” the proximity detection logic mode will not function.

PROXIMITY DETECTION HYSTERESIS

A hysteresis is created by setting the low and high threshold values. With proximity detection logic mode disabled, an interrupt

event will trigger and stay triggered until it is cleared in the INT_Flag register. The register is cleared automatically once it is read.

If the interrupt flags are not cleared after an interrupt event has occurred, the VCNL4040 will not react to another interrupt event

until the INT-Flag register has been cleared. An example of this could be when turning on and off a backlight of a mobile display.

First the PS INT triggers when the PS value is over PS_THDH. The host switches off the panel backlight and then clears INT.

When PS value is less than PS_THDL, host switches on panel backlight.

Fig. 13 - VCNL4040 Reference Circuit Connection with Host (Proximity Detection Logic Output Mode)

(VCNL4040 INT pin connecting to BB GPIO instead of INT pin)

VDD

Baseband

GPIO INT

SCLK

CATHODE

(Sensor)

0.1uF

GND

SDAT

SCK

SDA

2.2KΩ2.2KΩ

VDD_LED

2.2uF

8.2KΩ

VPull_up

CATHODE

(LED)

Anode

VCNL4040

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Rev. 1.4, 02-Mar-15 14 Document Number: 84274

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PACKAGE INFORMATION (VCNL4040M3OE) in millimeters

Fig. 14 - VCNL4040 Package Dimensions

LAYOUT PAD INFORMATION (VCNL4040M3OE) in millimeters

Fig. 15 - VCNL4040M3OE PCB Layout Footprint

1.0751.0751.075

0.9

0.675 x 8

1.1 ± 0.05 0.5

0.75

0.85

0.55

2 ± 0.1

1.45

Ø1.2

Ø1.1

2.6

4 ± 0.1

LED

Sensor

GND

Cathode

VDD

Anode

Cathode

INT

SDAT

SCLK

(LED)

(sensor)

Top View Side View Bottom View

Pad Center to Center

1.4

PadC

ente r to Center

0.725 x 8

0.7 x 8

1.075

0.35

0.7

1.075

VCNL4040

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Rev. 1.4, 02-Mar-15 15 Document Number: 84274

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PACKAGE INFORMATION (VCNL4040M3OE-H3) in millimeters

Fig. 16 - VCNL4040M3OE-H3 Package Dimensions

PACKAGE INFORMATION (VCNL4040M3OE-H5) in millimeters

Fig. 17 - VCNL4040M3OE-H5 Package Dimensions

3.25 ± 0.2

4.34 ± 0.2

1.02

2.6

Ø1.2

Ø1.1

2.35 ± 0.2

1.0751.0751.075

0.7(x8)

10.575

0.8

GND

Cathode

Anode

Cathode

INT

SDAT

SCLK

(LED)

(sensor)

Side View

Top View Bottom View

3.65 ± 0.2

4.34 ± 0.2

1.022.6

Ø1.2

Ø1.1

2.35 ± 0.2

1.0751.0751.075

0.7(x8)

10.575

0.8

GND

Cathode

Anode

Cathode

INT

SDAT

SCLK

(LED)

(sensor)

Side View

Top View Bottom View

VCNL4040

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Rev. 1.4, 02-Mar-15 16 Document Number: 84274

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LAYOUT PAD INFORMATION (VCNL4040M3OE-H3, VCNL4040M3OE-H5) in millimeters

Fig. 18 - VCNL4040M3OE-H3 and H5 PCB Layout Footprint

LAYOUT NOTICE AND REFERENCE CIRCUIT

Pad and Circuit Layout Reference

Fig. 19 - Suggested VCNL4040 Layout

Pad Center to Center

1.7

Pad Cente r to Center

0.725 x 8

0.9 x 8

1.075

0.45

0.8

1.075

VCNL4040

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Rev. 1.4, 02-Mar-15 17 Document Number: 84274

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APPLICATION CIRCUIT BLOCK REFERENCE

Fig. 20 - VCNL4040 Application Circuit

(normal operation with interrupt function)

Fig. 21 - VCNL4040 Application Circuit

(VDD (sensor and LED) suggestion circuit)

VDD

Baseband

INT INT

SCLK

CATHODE

(LED)

0.1uF

GND

SDAT

SCK

SDA

2.2KΩ2.2KΩ

VDD_LED

2.2uF

8.2KΩ

CATHODE

(Sensor)

Anode

VCNL4040

Baseband

INT INT

SCLK

CATHODE

(LED)

1uF

GND

SDAT

SCK

SDA

2.2K

2.2 uF

8.2K

Pull_up

CATHODE

(Sensor)

Anode

22 ȟ

VCNL4040

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Rev. 1.4, 02-Mar-15 18 Document Number: 84274

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RECOMMENDED INFRARED REFLOW

Soldering conditions which are based on J-STD-020 C

Recommend Normal Solder Reflow is 235 °C to 265 °C

Fig. 22 - VCNL4040 Solder Reflow Profile Chart

RECOMMENDED STORAGE AND REBAKING CONDITIONS

PARAMETER CONDITIONS MIN. MAX. UNIT

Storage temperature 5 50 °C

Relative humidity 60 %

Open time 168 h

Total time From the date code on the aluminized envelope (unopened) 12 months

Rebaking Tape and Reel: 60 °C 22 h

Tube: 60 °C 22 h

IR REFLOW PROFILE CONDITION

PARAMETER CONDITIONS TEMPERATURE TIME

Peak temperature 260 °C + 5 °C / - 5 °C (max.: 265 °C) 10 s

Preheat temperature range and timing 150 °C to 200 °C 60 s to 180 s

Timing within 5 °C to peak temperature 10 s to 30 s

Timing maintained above temperature / time 217 °C 60 s to 150 s

Timing from 25 °C to peak temperature 8 minutes (max.)

Ramp-up rate 3 °C/s (max.)

Ramp-down rate 6 °C/s (max.)

200

150

217

260

Max. Temperature

260+5/-50C / 10 seconds

Soldering Zone

60-150 seconds

Temperature (ºC)

Time (second)

Ramp-up Rate

C / seconds

(max)

Ramp-down Rate

C / seconds

(max)

Ramp-up Rate

C / seconds

(max)

Pre-Heating Time

-t

= 60 - 180 secons

VCNL4040

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RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING

1. Solder the device with the following conditions:

1.1.Soldering temperature: 400 °C (max.)

1.2.Soldering time: 3 s (max.)

2. If the temperature of the method portion rises in addition to the residual stress between the leads, the possibility that an

open or short circuit occurs due to the deformation or destruction of the resin increases.

3. The following methods: VPS and wave soldering, have not been suggested for the component assembly.

4. Cleaning method conditions:

4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol

4.2.Solvent temperature < 45 °C (max.)

4.3.Time: 3 minutes (min.)

TAPE PACKAGING INFORMATION in millimeters

VCNL4040

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Rev. 1.4, 02-Mar-15 20 Document Number: 84274

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TAPE PACKAGING INFORMATION (VCNL4040M3OE-H3) in millimeters

VCNL4040

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Rev. 1.4, 02-Mar-15 21 Document Number: 84274

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TAPE PACKAGING INFORMATION (VCNL4040M3OE-H5) in millimeters

Footprint and Schematic Information

www.vishay.com Vishay Semiconductors

Rev. 1.0, 05-Oct-16 1Document Number: 84396

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Footprint and Schematic Information for VCNL4040

The footprint and schematic symbols for the following parts can be accessed using the link to the SnapEDA website. They are

available in Eagle, Altium, KiCad, OrCAD / Allegro, Pulsonix, and PADS.

Note that the 3D models for these parts can be found on the Vishay product page. The links are included here for convenience.

For technical issues and product support, please contact sensorstechsupport@vishay.com.

PART NUMBER FOOTPRINT / SCHEMATIC 3D MODEL

VCNL4040-M30E-H3 www.snapeda.com/parts/VCNL4040M3OE-H3/Vishay/view-part/ -

VCNL4040-M30E-H5 www.snapeda.com/parts/VCNL4040M3OE-H5/Vishay/view-part/ -

VCNL4040-M30E www.snapeda.com/parts/VCNL4040M3OE/Vishay/view-part/ www.vishay.com/doc?84352

Legal Disclaimer Notice

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Revision: 08-Feb-17 1Document Number: 91000

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