© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 0
1Publication Order Number:
NL17SH125/D
NL17SH125
Non-Inverting 3-State Buffer
The NL17SH125 MiniGatet is an advanced high−speed CMOS
non−inverting buffer in ultra−small footprint.
The NL17SH125 requires the 3−state control input (OE) to be set
High to place the output in the high impedance state.
The NL17SH125 input structures provide protection when voltages
up to 7.0 V are applied, regardless of the supply voltage.
Features
•High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V
•Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C
•Power Down Protection Provided on Inputs
•Balanced Propagation Delays
•These are Pb−Free and Halide−Free Devices
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
VCC
OE
IN A
OUT Y
GND
1
2
3
5
4
IN A OUT Y
EN
OE
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ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
PIN ASSIGNMENT
1
2
3OE
IN A
GND
4
5V
CC
OUT Y
MARKING
DIAGRAM
SOT−953
CASE 527AE
T = Specific Device Code
(Rotated 90°)
M = Month Code
FUNCTION TABLE
L
H
X
Input A Output Y
L
H
Z
Input OE
L
L
H
M
1
T
NL17SH125
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIN DC Input Voltage −0.5 to +7.0 V
VOUT DC Output Voltage −0.5 to VCC + 0.5 V
IIK DC Input Diode Current VIN < GND −20 mA
IOK DC Output Diode Current VOUT < GND, VOUT > VCC ±20 mA
IOUT DC Output Source/Sink Current ±12.5 mA
ICC DC Supply Current per Supply Pin ±25 mA
IGND DC Ground Current per Ground Pin ±25 mA
TSTG Storage Temperature Range −65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds 260 °C
TJJunction Temperature Under Bias +150 °C
MSL Moisture Sensitivity Level 1
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
VESD ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
>3000
>150
N/A
V
ILATCHUP Latchup Performance Above VCC and Below GND at 125°C (Note 5) ±100 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
VCC Positive DC Supply Voltage 1.65 5.5 V
VIN Digital Input Voltage 0.0 5.5 V
VOUT Output Voltage 0.0 VCC V
TAOperating Temperature Range −55 +125 °C
Dt / DVInput Transition Rise or Fail Rate VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
0
0
100
20
ns/V
NL17SH125
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3
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
VCC
(V)
TA = 255C TA v 855C*555C to 1255C
Unit
Min Typ Max Min Max Min Max
VIH High−Level Input
Voltage
1.65 to
2.0
0.75 x
VCC
0.75 x
VCC
V
2.3 to
5.5
0.70 x
VCC
0.70 x
VCC
VIL Low−Level Input
Voltage
1.65 to
2.0
0.25 x
VCC
0.25 x
VCC
0.25 x
VCC
V
2.3 to
5.5
0.30 x
VCC
0.30 x
VCC
0.30 x
VCC
VOH High−Level Output
Voltage
VIN = VIH or VIL
IOH = −50 mA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
VOL Low−Level Output
Voltage
VIN = VIH or VIL
IOL = 50 mA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
IIN Input Leakage Current 0 ≤ VIN ≤ 5.5 V 0 to 5.5 $0.1 $1.0 $1.0 mA
ICC Quiescent Supply
Current
0 ≤ VIN ≤ VCC 5.5 1.0 10 40 mA
IOZ 3−State Leakage
Current
VIN = VIH or VIL
VOUT = VCC or GND
0.0 $0.25 $2.5 $2.5 mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol Parameter
VCC
(V)
Test
Conditions
TA = 255C TA v 855C*555C to 1255C
Unit
Min Typ Max Min Max Min Max
tPLH,
tPHL
Propagation Delay,
A to Y
3.0 to 3.6 CL = 15 pF
CL = 50 pF
5.6
8.1
8.0
11.5
1.0
1.0
9.5
13.0
12.0
16.0
ns
4.5 to 5.5 CL = 15 pF
CL = 50 pF
3.8
5.3
5.5
7.5
1.0
1.0
6.5
8.5
8.5
10.5
tPZL,
tPZH
Output Enable Time,
OE to Y
3.0 to 3.6 CL = 15 pF
CL = 50 pF
5.4
7.9
8.0
11.5
1.0
1.0
9.5
13.0
11.5
15.0
ns
4.5 to 5.5 CL = 15 pF
CL = 50 pF
3.6
5.1
5.1
7.1
1.0
1.0
6.0
8.0
7.5
9.5
tPLZ,
tPHZ
Output Enable Time,
OE to Y
3.0 to 3.6 CL = 15 pF
CL = 50 pF
6.5
8.0
9.7
13.2
1.0
1.0
11.5
15.0
14.5
18.5
ns
4.5 to 5.5 CL = 15 pF
CL = 50 pF
4.8
7.0
6.8
8.8
1.0
1.0
8.0
10
10.0
12.0
CIN Input Capacitance 5.5 10 10 10 pF
CPD Power Dissipation
Capacitance (Note 6)
5.0 11 pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
NL17SH125
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ORDERING INFORMATION
Device Package Shipping†
NL17SH125P5T5G SOT−953
(Pb−Free)
8000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Figure 3. Switching Waveform Figure 4.
VCC
GND
50%
50% VCC
A or B
Y
tPHL tPLH
Figure 5. Test Circuit Figure 6. Test Circuit
Figure 7. Input Equivalent Circuit
DEVICE
UNDER
TEST CL*
*Includes all probe and jig capacitance.
OUTPUT
TEST POINT
DEVICE
UNDER
TEST CL*
*Includes all probe and jig capacitance.
Connect to VCC when
testing tPLZ and tPZL.
Connect to GND when
testing tPHZ and tPZH.
TEST POINT
1 kW
50%
50% VCC
50% VCC
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH − 0.3V
Y
Y
tPZL tPLZ
tPZH tPHZ
HIGH
IMPEDANCE
INPUT
NL17SH125
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5
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
E
D
C
A
HE
123
45
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM MIN NOM MAX
MILLIMETERS
A0.34 0.37 0.40
b0.10 0.15 0.20
C0.07 0.12 0.17
D0.95 1.00 1.05
E0.75 0.80 0.85
e0.35 BSC
L
0.95 1.00 1.05
HE
X
Y
PIN ONE
INDICATOR
b
5X
X0.08 Y
L
5X
L3
L2
e
5X
5X
L2 0.05 0.10 0.15
L3 −−− −−− 0.15
0.175 REF
TOP VIEW
SIDE VIEW
BOTTOM VIEW 1.20
DIMENSIONS: MILLIMETERS
0.20
5X
1
PACKAGE
OUTLINE
0.35
PITCH
0.35
5X
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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NL17SH125/D
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