S7033/S7034 series are families of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications.
S7033/S7034 series feature large full-well capacity in horizontal CCD register. By using the binning operation, S7033/S7034 series can be used
as a linear image sensor having a long height. This makes S7033/S7034 series ideally suited for use in spectrophotometry. The binning operation
offers significant improvement in S/N and signal processing speed compared with conventional methods by which signals are digitally added by
an external circuit.
S7033/S7034 series have an effective pixel size of 24 × 24 µm and are available in image areas ranging from 12.288 (H) × 2.928 (V) mm2
(S7033-0907, S7034-0907S) up to a large image area of 24.576 (H) × 2.928 (V) mm2 (S7033-1007, S7034-1007S).
Either one-stage or two-stage thermoelectric cooler is built into the package (S7034/S7035 series). At room temperature operation, the
device can be cooled down to -10 ˚C by one-stage cooler and -30 ˚C by two-stage cooler respectively without using any other cooling technique.
In addition since both the CCD chip and the thermoelectric cooler are hermetically sealed, no dry air is required, thus allowing easy handling.
Features
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Line, pixel binning
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Greater than 90 % quantum efficiency at peak sensitivity
wavelength
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Wide spectral range
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Wide dynamic range
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MPP operation
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Built-in thermoelectric cooler
Applications
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Fluorescence spectrometer, ICP
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Industrial inspection requiring
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Semiconductor inspection
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DNA sequencer
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Low-light-level detection
IMAGE SENSOR
CCD area image sensor
Back-thinned FFT-CCD
S7033/S7034 series
■ Selection guide
Type No. Cooling Number of total
pixels
Number of active
pixels
Active area
[mm (H) × mm (V)]
Suitable
multichannel
detector head
S7033-0907 532 × 128 512 × 122 12.288 × 2.928
S7033-1007
Non-cooled
1044 × 128 1024 × 122 24.576 × 2.928
C7043
S7034-0907S 532 × 128 512 × 122 12.288 × 2.928
S7034-1007S
One-stage
TE-cooled 1044 × 128 1024 × 122 24.576 × 2.928
C7044
Note) Two-stage TE-cooled type (S7035 series) is also available
■ General ratings
Parameter S7033 series S7034 series
Pixel size 24 (H) × 24 (V) µm
Vertical clock phase 2 phase
Horizontal clock phase 2 phase
Output circuit One-stage MOSFET source follower
Package 24 pin ceramic DIP (refer to dimensional outlines)
Built-in cooler - One-stage
Window *1 Quartz glass Sapphire glass
*1: Window-less is available upon request.
1
CCD area image sensor
S7033/S7034 series
■ Electrical characteristics (Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Signal output frequency fc - - 1 MHz
Charge transfer efficiency *2CTE 0.99995 0.99999 - -
DC output level *3Vout 12 15 18 V
Output impedance *3Zo - 3 - kΩ
Power consumption *3 *4P-15-mW
*2: Charge transfer efficiency per pixel, measured at half of the full well capacity.
*3: The values depend on the load resistance. (Typical, VOD=20 V, Load resistance=22 kΩ)
*4: Power consumption of the on-chip amplifier.
■ Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter Symbol Min. Typ. Max. Unit
Saturation output voltage Vsat - Fw × Sv - V
Vertical 150,000 300,000 -
Full well capacity Horizontal Fw 1,350,000 2,700,000 -e-
CCD node sensitivity Sv 0.5 0.6 - µV/e-
25 °C-4,000 12,000
Dark current *5
(MPP mode) 0 °CDS -200 600 e-/pixel/s
Readout noise *6Nr - 30 - e- rms
Line binning 22,500 90,000 -
Dynamic range *7
Area scanning DR 2,500 10,000 --
Photo response non-uniformity *8PRNU - ±3 ±10 %
Spectral response range λ-200 to 1100 -nm
*5: Dark current nearly doubles for every 5 to 7 °C increase in temperature.
*6: Operating frequency is 150 kHz.
*7: Dynamic range (DR)=Full well/Readout noise.
*8: Measured at the half of the full well capacity output.
■ Absolute maximum ratings (Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Operating temperature Topr -50 - +30 °C
Storage temperature Tstg -50 -+70 °C
OD voltage VOD -0.5 - +25 V
RD voltage VRD -0.5 -+18 V
ISV voltage VISV -0.5 - +18 V
ISH voltage VISH -0.5 -+18 V
IGV voltage VIG 1V, VIG 2V -10 - +15 V
IGH voltage VIG1H , VIG 2H -10 -+15 V
SG voltage VSG -10 - +15 V
OG voltage VOG -10 -+15 V
RG voltage VRG -10 - +15 V
TG voltage VTG -10 -+15 V
Vertical clock voltage VP1V, VP2V -10 - +15 V
Horizontal clock voltage VP1H, VP2H -10 -+15 V
■ Operating conditions (MPP mode, Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Output transistor drain voltage VOD 18 20 22 V
Reset drain voltage VRD 11.5 12 12.5 V
Output gate voltage VOG 135V
Substrate voltage VSS - 0 - V
Test point (vertical input source) VIS V -V
RD -V
Test point (horizontal input source) VISH - V RD - V
Test point (vertical input gate) VIG 1V, VIG 2V -8 0 - V
Test point (horizontal input gate) VIG1H , VIG 2H -8 0 - V
High VP1VH, VP2VH 468
Vertical shift register
clock voltage Low VP1VL, VP2VL -9 -8 -7 V
High VP1HH, VP2HH 4 6 8
Horizontal shift register
clock voltage Low VP1HL, VP2HL -9 -8 -7 V
High VSGH 468
Summing gate voltage Low VSGL -9 -8 -7 V
High VRGH 4 6 8
Reset gate voltage Low VRGL -9 -8 -7 V
High VTGH 468
Transfer gate voltage Low VTGL -9 -8 -7 V
2
Fixed pattern noise (peak to peak)
Signal × 100
Photo response non-uniformity (PRNU) [%]
CCD area image sensor
S7033/S7034 series
QUANTUM EFFICIENCY (%)
WAVELENGTH (nm)
(Typ. Ta=25 ˚C)
0
200 400 600 800 1000 1200
10
20
30
40
50
60
70
80
90
100
FRONT-SIDED
FRONT-SIDED
(UV COAT)
BACK-THINNED
*9: Spectral response with quartz glass or sapphire glass
are decreased by the transmittance.
■ Spectral response (without window) *9 ■ Spectral transmittance characteristics of window material
KMPDB0058EA
0
10
100 200
WAVELENGTH (nm)
TRANSMITTANCE (%)
300 400 500 600 700 800 900 1000
20
30
40
50
60
70
80
90
100 (Typ. Ta=25 ˚C)
QUARTZ WINDOW
SAPPHIRE WINDOW
KMPDB0101EA
■ Dark current vs. temperature
-50 -40 -30 -20 0-10 10 20 30
TEMPERATURE (˚C)
0.1
1
10
100
1000
10000
DARK CURRENT (e
-
/pixel/s)
(Typ.)
KMPDB0037EB
● Window material
Type No. Window material
S7033 series Quartz glass *10
(option: window-less,)
S7034 series Sapphire glass *11
(option: window-less)
S7035 series
(two-stage
TE-cooled type)
Sapphire glass *11
(option: window-less)
*10: Resin sealing
*11: Hermetic sealing
3
CCD area image sensor
S7033/S7034 series
■ Device structure (Conceptual drawing of top view)
23
22
21
20
14
15
24
1
2
12
11
893
4
5
2 BEVEL
SIGNAL OUT
2
n
4 BLANK 4 BLANK
V=122
H=512, 1024
4 BEVEL
THINNING
THINNING
12345
2
3
4
5
V
H
6 BEVEL 6 BEVEL
13
10
2
n
SIGNAL OUT
KMPDC0076EA
INTEGRATION PERIOD
(Shutter must be open) VERTICAL BINNING PERIOD
(Shutter must be closed)
P1V
P2V, TG
P1H
P2H, SG
READOUT PERIOD (Shutter must be closed)
3..126 127 128←122 + 6 (BEVEL)
Tpwv
Tovr
Tpwh, Tpws
Tpwr
123
531
1043 532
1044
4..530
4..1042 : S703*-0907
: S703*-1007
12
D19D2D1 D20
D3..D10, S1..S1024, D11..D18
RG
OS
S1..S512 : S703*-0907
: S703*-1007
■ Timing chart
KMPDC0128EA
Parameter Symbol Remark Min. Typ. Max. Unit
Pulse width Tpwv 6 *13 - - µs
P1V, P2V, TG Rise and fall time Tprv, Tpfv
*12
200 - - ns
Pulse width Tpwh 500 - - ns
Rise and fall time Tprh, Tpfh 10 - - ns
P1H, P2H
Duty ratio -
*12
- 50 - %
Pulse width Tpws 500 - - ns
Rise and fall time Tprs, Tpfs 10 - - ns
SG
Duty ratio -
-
- 50 - %
Pulse width Tpwr 100 - - ns
RG Rise and fall time Tprr, Tpfr - 5 - - ns
TG – P1H Overlap time Tovr - 3 - - µs
*12: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*13: In case of S7033-1007, S7034-1007S
4
Line binning
CCD area image sensor
S7033/S7034 series
INTEGRATION PERIOD
(Shutter must be open)
P1V
RG
OS
P2V, TG
P1H
P2H, SG
READOUT PERIOD (Shutter must be closed)
ENLARGED VIEW
4..127 128←122 + 6 (BEVEL)
Tpwv
Tovr
Tpwr
D1 D2 D3 D4 D18 D19 D20
D5..D10, S1..S1024, D11..D17
P2V, TG
P1H
P2H, SG
RG
OS
Tpwh, Tpws
123
S1..S512 : S703*-0907
: S703*-1007
KMPDC0129EA
INTEGRATION PERIOD
(Shutter must be open)
P1V
RG
OS
P2V, TG
P1H
P2H, SG
READOUT PERIOD (Shutter must be closed)
ENLARGED VIEW
4..127 128←122 + 6 (BEVEL)
Tpwv
Tovr
Tpwr
D1 D2 D3 D4 D18 D19 D20
D5..D10, S1..S1024, D11..D17
P2V, TG
P1H
P2H, SG
RG
OS
Tpwh, Tpws
123
S1..S512 : S703*-0907
: S703*-1007
KMPDC0130EA
Parameter Symbol Remark Min. Typ. Max. Unit
Pulse width Tpwv 6 *15 - - µs
P1V, P2V, TG Rise and fall time Tprv, Tpfv *14 200 - - ns
Pulse width Tpwh 500 - - ns
Rise and fall time Tprh, pfh 10 - - ns
P1H, P2H
Duty ratio -
*14
- 50 - %
Pulse width Tpws 500 - - ns
Rise and fall time Tprs, Tpfs 10 - - ns
SG
Duty ratio -
-
- 50 - %
Pulse width Tpwr 100 - - ns
RG Rise and fall time Tprr, Tpfr - 5 - - ns
TG – P1H Overlap time Tovr - 3 - - µs
*14: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*15: In case of S7033-1007, S7034-1007S
Area scanning 1: low dark current mode
Area scanning 2: large full well mode
5
CCD area image sensor
S7033/S7034 series
■ Dimensional outlines (unit: mm)
KMPDA0080EB
S7033-0907 S7033-1007
WINDOW 16.3
8.2
34.0
2.54
22.9
22.4
A
ACTIVE AREA
12.288
S7033-0907: A=2.928
4.4
4.8
2.4
3.8
PHOTOSENSITIVE SURFACE
1st PIN INDICATION PAD
3.0
(24 ×) 0.5
KMPDA0081EB
WINDOW 28.6
22.9
22.4
ACTIVE AREA 24.576
B
8.2
44.0
2.54
S7033-1007: B=2.928
3.0
PHOTOSENSITIVE SURFACE
4.4
2.4
4.8
3.8
1st PIN INDICATION PAD
(24 ×) 0.5
KMPDA0082EC
S7034-0907S S7034-1007S
KMPDA0083EC
WINDOW 16.3
8.2
34.0
50.0
2.54
22.9
19.0
4.0
42.0
22.4
A
7.3
1.0
7.7
6.7
4.8
ACTIVE AREA
12.288
PHOTOSENSITIVE SURFACE
1st PIN INDICATION PAD
3.0
TE-COOLER
S7034-0907S: A=2.928
(24 ×) 0.5
(24 ×) 0.5
7.3
1.0
3.0
6.7
4.8
PHOTOSENSITIVE SURFACE
7.7
1st PIN INDICATION PAD
B
4.0
19.0
22.4
22.9
44.0
52.0
60.0
2.54
WINDOW 28.6
ACTIVE AREA 24.576
8.2
S7034-1007S: B=2.928
TE-COOLER
Parameter Symbol Remark Min. Typ. Max. Unit
Pulse width Tpwv 6 *17 - - µs
P1V, P2V, TG Rise and fall time Tprv, Tpfv *16 200 - - ns
Pulse width Tpwh 500 - - ns
Rise and fall time Tprh, Tpfh 10 - - ns
P1H, P2H
Duty ratio -
*16
- 50 - %
Pulse width Tpws 500 - - ns
Rise and fall time Tprs, Tpfs 10 - - ns
SG
Duty ratio -
-
- 50 - %
Pulse width Tpwr 100 - - ns
RG Rise and fall time Tprr, Tpfr - 5 - - ns
TG - P1H Overlap time Tovr - 3 - - µs
*16: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*17: In case of S7033-1007, S7034-1007S
6
CCD area image sensor
S7033/S7034 series
■ Pin connections
S7033 series S7034 series
Pin
No. Symbol Function Symbol Function
Remark
(standard operation)
1 RD Reset drain RD Reset drain +12 V
2OS Output transistor source OS Output transistor source RL=10 k to 100 kΩ
3 OD Output transistor drain OD Output transistor drain +20 V
4OG Output gate OG Output gate +3 V
5 SG Summing gate SG Summing gate Same pulse as P2H
6 - -
7- -
8P2H CCD horizontal register clock-2 P2H CCD horizontal register clock-2
9 P1H CCD horizontal register clock-1 P1H CCD horizontal register clock-1
10 IG2H Test point (horizontal input gate-2) IG2H Test point (horizontal input gate-2) 0 V
11 IG1H Test point (horizontal input gate-1) IG1H Test point (horizontal input gate-1) 0 V
12 ISH Test point (horizontal input source) ISH Test point (horizontal input source) Connect to RD
13 TG *18 Transfer gate TG *15 Transfer gate Same pulse as P2V
14 P2V CCD vertical register clock-2 P2V CCD vertical register clock-2
15 P1V CCD vertical register clock-1 P1V CCD vertical register clock-1
16 -Th1 Thermistor
17 - Th2 Thermistor
18 -P- TE-cooler-
19 - P+ TE-cooler+
20 SS Substrate (GND) SS Substrate (GND) GND
21 ISV Test point (vertical input source) ISV Test point (vertical input source) Connect to RD
22 IG2V Test point (vertical input gate-2) IG2V Test point (vertical input gate-2) 0 V
23 IG1V Test point (vertical input gate-1) IG1V Test point (vertical input gate-1) 0 V
24 RG Reset gate RG Reset gate
*18: Isolation gate between vertical register and horizontal register.
In standard operation, TG should be applied the same pulse as P2V.
■ Specifications of built-in TE-cooler (Typ.)
Parameter Symbol Condition S7034-0907S S7034-1007S Unit
Internal resistance Rint Ta=25 °C 2.5 1.2
Ω
Maximum current *19 Imax Tc *20=Th *21=25 °C 1.5 3.0 A
Maximum voltage Vmax Tc *20=Th *21=25 °C 3.8 3.6 V
Maximum heat absorption
*22
Qmax 3.4 5.1 W
Maximum temperature
of heat radiating side - 70 70 °C
*19: Maximum current Imax:
If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the
Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and
maintain stable operation, the supply current should be less than 60 % of this maximum current.
*20: Temperature of the cooling side of thermoelectric cooler
*21: Temperature of the heat radiating side of thermoelectric cooler
*22: Maximum heat absorption Qmax.
This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the
maximum current is supplied to the unit.
0
1
2
3
VOLTAGE (V)
CCD TEMPERATURE (˚C)
4
7
6
5
-40
-30
432
CURRENT (A)
10
-20
-10
0
10
20
30
(Typ. Ta=25 ˚C)
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
0
1
2
3
VOLTAGE (V)
CCD TEMPERATURE (˚C)
4
7
6
5
-40
-30
2.01.51.0
CURRENT (A)
0.50
-20
-10
0
10
20
30
(Typ. Ta=25 ˚C)
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
KMPDB0178EA KMPDB0179EA
S7034-0907S S7034-1007S
7
CCD area image sensor
S7033/S7034 series
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, www.hamamatsu.com
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658
France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Information furnished by HAMAMATSU is believ ed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions .
Specifications are subject to change without notice. No patent rights are granted to an y of the circuits described herein. ©2007 Hamamatsu Photonics K.K.
Input Symbol Value
Supply voltage
VD1
VA1+
VA1-
VA2
VD2
Vp
VF
+5 Vdc, 200 mA
+15 Vdc, +100 mA
-15 Vdc, -100 mA
+24 Vdc, 30 mA
+5 Vdc, 30 mA (C7044)
+5 Vdc, 2.5 A (C7044)
+12 Vdc, 100 mA (C7044)
Master start φms
HCMOS logic compatible
Master clock φmc HCMOS logic compatible,
1 MHz
Features
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C7043: for S7033 series
C7044: for S7034 series
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Area scanning or full line-binnng operation
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Readout frequency: 250 kHz
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Readout noise: 60 e-rms
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∆T=50 ˚C (∆T changes by cooling method.)
Cat. No. KMPD1029E09
Oct. 2007 DN
Multichannel detector head C7043/C7044
■ Precaution for use (Electrostatic countermeasures)
● Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with
an earth ring, in order to prevent electrostatic damage due to electrical charges from friction.
● Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge.
● Provide ground lines or ground connection with the work-floor, work-desk and wor k-bench to allow static electricity to
discharge.
● Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the
amount of damage that occurs.
■ Element cooling/heating temperature incline rate
Element cooling/heating temperature incline rate should be set at less than 5 K/min.
■ Specifications of built-in temperature sensor
A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation
between the thermistor resistance and absolute temperature is expressed by the following equation.
R1 = R2 × expB (1 / T1 - 1 / T2)
where R1 is the resistance at absolute temperature T1 (K)
R2 is the resistance at absolute temperature T2 (K)
B is so-called the B constant (K)
The characteristics of the thermistor used are as follows.
R (298K) = 10 kΩ
B (298K / 323K) = 3450 K
KMPDB0111EA
(Typ. Ta=25 ˚C)
10 kΩ
220 240 260
TEMPERATURE (K)
RESISTANCE
280 300
100 kΩ
1 MΩ
8
