LTM2889
1
2889fa
For more information www.linear.com/LTM2889
TYPICAL APPLICATION
FEATURES DESCRIPTION
Isolated CAN FD µModule
Transceiver and Power
The LT M
®
2889 is a complete galvanically-isolated Con-
troller Area Network (CAN) µModule
®
(micromodule)
transceiver. No external components are required – a
single supply powers both sides of the interface through an
integrated, isolated DC/DC converter. Separate versions are
available for 3.3V and 5V power supplies. The dual voltage
CAN transceiver and the adjustable regulator allow 3.3V
or 5V isolated power with either the 3.3V or 5V version.
Coupled inductors and an isolation power transformer
provide 2500VRMS of isolation between the line transceiver
and the logic interface. This device is ideal for systems
where the ground loop is broken, allowing for large common
mode voltage ranges. Communication remains uninter-
rupted for common mode transients greater than 30kV/μs.
Supports up to 4Mbps CAN with Flexible Data Rate
(CAN FD). A logic supply pin allows easy interfacing with
different logic levels from 1.62V to 5.5V, independent of
the main supply.
Enhanced ESD protection allows this part to withstand up
to ±25kV Human Body Model (HBM) on the transceiver
interface pins and ±10kV HBM across the isolation barrier
without latchup or damage.
Isolated Powered CAN Transceiver LTM2889 Operating at 1Mbps with
45 kV/µs Common Mode Transients
Across the Isolation Barrier
APPLICATIONS
n Isolated 4Mbps CAN FD Transceiver
n 2500VRMS for 1 Minute Per UL1577
n Isolated DC Power: 5V (Adjustable to 3.3V)
n Up to 150mA Available Isolated Power Output
n 3.3V or 5V Input Supply Voltage Options
n UL-CSA Recognized File #E151738
n No External Components Required
n High Bus Fault Voltage Tolerance: ±60V
n Low Power OFF Mode: <1µA Typical
n High Common Mode Transient Immunity: 30kV/µs
n Variable Slew Rate Driver with Active Symmetry
Control and SPLIT Pin for Low EME
n Fully ISO 11898-2 and CAN FD Compliant
n Ideal Passive Behavior to CAN Bus with Supply Off
n Transmit Data (TXD) Dominant Timeout Function
n High ESD: ±25kV CANH, CANL to GND2 and VCC2;
±10kV Across Isolation Barrier
n Ambient Operation from –40°C to 125°C
n Low Profile 15mm × 11.25mm BGA Package
n Isolated CAN Bus Interface
n Industrial Networks
n DeviceNet Applications L, LT , LT C , LT M , Linear Technology, µModule and the Linear logo are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
2889 TA01
LTM2889
1.62V TO 5.5V 3.3V (LTM2889-3) OR 5V (LTM2889-5)
*USE OF SPLIT PIN IS OPTIONAL
5V OUTPUT
(ADJUSTABLE)
AVAILABLE CURRENT:
150mA (LTM2889-5)
100mA (LTM2889-3)
RXD
TXD
ON
S
RE
VCC
VLPVCC VCC2
GND2RSGND
60Ω
60Ω
CAN
CONTROLLER
GND
PWR
VDD
ADJ
CANH
CANL
SPLIT*
ISOLATION BARRIER
50ns/DIV
2V/DIV
2V/DIV
TXD
500V/DIV
MULTIPLE SWEEPS
OF COMMON MODE
TRANSIENTS ACROSS
ISOLATION BARRIER
2889 TA01a
RXD
LTM2889
2
2889fa
For more information www.linear.com/LTM2889
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
VCC to GND .................................................. –0.3V to 6V
PVCC to GND ................................................ –0.3V to 6V
VL to GND .................................................... –0.3V to 6V
VCC2 to GND2 ............................................... –0.3V to 6V
Signal Voltages (ON, S, RE, RXD, TXD)
to GND ................................................–0.3V to VL +0.3V
Interface I/O (CANH, CANL, SPLIT) to GND2 ..........±60V
Interface I/O to Interface I/O ................................. ±120V
VCC2, ADJ, RS to GND2 ................................ –0.3V to 6V
Operating Temperature Range (Note 4)
LTM2889C ............................................... 0°C to 70°C
LTM2889I ............................................–40°C to 85°C
LTM2889H ......................................... –40°C to 125°C
Maximum Internal Operating Temperature ............ 125°C
Storage Temperature Range .................. –55°C to 125°C
Peak Reflow Temperature (Soldering, 10 sec) ....... 245°C
(Note 1)
GND
GND2 GND2DNC
BGA PACKAGE
32-PIN (15mm × 11.25mm × 3.42mm)
TOP VIEW
F
G
H
L
J
K
E
A
B
C
D
21 43 5 6 7 8
RXDRE STXD ON VLVCC PVCC
SPLITCANL GND2 RS ADJCANH VCC2
TJMAX = 125°C, θJA = 32.2°C/W, θJCTOP = 27.2°C/W
θJCBOTTOM = 20.9°C/W, θJB =26.4°C/W, Weight = 1.1g
PRODUCT SELECTION GUIDE
LEAD FREE DESIGNATOR
PBF = Lead Free
LTM2889 I Y –3 #PBF
INPUT VOLTAGE RANGE
3 = 3V to 3.6V
5 = 4.5V to 5.5V
PACKAGE TYPE
Y = Ball Grid Array (BGA)
TEMPERATURE GRADE
C = Commercial Temperature Range (0°C to 70°C)
I = Industrial Temperature Range (–40°C to 85°C)
H = Automotive Temperature Range (–40°C to 125°C)
PRODUCT PART NUMBER
LTM2889
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2889fa
For more information www.linear.com/LTM2889
ELECTRICAL CHARACTERISTICS
ORDER INFORMATION
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supplies
VCC Supply Voltage l3.0 5.5 V
ICC Supply Current OFF: ON = 0V l0 10 µA
ON = VLl3.1 5 mA
PVCC Supply Voltage, Isolated Power Converter LTM2889-3 l3.0 3.3 3.6 V
LTM2889-5 l4.5 5.0 5.5 V
PICC Supply Current, Isolated Power Converter,
(VCC2 External Load Current ILOAD = 0)
OFF: ON = 0V l0 10 µA
Recessive: ON = VL,
TXD = VL and/or S = VL
LTM2889-3 l34 60 mA
LTM2889-5 l32 50 mA
Dominant: ON = VL,
TXD = S = 0
LTM2889-3 l140 225 mA
LTM2889-5 l94 130 mA
VLLogic Supply Voltage l1.62 3.3 5.5 V
ILLogic Supply Current OFF: ON = 0V, TXD = VLl0 10 µA
Recessive: ON = VL, TXD = VLl0 10 µA
Dominant: ON = VL, TXD = S = 0V l6 50 µA
VCC2 Regulated VCC2 Output Voltage to GND2 No Load, TXD = VLl 4.75 5.0 5.25 V
ILOAD = 100mA, TXD = VLLTM2889-3 l 4.75 5.0 5.25 V
ILOAD = 150mA, TXD = VLLTM2889-5 l4.75 5.0 5.25 V
VCC2-3.3V Regulated VCC2 Output Voltage to GND2, 3.3V
Output
No Load, (Fig. 10) l3.1 3.3 3.5 V
ILOAD = 100mA, (Fig. 10) LTM2889-3 l3.0 3.3 3.5 V
ILOAD = 150mA, (Fig. 10) LTM2889-5 l3.0 3.3 3.5 V
VCC2 Short Circuit Current VCC2 = 0V, TXD = VL200 mA
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, the following conditions apply:
PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = RS = 0V, ON = VL.
Figure 10 applies for VCC2 = 3.3V; otherwise ADJ is floating. Figure 1 applies with RL = 60Ω and dominant mode measurements are
taken prior to TXD dominant timeout (t < tTOTXD). (Note 2)
PART NUMBER PAD OR BALL FINISH
PART MARKING
PACKAGE
TYPE
MSL
RATING
INPUT VOLTAGE
RANGE
TEMPERATURE
RANGE DEVICE FINISH CODE
LTM2889CY-3#PBF
SAC305 (RoHS)
LTM2889Y-3
e1 32-Lead
BGA 3
3V to 3.6V 0°C to 70°C
LTM2889IY-3#PBF 3V to 3.6V –40°C to 85°C
LTM2889HY-3#PBF 3V to 3.6V –40°C to 125°C
LTM2889CY-5#PBF
LTM2889Y-5
4.5V to 5.5V 0°C to 70°C
LTM2889IY-5#PBF 4.5V to 5.5V –40°C to 85°C
LTM2889HY-5#PBF 4.5V to 5.5V –40°C to 125°C
• Device temperature grade is indicated by a label on the shipping
container.
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• This product is not recommended for second side reflow. For more
information, go to www.linear.com/BGA-assy
• Recommended BGA PCB Assembly and Manufacturing Procedures:
www.linear.com/BGA-assy
• BGA Package and Tray Drawings: www.linear.com/packaging
• This product is moisture sensitive. For more information, go to:
www.linear.com/BGA-assy
http://www.linear.com/product/LTM2889#orderinfo
LTM2889
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For more information www.linear.com/LTM2889
ELECTRICAL CHARACTERISTICS
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, the following conditions apply:
PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = RS = 0V, ON = VL.
Figure 10 applies for VCC2 = 3.3V; otherwise ADJ is floating. Figure 1 applies with RL = 60Ω and dominant mode measurements are
taken prior to TXD dominant timeout (t < tTOTXD). (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Control Inputs S, ON, RE:
VIH HIGH-level Input Voltage VL ≥ 2.35V l0.7 • VLVL + 0.3 V
1.62V ≤ VL < 2.35V l0.75 • VLVL + 0.3 V
VIL LOW-level Input Voltage VL ≥ 2.35V l–0.3 0.3 • VLV
1.62V ≤ VL < 2.35V l–0.3 0.25 • VLV
IIH HIGH-level Input Current ON = S = RE = VLl11 25 µA
IIL LOW-level Input Current ON = S = RE = 0V l±1 µA
CAN Transmit Data Input Pin TXD
VIH HIGH-level Input Voltage VL ≥ 2.35V l0.7 • VLVL + 0.3 V
1.62V ≤ VL < 2.35V l0.75 • VLVL + 0.3 V
VIL LOW-level Input Voltage VL ≥ 2.35V l–0.3 0.3 • VLV
1.62V ≤ VL < 2.35V l–0.3 0.25 • VLV
IIH HIGH-level Input Current TXD = VLl±5 µA
IIL LOW-level Input Current TXD = 0V l–50 –2 µA
CIN Input Capacitance (Note 6) 5 pF
CAN Receive Data Output Pin RXD
IOH HIGH-level Output Current RXD = VL – 0.4V 3V ≤ VL ≤ 5.5V l–4 mA
1.62V ≤ VL < 3V l–1 mA
IOL LOW-level Output Current RXD = 0.4V, Bus
Dominant
3V ≤ VL ≤ 5.5V l4 mA
1.62V ≤ VL < 3V l1 mA
Bus Driver Pins CANH, CANL
VO(D) Bus Output Voltage (Dominant)
to GND2
CANH TXD = 0V, t< tTOTXD VCC2 = 5V l2.75 3.6 4.5 V
VCC2 = 3.3V l2.15 2.9 3.3 V
CANL TXD = 0V, t< tTOTXD VCC2 = 5V l0.5 1.4 2.25 V
VCC2 = 3.3V l0.5 0.9 1.65 V
VO(R) Bus Output Voltage (Recessive) to GND2 VCC2 = 5V, No Load (Figure 1) l2 2.5 3 V
VCC2 = 3.3V, No Load (Figure 1) l1.45 1.95 2.45 V
VOD(D) Differential Output Voltage (Dominant) RL = 50Ω to 65Ω (Figure 1) l1.5 2.2 3 V
VOD(R) Differential Output Voltage (Recessive) No Load (Figure 1) l–500 0 50 mV
VOC(D) Common Mode Output Voltage (Dominant)
to GND2
VCC2 = 5V, (Figure 1) l2 2.5 3 V
VCC2 = 3.3V, (Figure 1) l1.45 1.95 2.45 V
IOS(D) Bus Output Short-Circuit Current
(Dominant)
CANH CANH = 0V to GND2 l–100 –75 mA
CANH CANH = ±60V to GND2 l–100 3 mA
CANL CANL = 5V to GND2 l75 110 mA
CANL CANL = ±60V to GND2 l–3 100 mA
LTM2889
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ELECTRICAL CHARACTERISTICS
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, the following conditions apply:
PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = RS = 0V, ON = VL.
Figure 10 applies for VCC2 = 3.3V; otherwise ADJ is floating. Figure 1 applies with RL = 60Ω and dominant mode measurements are
taken prior to TXD dominant timeout (t < tTOTXD). (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Bus Receiver Pins CANH, CANL
VCM Bus Common Mode Voltage to GND2 = (CANH
+ CANL)/2 for Data Reception
VCC2 = 5V l±36 V
VCC2 = 3.3V l±25 V
VTH+Bus Input Differential Threshold Voltage
(Positive-Going)
VCC2 = 5V, –36V ≤ VCM ≤ 36V l775 900 mV
VCC2 = 3.3V, –25V ≤ VCM ≤ 25V l775 900 mV
VTH–Bus Input Differential Threshold Voltage
(Negative-Going)
VCC2 = 5V, –36V ≤ VCM ≤ 36V l500 625 mV
VCC2 = 3.3V, –25V ≤ VCM ≤ 25V l500 625 mV
ΔVTH Bus Input Differential Hysteresis Voltage VCC2 = 5V, –36V ≤ VCM ≤ 36V 150 mV
VCC2 = 3.3V, –25V ≤ VCM ≤ 25V 150 mV
RIN Input Resistance (CANH and CANL) to GND2 RIN = ΔV/ΔI; ΔI = ±20μA l25 40 50 kΩ
RID Differential Input Resistance RIN = ΔV/ΔI; ΔI = ±20μA l50 80 100 kΩ
ΔRIN Input Resistance Matching RIN (CANH) to RIN (CANL) ±1 %
CIH Input Capacitance to GND2 (CANH) (Note 6) 32 pF
CIL Input Capacitance to GND2 (CANL) (Note 6) 8 pF
CID Differential Input Capacitance (Note 6) 8.4 pF
IBL Bus Leakage Current (VCC2 = 0V) (I-Grade) CANH = CANL = 5V, T ≤ 85°C l±10 μA
Bus Leakage Current (VCC2 = 0V) (H-Grade) CANH = CANL = 5V, T ≤ 125°C l±40 μA
Bus Common Mode Stabilization Pin SPLIT
VO_SPLIT SPLIT Output Voltage to GND2 –500μA ≤ I(SPLIT) ≤
500μA
VCC2 = 5V l1.5 2.5 3.5 V
VCC2 = 3.3V l0.9 1.9 2.9 V
IOS_SPLIT SPLIT Short-Circuit Current –60V ≤ SPLIT ≤ 60V to GND2 l±3 mA
Logic/Slew Control Input RS
VIH_RS High Level Input Voltage to GND2 l0.9 • VCC2 V
VIL_RS Low Level Input Voltage to GND2 l0.5 • VCC2 V
IIN_RS Logic Input Current 0 ≤ RS ≤ VCC2 l–170 0 10 μA
ESD (HBM) (Note 3)
Isolation Boundary GND2 to GND ±10 kV
CANH, CANL, SPLIT Referenced to GND2 or VCC2 ±25 kV
All Other Pins Referenced to GND, GND2, or VCC2 ±4 kV
LTM2889
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SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Transceiver Timing
fMAX Maximum Data Rate l4 Mbps
tPTXBD TXD to Bus Dominant Propagation Delay (Figure 3) VCC2 = 3.3V l55 105 165 ns
VCC2 = 5V l50 100 150 ns
tPTXBR TXD to Bus Recessive Propagation Delay (Figure 3) VCC2 = 3.3V l100 145 205 ns
VCC2 = 5V l80 115 155 ns
tPTXBDS TXD to Bus Dominant Propagation Delay,
Slow Slew
RSL = 200k
(Figure 3)
VCC2 = 3.3V l200 565 1255 ns
VCC2 = 5V l220 585 1225 ns
tPTXBRS TXD to Bus Recessive Propagation Delay, Slow
Slew
RSL = 200k
(Figure 3)
VCC2 = 3.3V l420 985 2035 ns
VCC2 = 5V l490 1065 2245 ns
tPBDRX Bus Dominant to RXD Propagation Delay (Figure 3) l40 65 100 ns
tPBRRX Bus Recessive to RXD Propagation Delay (Figure 3) l45 70 115 ns
tPTXRXD TXD to RXD Dominant Propagation Delay (Figure 3) VCC2 = 3.3V l120 170 240 ns
VCC2 = 5V l110 165 225 ns
tPTXRXR TXD to RXD Recessive Propagation Delay (Figure 3) VCC2 = 3.3V l160 215 275 ns
VCC2 = 5V l140 185 245 ns
tPTXRXDS TXD to RXD Dominant Propagation Delay,
Slow Slew
RSL = 200k
(Figure 3)
VCC2 = 3.3V l210 550 1170 ns
VCC2 = 5V l240 580 1150 ns
tPTXRXRS TXD to RXD Recessive Propagation Delay,
Slow Slew
RSL = 200k
(Figure 3)
VCC2 = 3.3V l450 990 1960 ns
VCC2 = 5V l500 1070 2150 ns
tTOTXD TXD Timeout Time (Figure 4) l0.5 2 4 ms
tBIT(RXD),2M Receiver Output Recessive Bit Time, 2Mbps,
Loop Delay Symmetry
(Figure 8) VCC2 = 3.3V l400 455 550 ns
VCC2 = 5V l400 475 550 ns
tBIT(RXD),4M Receiver Output Recessive Bit Time, 4Mbps (Figure 8) VCC2 = 5V l200 225 275 ns
tZLR Receiver Output Enable Time (Figure 5) l20 ns
tLZR Receiver Output Disable Time (Figure 5) l30 ns
tENRSRX RXD Enable from Shutdown Time (Figure 6) l40 µs
tENRSTX TXD Enable from Shutdown TIme (Figure 7) (Note 5) l40 µs
tSHDNRX Time to Shutdown, Receiver (Figure 6) l3 µs
tSHDNTX Time to Shutdown, Transmitter (Figure 7) l250 ns
Power Supply Generator
tENPS VCC2 Supply Start-Up Time No load, ON ↑, VCC2 to 4.5V l2.3 5 ms
Transmitter Drive Symmetry (Common Mode Voltage Fluctuation)
VSYM Driver Symmetry (CANH + CANL – 2VO(R))
(Dynamic Peak Measurement)
RL = 60Ω/Tol. < 1%, CSPLIT = 4.7nF/5%,
fTXD = 250kHz, Input Impedance of
Oscilloscope: ≤ 20pF/≥1MΩ (Figure 2)
l±500 mV
SWITCHING CHARACTERISTICS
The l denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, the following conditions apply:
PVCC = VCC = 3.3V for the LTM2883-3, PVCC = VCC = 5V for the LTM2883-5, VL = 3.3V, GND = GND2 = S = RE = RS = 0V, ON = VL.
Figure 2 applies with RL = 60Ω, CL = 100pF, RSL = 0Ω. Figure 10 applies for VCC2 = 3.3V; otherwise ADJ is floating.
LTM2889
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SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VISO Rated Dielectric Insulation Voltage 1 Second (Notes 7, 8, 9) 3000 VRMS
1 Minute, Derived from 1 Second Test (Note 9) 2500 VRMS
Common Mode Transient Immunity LTM2889-3 VCC = 3.3V, LTM2889-5
VCC = 5.0V, VL = ON = 3.3V,
ΔV(GND2-GND) = 1kV, Δt = 33ns (Note 3)
30 50 kV/µs
VIORM Maximum Working Insulation Voltage (Notes 3,10) 560
400
VPEAK,
VDC
VRMS
Partial Discharge VPD = 1060 VPEAK (Note 7) 5 pC
CTI Comparative Tracking Index IEC 60112 (Note 3) 600 VRMS
Depth of Erosion IEC 60112 (Note 3) 0.017 mm
DTI Distance Through Insulation (Note 3) 0.06 mm
Input to Output Resistance (Notes 3, 7) 109Ω
Input to Output Capacitance (Notes 3, 7) 6 pF
Creepage Distance (Notes 3, 7) 9.5 mm
ISOLATION CHARACTERISTICS
TA = 25°C
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3. Not tested in production.
Note 4. This module includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature exceeds 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating temperature
may result in device degradation or failure.
Note 5. TXD must make a high to low transition after this time to assert a
bus dominant state.
Note 6. Pin capacitance given for reference only and is not tested in
production.
Note 7. Device considered a 2-terminal device. Pin group A1 through B8
shorted together and pin group K1 through L8 shorted together.
Note 8. The Rated Dielectric Insulation Voltage should not be interpreted
as a continuous voltage rating.
Note 9. In accordance with UL1577, each device is proof tested for the
2500VRMS rating by applying an insulation test voltage of 3000VRMS for 1
second.
Note 10. Maximum Working Insulation Voltage is for continuous or
repeated voltage applied across the isolation boundary. Refer also to
relevant equipment level safety specifications which may reduce VIORM
depending on application conditions.
LTM2889
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TEST CIRCUITS
2889 TC01
3.3V
TXD
RXD
VCC
RSL = 0Ω EXCEPT AS NOTED
TXD
RXD
VL
ON
PVCC
VCC
15pF
LTM2889
CANH
CANL
GND2GND S RE
RS
SPLIT
CANH
CANL VOC
GND
CM
47µF 0.1µF
1/2RL
1%
1/2RL
1%
VOD
ISOLATION BARRIER
RSL
2889 TC02
3.3V
TXD
RXD
VCC
RSL = 0Ω EXCEPT AS NOTED
TXD
RXD
VL
ON
PVCC
VCC
15pF
LTM2889
CANH
CANL
GND2GND S RE
RS
SPLIT
CANH
CANL
GND
47µF 0.1µF
1/2RL
1%
CL
1/2RL
1%
VOD
ISOLATION BARRIER
RSL
Figure 1. Electrical Characteristic Measurements of Bus Pins CANH, CANL
Figure 2. All Bus Pin Switching Characteristic Measurements Except Receiver Enable/Disable Times
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TEST CIRCUITS
Figure 3. CAN Transceiver Data Propagation Timing Diagram
Figure 4. TXD Dominant Timeout Time
2889 TC03
1/2 VL1/2 VL
TXD
LOW
HIGH
1/2 VL1/2 VL
0.9V
0.5V
RXD
tPTXBD
tPTXBDS
tPTXRXD
tPTXRXDS
tPTXRXR
tPTXRXRS
tPBDRX
LOW
HIGH
RECESSIVE
CANH
CANL
DOMINANT
VOD
tPTXBR
tPTXBRS tPBRRX
2889 TC04
1/2 VL
TXD
LOW
HIGH
0.9V
0.5V
tTOTXD RECESSIVE
CANH
CANL
DOMINANT
VOD
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2889 TC06
1/2 VL
tENRSRX
RXD
LOW
HIGH
0.6VCC2 0.9VCC2
RS
LOW
HIGH
1/2 VL
tSHDNRX
VCC
RXD
VCC
VL
VL
RXD
TXD
ON
PVCC
15pF
LTM2889
CANH
CANL
RS RS
GND2GND
GND
SRE
SPLIT
47µF 0.1µF
500
1.5V
+
–
V
ISOLATION BARRIER
Figure 6. RXD Enable and Disable Timing from Shutdown
Figure 5. Receiver Output Enable and Disable Timing
2889 TC05
1/2 VL
tZLR tLZR
RXD
LOW
HIGH
1/2 VL1/2 VL
RE
LOW
HIGH
1/2 VL
VCC
RXD
VCC
VL
VL
RXD
TXD
ON
PVCC
15pF
LTM2889
CANH
CANL
RS
RE
GND2GND
GND
SRE
SPLIT
47µF 0.1µF
500
1.5V
+
–
V
ISOLATION BARRIER
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TEST CIRCUITS
2889 TC07
1/2 VL
tENRSTX
tPTXBD
tSHDNTX
TXD
LOW
HIGH
0.9V
0.5V
RECESSIVE
CANH
CANL
DOMINANT
VOD
0.6VCC2 0.9VCC2
RS
LOW
HIGH
Figure 7. TXD Enable and Disable Timing from Shutdown
Figure 8. Loop Delay Symmetry
5 • tBIT(TXD)
TXD
RXD
2889 TC08
tBIT(TXD)
tBIT(RXD)
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Driver Output Current vs
Differential Output Voltage
(Dominant)
Receiver Dominant Output
Voltage vs Output Current
Receiver Recessive Output
Voltage vs Output Current
TXD Timeout Time
vs Temperature
TXD to RXD Dominant Propagation
Delay vs Temperature
TXD to RXD Recessive
Propagation Delay vs Temperature
Driver Differential Output Voltage
(Dominant) vs Temperature
Common Mode Output Voltage
(Dominant) vs Temperature
Driver Differential Output Voltage
(Dominant) vs Output Current
Unless otherwise noted, the following conditions apply:
TA = 25°C, PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5.0V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = 0V, ON = VL.
TEMPERATURE (°C)
VOD(D) (V)
2.9
2.7
2.5
2.1
2.3
1.9
1.7
1.5 25 50 75 100 125
2889 G01
–25 0–50
VCC = 5V
VCC = 3.3V
TEMPERATURE (°C)
VOC(D) (V)
2.9
2.7
2.5
2.1
2.3
1.9
1.7
1.5 25 50 75 100 125
2889 G02
–25 0–50
VCC = 5V
VCC = 3.3V
OUTPUT CURRENT (mA)
0
VOD(D) (V)
5.0
4.5
4.0
3.0
3.5
2.5
2.0
1.5
1.0
0.5
040 50 60 70
2889 G03
8020 3010
VCC = 5V
VCC = 3.3V
OUTPUT VOLTAGE (V)
–60
IOS(D) (mA)
100
50
0
–50
–100 0 20 40
2889 G04
60–20–40
CANL
CANH
V
L
= 5V
V
L
= 3.3V
V
L
= 2.5V
V
L
= 1.8V
OUTPUT CURRENT (ABS VALUE) (mA)
0
1
2
3
4
5
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
RECEIVER OUTPUT VOLTAGE (V)
2889 G05
V
L
= 5V
V
L
= 3.3V
V
L
= 2.5V
V
L
= 1.8V
OUTPUT CURRENT (ABS VALUE) (mA)
0
1
2
3
4
5
1
2
3
4
5
RECEIVER OUTPUT VOLTAGE (V)
2889 G06
TEMPERATURE (°C)
tTOTXD (ms)
2.4
2.2
1.4
2.0
1.6
1.8
1.2
0.6
1.0
0.8
25 50 75 100 125
2889 G07
–25 0–50
VCC = 5V
VCC = 3.3V
V
CC2
= 5V
V
CC2
= 3.3V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
150
155
160
165
170
175
180
185
190
t
PTXRXD
(ns)
2889 G08
V
CC2
= 5V
V
CC2
= 3.3V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
170
180
190
200
210
220
230
240
250
t
PTXRXR
(ns)
2889 G09
TYPICAL PERFORMANCE CHARACTERISTICS
LTM2889
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Bus Recessive to RXD Propagation
Delay vs Temperature
TXD to RXD Dominant Propagation
Delay vs Temperature, Slow Slew
TXD to RXD Recessive Propagation
Delay vs Temperature, Slow Slew
TXD to Bus Dominant Propagation
Delay vs Temperature, Slow Slew
TXD to Bus Recessive Propagation
Delay vs Temperature, Slow Slew VCC2 Power Efficiency
TXD to Bus Dominant Propagation
Delay vs Temperature
TXD to Bus Recessive Propagation
Delay vs Temperature
Bus Dominant to RXD Propagation
Delay vs Temperature
V
CC2
= 5V
V
CC2
= 3.3V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
85
90
95
100
105
110
115
120
t
PTXBD
(ns)
2889 G10
V
CC2
= 5V
V
CC2
= 3.3V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
105
115
125
135
145
155
165
175
t
PTXBR
(ns)
2889 G11
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
59
61
63
65
67
69
t
PBDRX
(ns)
2889 G12
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
66
68
70
72
74
76
t
PBRRX
(ns)
2889 G13
V
CC2
= 5V
V
CC2
= 3.3V
RSL = 200k
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
490
510
530
550
570
590
t
PTXRXDS
(ns)
2889 G14
V
CC2
= 5V
V
CC2
= 3.3V
RSL = 200k
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
940
960
980
1000
1020
1040
1060
1080
t
PTXRXRS
(ns)
2889 G15
V
CC2
= 5V
V
CC2
= 3.3V
RSL = 200k
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
500
520
540
560
580
600
t
PTXBDS
(ns)
2889 G16
V
CC2
= 5V
V
CC2
= 3.3V
RSL = 200k
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
950
975
1000
1025
1050
1075
1100
t
PTXBRS
(ns)
2889 G17
LTM2889–5
LTM2889–3
V
CC2
= 5V
I
CC2
(mA)
0
25
50
75
100
125
150
175
200
0
0.10
0.20
0.30
0.40
0.50
0.60
0.70
POWER OUT/ POWER IN
2889 G18
Unless otherwise noted, the following conditions apply:
TA = 25°C, PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5.0V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = 0V, ON = VL.
TYPICAL PERFORMANCE CHARACTERISTICS
LTM2889
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VCC Supply Current vs
Transmitting Data Rate
PVCC Supply Current
vs Temperature
PVCC Supply Current vs
Transmitting Data Rate
VCC2 Surplus Current
vs Temperature
VCC2 vs Temperature (3.3V)
Derating for 125°C Maximum
Internal Operating Temperature
VL Supply Current
vs Transmitting Data Rate
VCC2 vs Temperature (5V)
2889 G19
LTM2889–5
LTM2889–3
TRANSMITTING DATA RATE (Mbps)
0.1
1
10
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
I
CC
(mA)
LTM2889–3; V
CC2
= 3.3V
LTM2889–3; V
CC2
= 5V
LTM2889–5; V
CC2
= 5V
LTM2889–5; V
CC2
= 3.3V
TRANSMITTING DATA RATE (Mbps)
0.1
1
10
50.0
60.0
70.0
80.0
90.0
100.0
PI
CC
(mA)
2889 G20
V
L
= 3.3V
V
L
= 5V
V
L
= 1.65V
TRANSMITTING DATA RATE (Mbps)
0.1
1
10
0
100
200
300
400
500
600
I
L
(µA)
2889 G21
LTM2889–3; V
CC2
= 3.3V
LTM2889–3; V
CC2
= 5V
LTM2889–5; V
CC2
= 5V
LTM2889–5; V
CC2
= 3.3V
TRANSMITTING AT 1Mbps
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
50
60
70
80
90
100
PI
CC
(mA)
2889 G22
LTM2889–3; V
CC2
= 3.3V
LTM2889–3; V
CC2
= 5V
LTM2889–5; V
CC2
= 5V
LTM2889–5; V
CC2
= 3.3V
TRANSMITTING AT 4Mbps
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
60
80
100
120
140
160
180
200
220
240
I
CC2
(mA)
2889 G23
I
CC2
= 100mA
I
CC2
= 0mA
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
4.92
4.94
4.96
4.98
5.00
5.02
V
CC2
(V)
2889 G24
I
CC2
= 100mA
I
CC2
= 0mA
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
3.22
3.24
3.26
3.28
3.30
3.32
V
CC2
(V)
2889 G25
Unless otherwise noted, the following conditions apply:
TA = 25°C, PVCC = VCC = 3.3V for the LTM2889-3, PVCC = VCC = 5.0V for the LTM2889-5, VL = 3.3V, GND = GND2 = S = RE = 0V, ON = VL.
TYPICAL PERFORMANCE CHARACTERISTICS
CAN I
CC2
= 20mA
LTM2889–5 (CAN OFF)
LTM2889–5(CAN ON)
LTM2889–3 (CAN OFF)
LTM2889–3 (CAN ON)
TEMPERATURE (°C)
25
50
75
100
125
0
20
40
60
80
100
120
140
160
I
CC2
LOAD CURRENT (mA)
2889 G26
LTM2889
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PIN FUNCTIONS
LOGIC SIDE:
(I/O pins referenced to VL and GND)
RE (Pin A1): Receiver Output Enable. A logic low enables
the receiver output, RXD. A logic high disables the receiver
output. RE has a weak pull-down to GND. In typical usage,
RE is tied to ground.
RXD (Pin A2): Receiver Output. When the CAN bus is in
the dominant state, RXD is low. When the CAN bus is in
the recessive state, RXD is high. When the receiver output
is disabled, RXD is high-Z and has a weak pull-up to VL.
Under the condition of an isolation communication failure,
the receiver output is disabled.
TXD (Pin A3): Transmit Driver Input. When S is low, a
low on TXD puts the driver into the dominant state, driv-
ing CANH high and CANL low. A high on TXD forces the
driver into the recessive state, with both CANH and CANL
in a high impedance state. If TXD and S are both held low
for longer than tTOTXD, the driver reverts to the recessive
state. TXD has a weak pull-up to VL.
S (Pin A4): Transmit Driver Silent. A high on S forces the
driver into the recessive state, with both CANH and CANL
in a high impedance state. S has a weak pull-down to GND.
ON (Pin A5): Enable. Enables the power and data com-
munications through the isolation barrier. If ON is high
the LTM2889 is enabled and power and communications
are functional to the isolated side. If ON is low, the logic
side is held in reset and the isolated side is unpowered.
ON has a weak pull-down to GND.
VL (Pin A6): Logic Supply. Interface supply voltage for
pins RE, RXD, TXD, S, and ON. Operating voltage is 1.62V
to 5.5V. Internally bypassed to GND with 1µF.
VCC (Pins A7, B7): Supply Voltage. Operating voltage is
3V to 5.5V for both LTM2889-3 and LTM2889-5. Internally
bypassed to GND with 1µF.
PVCC (Pins A8, B8): Isolated Power Supply Input. Operat-
ing voltage is 3V to 3.6V for LTM2889-3 and 4.5V to 5.5V
for LTM2889-5. Internally bypassed to GND with 2.2µF.
In typical usage, PVCC is tied to VCC.
GND (Pins B1-B8): Logic Side Circuit Ground
ISOLATED SIDE:
(I/O pins referenced to VCC2 and GND2)
CANL (Pin L1): Low Level CAN Bus Line. ±60V tolerant,
25kV ESD.
SPLIT (Pin L2): Common Mode Stabilization Output for
Optional Split Termination. ±60V tolerant, 25kV ESD. If un-
used, leave open. Internally bypassed to GND2 with 4.7nF.
CANH (Pin L3): High Level CAN Bus Line. ±60V tolerant,
25kV ESD.
GND2 (Pins L4, K1-K4, K6-K8): Isolated Side Circuit
Ground.
RS (Pin L5): Shutdown Mode/Slew Control Input. A voltage
on RS higher than VIH_RS puts the CAN transceiver in a low
power shutdown state. The CAN bus and RXD will be in
the recessive state, the CAN receiver will be disconnected
from the bus, and the power converter will continue to
operate. A voltage on RS lower than VIL_RS enables the
CAN transceiver. A resistor between RS and GND2 can be
used to control the slew rate. See Applications Information
section for details.
ADJ (Pin L6): Adjust pin to override the default 5V regula-
tion voltage of the isolated power supply. May be used to
set VCC2 to 3.3V in either the LTM2889-3 or LTM2889-5
versions. Leave floating for 5V output. See Applications
Information section for details.
VCC2 (Pin L7-L8): Isolated Power Supply Output. Internally
generated from PVCC by an isolated DC/DC converter and
regulated to 5V. Internally bypassed to GND2 with 10µF.
DNC (Pin K5): Do not make electrical connection to this
pin. Do not connect to GND2.
LTM2889
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BLOCK DIAGRAM
CANH
ADJ
VCC2
CANL
GND2GND
RE
RXD
ON
S
TXD
1µF
VL
VCC PVCC
1µF 2.2µF
10µF
= ISOLATED SIDE COMMON
2889 BD01
= LOGIC SIDE COMMON
RS
4.7nF
SPLIT
ISOLATED
COMM
INTERFACE
ISOLATED
COMM
INTERFACE
CAN TXD
CAN RXD
ISOLATED
DC/DC
CONVERTER
5V REG
(ADJUSTABLE)
Figure 9. LTM2889 Simplified Block Diagram
LTM2889
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OVERVIEW
The LTM2889 isolated CAN μModule transceiver provides
a galvanically-isolated robust CAN interface, powered by
an integrated, regulated DC/DC converter, complete with
decoupling capacitors. The LTM2889 is ideal for use in
networks where grounds can take on different voltages.
Isolation in the LTM2889 blocks high voltage differences,
eliminates ground loops and is extremely tolerant of com-
mon mode transients between ground planes. Error-free
operation is maintained through common mode events
greater than 30kV/μs providing excellent noise isolation.
Isolator µModule Technology
The LTM2889 utilizes isolator μModule technology to
translate signals and power across an isolation barrier.
Signals on either side of the barrier are encoded into pulses
and translated across the isolation boundary using core-
less transformers formed in the μModule substrate. This
system, complete with data refresh, error checking, safe
shutdown on fail, and extremely high common mode im-
munity, provides a robust solution for bidirectional signal
isolation. The μModule technology provides the means to
combine the isolated signaling with multiple regulators and
a powerful isolated DC/DC converter in one small package.
DC/DC Converter
The LTM2889 contains a fully integrated DC/DC converter,
including the transformer, so that no external components
are necessary. The logic side contains a full-bridge driver,
running at 2MHz, and is AC-coupled to a single transformer
primary. A series DC blocking capacitor prevents trans-
former saturation due to driver duty cycle imbalance. The
transformer scales the primary voltage, and is rectified
by a full-wave voltage doubler. This topology allows for a
single diode drop, as in a center tapped full-wave bridge,
and eliminates transformer saturation caused by secondary
imbalances. The DC/DC converter is connected to a low
dropout regulator (LDO) to provide a regulated 5V output.
APPLICATIONS INFORMATION
VCC2 Output
The on-board DC/DC converter provides isolated 5V
power to output VCC2. VCC2 is capable of supplying up
to 750mW of power at 5V in the LTM2889-5 option and
up to 500mW of power in the LTM2889-3 option. This
power is available to external applications. The amount
of surplus current is dependent upon the implementation
and current delivered to the CAN driver and line load.
An example of available surplus current is shown in the
Typical Performance Characteristics graph, VCC2 Surplus
Current vs Temperature. VCC2 is bypassed internally with
a 10µF capacitor.
3.3V VCC2 Output
The VCC2 supply may be adjusted to an output voltage of
3.3V by connecting a resistor divider between VCC2, the
ADJ pin, and GND2 as shown in Figure 10. Operating the
CAN transceiver at 3.3V reduces PVCC current and may
reduce EMI when used in a system with other 3.3V CAN
transceivers. For a 5V VCC2 output no resistor divider is
used, and the ADJ pin should be left unconnected.
Figure 10. Adjusting VCC2 for 3.3V Output.
2889 F10
VCC
TXD
RXD
VCC
PVCC
VL
LTM2889
VCC2
ADJ
GND2GND
GND
SRE
GND2
13.0k
56.2k
3.3V
ISOLATION BARRIER
PVCC Power Supply
The integrated DC/DC converter is powered by separate
PVCC supply pins. In typical operation, PVCC is con-
nected to the same supply as VCC. The LTM2889 may be
operated with an external isolated supply powering the
isolated CAN transceiver instead of the internal converter.
This is accomplished by applying an external source of
isolated power between the VCC2 and GND2 pins, and dis-
LTM2889
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abling the internal converter by grounding the PVCC pins
(Figure 25). In this configuration, both the LTM2889-3 and
the LTM2889-5 may be supplied with a voltage between
3V and 5.5V on the VCC pin, and either 3.3V or 5V on the
VCC2 pin. The ADJ pin should be left unconnected.
VL Logic Supply
A separate logic supply pin VL allows the LTM2889 to in-
terface with any logic signal from 1.62V to 5.5V as shown
in Figure 11. Simply connect the desired logic supply to
VL. There is no interdependency between VCC, PVCC, or
VL; they may simultaneously operate at any voltage within
their specified operating ranges and sequence in any order.
VL is bypassed internally with a 1µF capacitor.
APPLICATIONS INFORMATION
Normal Mode
With the ON pin high and S pin low, the LTM2889 operates
in Normal mode. The transceiver can transmit and receive
data via the bus lines CANH and CANL. The differential
receiver delivers a logic low level on RXD if the bus lines
are dominant or a logic high level if the bus lines are re-
cessive. The slope of the output signals on the bus lines
is controlled and optimized to minimize common mode
perturbations and electromagnetic emissions (EME).
Silent Mode
Silent mode is entered by bringing the S pin high. In this
state, the LTM2889 driver outputs become recessive,
independent of the TXD input. As shown in the block
diagram, the TXD and S pins are logically OR'd together
into the data path of the LTM2889.
OFF Mode and Unpowered State
When the ON pin is low, the device enters OFF mode and
all functions on both sides of the isolation boundary are
shut down. The isolated DC/DC converter stops operating
and the isolated supply voltage, VCC2 collapses. The CANH
and CANL lines are not driven and their common mode
bias releases control. RXD will be high-Z and passively
pulled to VL, whether VL is powered or low. A device that
is OFF draws no more than 10µA of current from PVCC,
VCC and VL.
CAN TRANSCEIVER
The LTM2889 contains a robust, high performance in-
tegrated CAN transceiver featuring fault protection, high
ESD tolerance, and a wide common mode operating range.
±60V Fault Protection
The LTM2889 features ±60V fault protection on its CAN
Bus interface pins (CANH, CANL, SPLIT) with respect to
GND2. The high breakdown voltage provides protection
during all states of operation, including dominant and
recessive states, shutdown, and powered off. The driver
outputs use a progressive foldback current limit to protect
against overvoltage faults while still allowing high current
output drive. The LTM2889 is protected from ±60V bus
Figure 11. VCC and VL Are Independent
2889 F11
LTM2889
ANY VOLTAGE FROM
1.62V TO 5.5V
3V TO 3.6V LTM2889-3
4.5V TO 5.5V LTM2889-5
5V OUTPUT
RXD
TXD
ON
S
RE
VCC PVCC
VLVCC2
GND2GND
CAN
CONTROLLER
GND
PWR
VDD
CANH
CANL
ISOLATION BARRIER
120Ω
LOGIC INTERFACE LEVELS: GND TO VL
3V TO 5.5V
OPERATING MODES
The LTM2889 supports various modes of operation as
summarized in Table 1.
Table 1. Operating Modes*
INPUTS OUTPUTS
ON TXD S RE CANH, CANL RXD MODE
1 0 0 0 DOMINANT** 0** NORMAL
1 1 0 0 RECESSIVE 1 NORMAL
1 X 1 0 RECESSIVE 1 SILENT
0 X X X HI-Z HI-Z OFF
X X X 1 Hi-Z
*1 = logic HIGH; 0 = logic LOW; X = either logic state
** if TXD dominant timeout timer has not expired
LTM2889
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APPLICATIONS INFORMATION
faults even with the loss of GND2 or VCC2 (GND2 open
faults are not tested in production). In the case of VCC2
shorted to GND2, the transceiver is off and the bus pins
remain in the high impedance state.
±36V Extended Common Mode Range
The LTM2889 CAN Bus receiver features an extended com-
mon mode operating range of –36V to 36V with respect to
GND2 when operating from a 5V VCC2 supply, and –25V
to 25V when operating from a 3.3V VCC2 supply. The wide
common mode increases the reliability of operation in
environments with high common mode voltages created
by electrical noise or local ground potential differences
between bus nodes on the isolated side of the network
due to ground loops. This extended common mode range
allows the LTM2889 to transmit and receive under condi-
tions that would cause data errors and possible device
damage in competing products.
±25kV ESD Protection
The LTM2889 features exceptionally robust ESD protec-
tion. The transceiver interface pins (CANH, CANL, SPLIT)
feature protection with respect to GND2 to ±25kV HBM
without latchup or damage, during all modes of operation
or while unpowered. The LTM2889 features ±10kV HBM
protection across the isolation barrier for discharges be-
tween any one of the interface pins (CANH, CANL, SPLIT,
VCC2, GND2) and any one of the supply pins referenced
to GND (VCC, PVCC, VL, GND).
4Mbps Operation
The LTM2889 features a high speed receiver and transmitter
capable of operating up to 4Mbps. In order to operate at
this data rate, the transmitter must be set at its maximum
slew rate by pulling the RS pin low to GND2 with no more
than 4k of resistance, including the output impedance of
the buffer driving the RS input (see RS Pin and Variable
Slew Rate Control below).
CAN Bus Driver
The driver provides full CAN compatibility. When TXD is
low with the chip enabled (RS low), the dominant state is
asserted on the CAN bus lines (subject to the TXD timeout
tTOTXD); the CANH driver pulls high and the CANL driver
pulls low. When TXD is high and RS is low, the driver is
in the recessive state; both the CANH and CANL drivers
are in the Hi-Z state and the bus termination resistor
equalizes the voltage on CANH and CANL. In the recessive
state, the impedance on CANH and CANL is determined
by the receiver input resistance, RIN. When RS is high the
transceiver is in shutdown; the CANH and CANL drivers
are in the Hi-Z state, and the receiver input resistance RIN
is disconnected from the bus by a FET switch.
Transmit Dominant Timeout Function
The LTM2889 CAN transceiver includes a 2ms (typical)
timer to limit the time that the transmitter can hold the
bus in the dominant state. If TXD is held low, a dominant
state is asserted on CANH and CANL until the TXD timer
times out at tTOTXD, after which the transmitter reverts to
the recessive state. The timer is reset when TXD is brought
high. The transmitter asserts a dominant state upon the
next TXD low.
2889 F12
tTOTXD
VDIFF
TXD
BUS
RECESSIVE
CANH
CANL
DOMINANT
TRANSMITTER
DISABLED
TRANSMITTER
ENABLED
TIME
Driver Overvoltage, Overcurrent, and Overtemperature
Protection
The driver outputs are protected from short circuits to any
voltage within the absolute maximum range of –60V to 60V
with respect to GND2. The driver includes a progressive
foldback current limiting circuit that continuously reduces
the driver current limit with increasing output fault voltage.
The fault current is typically ±10mA for fault voltages of
±60V. Refer to the "Driver Output Current vs Differential
Output Voltage (Dominant)" plot in the Typical Performance
Characteristics section.
Figure 12. Transmitter Dominant Timeout Function
LTM2889
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APPLICATIONS INFORMATION
The LTM2889 CAN transceiver also features thermal
shutdown protection that disables the driver in case of
excessive power dissipation during a fault on the CAN bus
(see Notes 3 and 4). When the transceiver die temperature
exceeds 170°C (typical), the transmitter is forced into the
recessive state. All other functions remain active during
the transceiver thermal shutdown, including the CAN bus
receiver and the module isolated communication and
power converter. Other chips in the LTM2889 also contain
thermal shutdown circuits that will shut down all module
operations at approximately 170°C.
Power-Up/Down Glitch-Free Outputs
The LTM2889 CAN transceiver employs a supply under-
voltage detection circuit to control the activation of the
circuitry on-chip. During power-up, the CANH, CANL,
RXD and SPLIT outputs remain in the high impedance
state until the supply reaches a voltage sufficient to reli-
ably operate the transceiver. At this point, the transceiver
activates if RS is low.
The receiver output goes active after a short delay tENRX
and reflects the state at the CAN bus pins, and the SPLIT
output goes active at approximately the same time. The
transmitter powers up in the high-Z recessive state until
the VCC2 supply reaches the power-good voltage, at which
time the transmitter outputs become active and reflect
the state of the TXD pin. This assures that the transmit-
ter does not disturb the bus by glitching to the dominant
state during power-up.
During power down, the reverse occurs; the supply un-
dervoltage detection circuit senses low supply voltage
and immediately puts the transceiver into shutdown. The
CANH, CANL, RXD, and SPLIT outputs go to the high
impedance state. The voltage on RXD is pulled high by
an internal pull-up resistor.
Common Mode Voltage vs Supply Voltage
When operating from the default 5V VCC2 supply voltage
the LTM2889 CAN transceiver adheres to the ISO 11898-2
CAN bus standard by maintaining drive levels that are
symmetric around VCC2/2 = 2.5V with respect to GND2.
An internal common mode reference of VCC2/2 is buffered
to supply the termination of the receiver input resistors. A
second buffer with a high voltage tolerant output supplies
VCC2/2 to the SPLIT output.
If the output from the internal isolated converter is set to
3.3V using a resistor divider on the ADJ pin (Figure 10),
the 2.5V nominal common mode voltage specified in the
ISO 11898-2 standard is too close to the 3.3V supply
to provide symmetric drive levels while maintaining the
necessary differential output voltage. To maintain driver
symmetry the common mode reference voltage is lowered
during 3.3V operation. The typical output common mode
voltage is 1.95V in the dominant state. The internal com-
mon mode reference is set to VCC2/2 + 0.3V = 1.95V to
match the dominant state output common mode voltage.
This reference is independently buffered to supply the
termination of the receiver input resistors and the SPLIT
voltage output.
As the LTM2889 CAN transceiver operates over a very
wide common mode range, this small shift of –0.55V in
the common mode when operating from 3.3V does not
degrade data transmission or reception. An LTM2889
CAN transceiver operating at 3.3V may share a bus with
other CAN transceivers operating at 5V. However, the
electromagnetic emissions (EME) may be larger if trans-
ceivers powered by different voltages share a bus, due to
the fluctuation in the common mode voltage from 1.95V
(when a CAN transceiver on a 3.3V supply is dominant) to
2.5V (when a CAN transceiver on a 5V supply is dominant).
RS Pin and Variable Slew Rate Control
The driver features adjustable slew rate for improved EME
performance. The slew rate is set by the amount of cur-
rent that is sourced by the RS pin when it is pulled below
approximately 1.1V (referenced to GND2). This allows the
slew rate to be set by a single slew control resistor RSL
in series with the RS pin (Figure 1).
The relationship between the series slew control resistor
RSL and the transmitter slew rate can be observed in
Figure 13. RSL ≤ 4k is recommended for high data rate
communication. RSL should be less than 200k to ensure
that the RS pin can be reliably pulled below VIL_RS to
enable the chip.
LTM2889
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APPLICATIONS INFORMATION
Figure 13. Slew Rate vs Slew Control Resistor RSL
RSL (kΩ)
SLEW RATE (V/µs) (CANH-CANL)
2889 F13
60
50
40
30
20
10
01 10 100
VCC2 = 5V
VCC2 = 3.3V
When a voltage between 1.1V and VCC2 is applied, the RS
pin acts as a high impedance receiver. A voltage above
VIH_RS puts the chip in shutdown, while a voltage below
VIL_RS but above 1.1V activates the chip and sets the
transmitter to the minimum slew rate.
The slew control circuit on the RS pin is activated at applied
voltages below 1.1V. The RS pin can be approximately
modeled as a 1.1V voltage source with a series resistance
of 2k and a current compliance limit of –100µA, and a
250k pull-up resistor to VCC2 (Figure 14). Lowering the
voltage on RS increases the slew control current ISC be-
ing drawn from the slew control circuit until the voltage
reaches ~0.9V, where the current drawn from the circuit
is ~ –100µA. Below an applied voltage of ~ 0.9V, the slew
control circuit sources no additional current, and the
current drawn from it remains at ~ –100µA down to 0V.
The total current IRS drawn from the RS pin for input volt-
age 0.9V ≤ VRS ≤ 1.1V is the sum of the internal pull-up
resistor current IRS and the slew control current ISC.
I
RS(0.9V ≤VRS ≤1.1V)
=I
PU
+I
SC
=VCC2 – VRS
250k
+1.1V – VRS
2k
The transmitter slew rate is controlled by the slew control
current ISC with increasing current magnitude correspond-
ing to higher slew rates. The slew rate can be controlled
using a single slew control resistor RSL in series with the
RS pin. When the RS pin is pulled low towards ground
by an external driver, RSL limits the amount of current
drawn from the RS pin and sets the transmitter slew rate.
Alternatively, the slew rate may be controlled by an external
voltage or current source.
Figure 14. Equivalent Circuit of RS Pin
2889 F14
ISC
(–100µA LIMIT)
RS IPU
VCC2
IRS
IDEAL
DIODE
GND2
2k
1.1V
+
–
V
250k
High Symmetry Driver with Variable Slew Rate
The electromagnetic emissions spectrum of a differential
line transmitter is largely determined by the variation in the
common mode voltage during switching, as the differential
component of the emissions from the two lines cancel,
while the common mode emissions of the two lines add.
The LTM2889 transmitter has been designed to maintain
highly symmetric transitions on the CANH and CANL lines
to minimize the perturbation of the common mode voltage
during switching (Figure 15), resulting in low EME. The
common mode switching symmetry is guaranteed by the
VSYM specification.
Figure 15. Low Perturbation of Common
Mode Voltage During Switching
200ns/DIV
CANL
500mV/DIV
COMMON MODE
500mV/DIV
CANH
500mV/DIV
2889 F15
1Mbps
LTM2889-3
PVCC = VCC = 3.3V
LTM2889
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In addition to full compliance with the ISO 11898-2 stan-
dard, LTM2889 meets the more stringent requirements
of ISO 11898-5 for bus driver symmetry. This requires
that the common mode voltage stay within the limits not
only during the static dominant and recessive states, but
during the bit transition states as well. Ultra-high speed
peak detect circuits are used during manufacturing test
to ensure that VSYM limits are not exceeded at any point
during the switching cycle.
The high frequency content may be reduced by choosing
a lower data rate and a slower slew rate for the signal
transitions. The LTM2889 CAN transceiver provides an
approximate 20 to 1 reduction in slew rate, with a cor-
responding decrease in the high frequency content. The
lowest slew rate is suitable for data communication at
200kbps or below, while the highest slew rate supports
4Mbps. The slew rate limit circuit maintains consistent
control of transmitter slew rates across voltage and
temperature to ensure predictable performance under all
operating conditions. Figure 16 demonstrates the reduction
in high frequency content of the common mode voltage
achieved by the lowest slew rate compared to the highest
slew rate when operating at 200kbps.
APPLICATIONS INFORMATION
Figure 16. Power Spectrum of Common Mode Voltage Showing
High Frequency Reduction of Lowest Slew Rate (RSL = 200k)
Compared to Highest Slew Rate (RSL = 0)
500kHz/DIV
0dB
0dB
20dB/DIV
20dB/DIV
2889 F16
RSL = 0
RSL = 200k
SPLIT Pin Output for Split Termination Support
Split termination is an optional termination technique
to reduce common mode voltage perturbations that
can produce EME. A split terminator divides the single
line-end termination resistor (nominally 120Ω) into two
series resistors of half the value of the single termination
resistor (Figure 2). The center point of the two resistors
is connected to a low impedance voltage source that sets
the recessive common mode voltage.
Split termination suppresses common mode voltage
perturbations by providing a low impedance load to com-
mon mode noise sources such as transmitter noise or
coupling to external noise sources. In the case of single
resistor termination, the only load on a common mode
noise source is the parallel impedance of the input resis-
tors of the CAN transceivers on the bus. This results in a
common mode impedance of several kilohms for a small
network. The split termination, on the other hand, provides
a common mode load equal to the parallel resistance of
the two split termination resistors, or ¼ the resistance of
the single termination resistor (30Ω). This low common
mode impedance results in a reduction of the common
mode noise voltage compared to the much higher com-
mon mode impedance of the single resistor termination.
The SPLIT pin on the LTM2889 provides a buffered volt-
age to bias the mid-point of the split termination resistors.
The voltage on the SPLIT pin matches the common mode
voltage established by the transmitter in the dominant
state and the receiver input resistor bias during the reces-
sive state: 2.5V when VCC2 = 5V and 1.95V when VCC2 =
3.3V. SPLIT is decoupled to GND2 with an internal 4.7nF
capacitor to lower the AC impedance to better suppress
fast transients. SPLIT is a high voltage fault tolerant output
that tolerates the same ±60V overvoltage faults and ±25kV
ESD discharges as CANH and CANL.
One disadvantage of the SPLIT termination is higher power
supply current if the two terminating transceivers differ in
their common mode voltage due to differences in VCC2 or
GND2 potential or to chip to chip variations in the internal
reference voltages. This will result in the transceiver with
the higher common mode voltage sourcing current into
the bus lines through its SPLIT pin, while the transceiver
with the lower common mode voltage will sink current
through its SPLIT pin.
LTM2889
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APPLICATIONS INFORMATION
Ideal Passive Behavior to CAN Bus With Supply Off
When the power supply is removed or the chip is in shut-
down, the CANH and CANL pins are in a high impedance
state. The receiver inputs are isolated from the CANH and
CANL nodes by FET switches which open in the absence
of power, thereby preventing the resistor dividers on the
receiver input from loading the bus. The high impedance
state of the receiver is limited by ESD clamps inboard of
the 40k input resistors to a typical range of –0.5V to 11V.
For bus voltages outside this range, the current flowing into
the receiver is governed by the conduction voltages of the
ESD device and the 40k nominal receiver input resistance.
DeviceNet Compatibility
DeviceNet is a network standard based on the CAN bus.
The DeviceNet standard places requirements on the trans-
ceiver that exceed those of the ISO 11898-2 standard.
The LTM2889 meets the DeviceNet requirements listed
in Table 2.
DeviceNet employs a 5-pin connector with conductors for
Power+, Power–, CANH, CANL, and Drain. The power is
24VDC, and the Drain wire is connected to the cable shield
for shielded cables. The Power– pin may be connected to
LTM2889 GND2, but the Power+ must not be connected
to the LTM2889 VCC2 pin.
Table 2: DeviceNet Requirements
PARAMETER DeviceNet
REQUIREMENT
ISO 11898-2
REQUIREMENT
LTM2889
Number of Nodes 64 N/A 166
Minimum Differential
Input Resistance
20k 10k 50k
Differential Input
Capacitance
25pF (Max) 10pF (Nom) 8.4pF (Typ)
(Note 6)
Bus Pin Voltage Range
(Survivable)
–25V to 18V –3V to 16V
(for 12V Battery)
–60V to 60V
Bus Pin Voltage Range
(Operation)
–5V to 10V –2V to 7V –36V to 36V
(VCC = 5V)
Connector Mis-Wiring
Tests, All Pin-Pin
Combinations
±18V N/A ±60V
(See Below)
The DeviceNet mis-wiring tests involve connecting an
18V supply to each of the 20 possible pin pair/polarity
combinations on the 5-pin connector. The ±60V tolerance
of the LTM2889 with respect to GND2 ensures that the
LTM2889 will pass all the mis-wiring tests without damage.
PCB Layout Considerations
The high integration of the LTM2889 makes PCB layout
very simple. However, to optimize its electrical isolation
characteristics, EMI, and thermal performance, some
layout considerations are necessary.
• Under heavily loaded conditions PVCC and GND current
can exceed 300mA. Sufficient copper must be used
on the PCB to insure resistive losses do not cause the
supply voltage to drop below the minimum allowed
level. Similarly, the VCC2 and GND2 conductors must
be sized to support any external load current. These
heavy copper traces will also help to reduce thermal
stress and improve the thermal conductivity.
• Input and Output decoupling is not required, since
these components are integrated within the package.
An additional bulk capacitor with a value of 6.8μF to
22μF with 1Ω to 3Ω of ESR is recommended. The high
ESR of this capacitor reduces board resonances and
minimizes voltage spikes caused by hot plugging of
the supply voltage. For EMI sensitive applications, an
additional low ESL ceramic capacitor of 1μF to 4.7μF,
placed as close to the power and ground terminals as
possible, is recommended. Alternatively, a number of
smaller value parallel capacitors may be used to reduce
ESL and achieve the same net capacitance.
• Do not place copper on the PCB between the inner col-
umns of pads. This area must remain open to withstand
the rated isolation voltage.
• The use of solid ground planes for GND and GND2
is recommended for non-EMI critical applications to
optimize signal fidelity, thermal performance, and to
minimize RF emissions due to uncoupled PCB trace
conduction. The drawback of using ground planes,
where EMI is of concern, is the creation of a dipole
antenna structure which can radiate differential voltages
formed between GND and GND2. If ground planes are
used it is recommended to minimize their area, and
use contiguous planes as any openings or splits can
exacerbate RF emissions.
LTM2889
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• For large ground planes a small capacitance (≤ 330pF)
from GND to GND2, either discrete or embedded within
the substrate, provides a low impedance current return
path for the module parasitic capacitance, minimizing
any high frequency differential voltages and substantially
reducing radiated emissions. Discrete capacitance will
not be as effective due to parasitic ESL. In addition, volt-
age rating, leakage, and clearance must be considered
for component selection. Embedding the capacitance
within the PCB substrate provides a near ideal capacitor
and eliminates component selection issues; however,
the PCB must be 4 layers. Care must be exercised in
applying either technique to insure the voltage rating
of the barrier is not compromised. The PCB layout in
Figures 17-21 show the low EMI demo board for the
LTM2889. The demo board uses a combination of EMI
mitigation techniques, including both embedded PCB
bridge capacitance and discrete GND to GND2 capaci-
tors (C3 + C4). Tw o safety rated type Y2 capacitors are
used in series, manufactured by Murata, part number
GA342QR7GF471KW01L. The embedded capacitor
effectively suppresses emissions above 400MHz,
whereas the discrete capacitors are more effective be-
low 400MHz. EMI performance is shown in Figure 22,
measured using a Gigahertz Transverse Electromagnetic
(GTEM) cell and method detailed in IEC 61000-4-20,
“Testing and Measurement Techniques – Emission
and Immunity Testing in Transverse Electromagnetic
Waveguides.”
RF, MAGNETIC FIELD IMMUNITY
The isolator μModule technology used within the LTM2889
has been independently evaluated, and successfully passed
the RF and magnetic field immunity testing requirements
per European Standard EN 55024, in accordance with the
following test standards:
APPLICATIONS INFORMATION
EN 61000-4-3 Radiated, Radio-Frequency,Electromagnetic
Field Immunity
EN 61000-4-8 Power Frequency Magnetic Field Immunity
EN 61000-4-9 Pulse Magnetic Field Immunity
Tests were performed using an unshielded test card de-
signed per the data sheet PCB layout recommendations.
Specific limits per test are detailed in Table 3.
Table 3.
TEST FREQUENCY FIELD STRENGTH
EN61000-4-3 Annex D 80MHz to 16Hz 10V/m
1.4MHz to 2Hz 3V/m
2MHz to 2.7Hz 1V/m
EN61000-4-8 Level 4 50MHz to 60Hz 30A/m
EN61000-4-8 Level 5 60Hz 100A/m*
EN61000-4-9 Level 5 Pulse 100A/m
*Non IEC method
Operation Above 105°C (LTM2889H)
Operation of the H temperature grade LTM2889H above
105°C is limited by the internal power dissipation of the
module, and depends on the PVCC voltage range option, the
external ICC2 load current, and whether the CAN transceiver
is on or off. Refer to the Typical Performance Character-
istics chart labeled Derating for 125°C Maximum Internal
Operating Temperature on page 13. The CAN transceiver
of the LTM2889H may operate up to 125°C if VCC2 is
supplied by an external power supply and the PVCC pins
are grounded. Refer to PVCC Power Supply on page 16.
LTM2889
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Figure 20. Low EMI Demo Board Layout (DC1746A), Inner Layer 2
Figure 21. Low EMI Demo Board Layout (DC1746A), Bottom Layer
APPLICATIONS INFORMATION
Figure 22. Low EMI Demo Board Emissions
DETECTOR = QPEAK
RBW = 120kHz
VBW = 300kHz
SWEEP TIME = 17s
# OF POINTS = 501
CISPR 22 CLASS B LIMIT
DC1903A–A
DC1903A–B
FREQUENCY (MHz)
0
100
200
300
400
500
600
700
800
900
1000
–30
–20
–10
0
10
20
30
40
50
60
AMPLITUDE (dBµV/m)
2889 F22
LTM2889
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TYPICAL APPLICATIONS
Figure 23. Point-to-Point Isolated CAN Communications on an Unshielded Twisted Pair
Figure 24. Using the LTM2889 as a Dedicated Isolated 5V Supply
LTM2889
VCCA
CANH
CANL
GND2
60Ω
60Ω
GND
A
SPLIT
2889 F23
VCC,
PVCC
ISOLATION BARRIER
VL
TXD
ON
S
RXD
RE
LTM2889
VCCB
CANH
CANL
GND2
60Ω
60Ω
GND
B
SPLIT
VCC,
PVCC
ISOLATION BARRIER
VL
TXD
ON
S
RXD
RE
2889 F24
LTM2889
3.3V (LTM2889-3) OR
5V (LTM2889-5) 5V OUTPUT
AVAILABLE CURRENT:
150mA (LTM2889-5)
100mA (LTM2889-3)
TXD
RXD
ON
S
RE
VCC,
PVCC
VLVCC2
GND2GND
PWR
CANH
CANL
ISOLATION BARRIER
ON
OFF
Figure 25. Supplying VCC2 From an External Supply
2889 F25
LTM2889
ANY VOLTAGE FROM
1.62V TO 5.5V 3V TO 5.5V POWER INPUT :
3.3V or 5V AT
60mA
RXD
TXD
ON
S
RE
VCC
VLVCC2
GND2GND
CAN
CONTROLLER
GND
VDD
CANH
CANL
ISOLATION BARRIER
120Ω
LOGIC INTERFACE LEVELS: GND TO VL
PVCC
LTM2889
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PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM2889#packaging for the most recent package drawings.
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
BALL DESIGNATION PER JESD MS-028 AND JEP95
4
3
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
PACKAGE TOP VIEW
4
PIN “A1”
CORNER
X
Y
aaa Z
aaa Z
PACKAGE BOTTOM VIEW
3
SEE NOTES
SUGGESTED PCB LAYOUT
TOP VIEW BGA 32 1112 REV D
LTMXXXXXX
µModule
TRAY PIN 1
BEVEL PACKAGE IN TRAY LOADING ORIENTATION
COMPONENT
PIN “A1”
DETAIL A
PIN 1
0.000
0.635
0.635
1.905
1.905
3.175
3.175
4.445
4.445
6.350
6.350
5.080
5.080
0.000
DETAIL A
Øb (32 PLACES)
F
G
H
L
J
K
E
A
B
C
D
2 14 35678
DETAIL B
SUBSTRATE
0.27 – 0.37
2.45 – 2.55
// bbb Z
D
A
A1
b1
ccc Z
DETAIL B
PACKAGE SIDE VIEW
MOLD
CAP
Z
MX YZddd
MZeee
0.630 ±0.025 Ø 32x
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
aaa
bbb
ccc
ddd
eee
MIN
3.22
0.50
2.72
0.60
0.60
NOM
3.42
0.60
2.82
0.75
0.63
15.0
11.25
1.27
12.70
8.89
MAX
3.62
0.70
2.92
0.90
0.66
0.15
0.10
0.20
0.30
0.15
NOTES
DIMENSIONS
TOTAL NUMBER OF BALLS: 32
E
b
e
e
b
A2
F
G
BGA Package
32-Lead (15mm × 11.25mm × 3.42mm)
(Reference LTC DWG # 05-08-1851 Rev D)
7
SEE NOTES
LTM2889
29
2889fa
For more information www.linear.com/LTM2889
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 03/17 Added UL-CSA File Number 1
LTM2889
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For more information www.linear.com/LTM2889
LINEAR TECHNOLOGY CORPORATION 2016
LT 0317 REV A • PRINTED IN USA
www.linear.com/LTM2889
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2889 TA02
LTM2889-3
TXD
RXD
ON
S
RE
VCC,
PVCC
VL
VDD
VCCA
GND2GND
A
GND
CANH
120Ω
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SENSOR OR ACTUATOR
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+
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TXD
RXD
ON
S
RE
VCC,
PVCC
VL
VDD
VCCC
GND2GND
C
GND
CANH
CANL
CABLE
SHIELD OR
GND WIRE
ISOLATION BARRIER
SENSOR OR ACTUATOR
µC
+
CAN
