STGIF5CH60TS-L SLLIMMTM - 2nd series IPM, 3-phase inverter, 8 A, 600 V short-circuit rugged IGBTs Datasheet - production data Applications * 3-phase inverters for motor drives * Home appliances such as washing machines, refrigerators, air conditioners and sewing machine Description Features * IPM 8 A 600 V 3-phase IGBT inverter bridge including 2 control ICs for gate driving and freewheeling diodes This second series of SLLIMM (small low-loss intelligent molded module) provides a compact, high performance AC motor drive in a simple, rugged design. It combines new ST proprietary control ICs (one LS and one HS driver) with an improved short-circuit rugged trench gate fieldstop (TFS) IGBT, making it ideal for 3-phase inverter systems such as home appliances and air conditioners. SLLIMMTM is a trademark of STMicroelectronics. * 3.3 V, 5 V TTL/CMOS inputs with hysteresis * Internal bootstrap diode * Undervoltage lockout * Smart shutdown function * Short-circuit protection * Shutdown input/fault output * Separate open emitter outputs * Built-in temperature sensor * Comparator for fault protection * Short-circuit rugged TFS IGBTs * Very fast, soft recovery diodes * 85 k NTC UL 1434 CA 4 recognized * Fully isolated package * Isolation rating of 1500 Vrms/min Table 1. Device summary Order code Marking Package Packaging STGIF5CH60TS-L GIF5CH60TS-L SDIP2F-26L Tube September 2015 This is information on a product in full production. DocID026578 Rev 5 1/25 www.st.com Contents STGIF5CH60TS-L Contents 1 Internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Fault management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 TSO output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 DocID026578 Rev 5 STGIF5CH60TS-L 1 Internal schematic and pin description Internal schematic and pin description Figure 1. Internal schematic diagram and pin configuration 1& 7 9ERRW8 7 9ERRW9 9ERRW: 3 +LQ8 8 +LQ9 +LQ: 9 9FF+ : *1' +VLGH /LQ8 /LQ9 /LQ: 18 9FF/ 19 6'2' &LQ 1: *1' 762 /VLGH DocID026578 Rev 5 3/25 25 Internal schematic and pin description STGIF5CH60TS-L Table 2. Pin description 4/25 Pin Symbol Description 1 NC 2 VBOOTu Bootstrap voltage for U phase 3 VBOOTv Bootstrap voltage for V phase 4 VBOOTw Bootstrap voltage for W phase 5 HINu High-side logic input for U phase 6 HINv High-side logic input for V phase 7 HINw High-side logic input for W phase 8 VCCH High-side low voltage power supply 9 GND Ground 10 LINu Low-side logic input for U phase 11 LINv Low-side logic input for V phase 12 LINw Low-side logic input for W phase 13 VCCL Low-side low voltage power supply 14 SD/OD Shutdown logic input (active low) / open-drain (comparator output) 15 CIN Comparator input 16 GND Ground 17 TSO Temperature sensor output 18 NW Negative DC input for W phase 19 NV Negative DC input for V phase 20 NU Negative DC input for U phase 21 W W phase output 22 V V phase output 23 U U phase output 24 P Positive DC input 25 T2 NTC thermistor terminal 2 26 T1 NTC thermistor terminal 1 - DocID026578 Rev 5 STGIF5CH60TS-L 2 Absolute maximum ratings Absolute maximum ratings (Tj= 25C unless otherwise noted). Table 3. Inverter parts Symbol VPN Parameter Supply voltage between P -NU, -NV, -NW VPN(surge) Supply voltage surge between P -NU, -NV, -NW VCES Collector-emitter voltage each IGBT Value Unit 450 V 500 V 600 V Continuous collector current each IGBT (TC= 25 C) 8 Continuous collector current each IGBT (TC = 80 C) 5 ICP Peak collector current each IGBT (less than 1ms) 16 A PTOT Total dissipation at TC=25C each IGBT 30 W tSCW Short-circuit withstand time, VCE = 300 V, TJ = 125 C, VCC = Vboot = 15 V, VIN = 0 to 5 V 5 s IC A Table 4. Control parts Symbol Min Max Unit Supply voltage between VCCH-GND, VCCL-GND -0.3 20 V VBOOT Bootstrap voltage -0.3 619 V VOUT Output voltage between U, V, W and GND VBOOT 21 VBOOT + 0.3 V VCIN Comparator input voltage -0.3 20 V VIN Logic input voltage applied between HINx, LINx and GND -0.3 15 V VSD/OD Open drain voltage -0.3 7 V ISD/OD Open drain sink current - 10 mA VTSO Temperature sensor output voltage -0.3 5.5 V ITSO Temperature sensor output current - 7 A VCC Parameter Table 5. Total system Symbol VISO Parameter Isolation withstand voltage applied between each pin and heat sink plate (AC voltage, t = 60sec.) Value Unit 1500 Vrms TJ Power chips operating junction temperature -40 to 175 C TC Module case operation temperature -40 to 125 C DocID026578 Rev 5 5/25 25 Absolute maximum ratings STGIF5CH60TS-L Table 6. Thermal data Symbol Rth(j-c) 6/25 Parameter Value Thermal resistance junction-case single IGBT 5 Thermal resistance junction-case single diode 9 DocID026578 Rev 5 Unit C/W STGIF5CH60TS-L 3 Electrical characteristics Electrical characteristics (Tj= 25C unless otherwise noted) Symbol Table 7. Inverter parts Parameter Collector-cut off current Test condition Min Typ VCE = 600 V, VCC = Vboot = 15 V - VCC = VBoot = 15 V, VIN(1)= 0 to 5 V, IC = 5 A, - 1.5 VCC = VBoot = 15 V, VIN(1)= 0 to 5 V, IC = 8 A, - 1.7 VIN(1) = 0, IC = 5 A - 2.1 VIN(1) - 2.4 Turn-on time - 265 Cross-over time on - 110 Turn-off time - 305 tc(off) Cross-over time off - 92 trr Reverse recovery time - 100 Eon Turn-on switching loss - 90 Eoff Turn-off switching loss - 60 Err Reverse recovery energy loss ton Turn-on time - 282 Cross-over time on - 126 Turn-off time - 295 tc(off) Cross-over time off - 90 trr Reverse recovery time - 100 Eon Turn-on switching loss - 163 Eoff Turn-off switching loss - 86 Err Reverse recovery energy loss ICES Collector-emitter VCE(sat) saturation voltage VF Diode forward voltage = 0, IC = 8 A Max Unit 100 A 1.95 V 2.7 V V Inductive load switching time and energy (2) ton tc(on) toff tc(on) toff VDD = 300 V, VCC = Vboot = 15 V, VIN(1) = 0 to 5 V, IC = 5 A ns J 5.6 VDD = 300 V, VCC = Vboot = 15 V, VIN(1) = 0 to 5 V, IC = 8 A ns J 9.2 1. Applied between HINx, LINx and GND for x = U, V, W 2. ton and toff include the propagation delay time of the internal drive. tC(on) and tC(off) are the switching time of IGBT itself under the internally given gate driving condition. DocID026578 Rev 5 7/25 25 Electrical characteristics STGIF5CH60TS-L Figure 2. Switching time test circuit *D 9FF 9&& %227 +,1 +9* *1' 287 / 7 & 9GG 7 ,QSXW 9&& /,1 5VG 9 6' 7DF /9* &,1 *1' Figure 3. Switching time definition 100% IC 100% IC t rr IC VCE VCE IC VIN VIN t ON t OFF t C(OFF) t C(ON) VIN(ON) 10% IC 90% IC 10% VCE (a) turn-on 8/25 VIN(OFF) 10% VCE (b) turn-off DocID026578 Rev 5 10% IC AM09223V1 STGIF5CH60TS-L Electrical characteristics Table 8. Control / protection parts Symbol Parameter Test condition Vil Low logic level voltage Vih High logic level voltage IINh IN logic "1" input bias current INx=15V IINl IN logic "0" input bias current INx=0V Min Typ Max Unit 0.8 V 2 80 V 150 200 A 1 A High side VCC_hys 1.2 1.4 1.7 V VCCH_th(on) VCCH UV turn-on threshold 11 11.5 12 V VCCH_th(off) VCCH UV turn-off threshold 9.6 10.1 10.6 V VBS UV hysteresis 0.5 1 1.6 V VBS_th(on) VBS UV turn-on threshold 10.1 11 11.9 V VBS_th(off) VBS UV turn-off threshold 9.1 10 10.9 V VBS_hys VCC UV hysteresis IQBSU Under voltage VBS quiescent current VBS = 9 V, HINx(1) = 5V; 55 75 A IQBS VBS quiescent current VCC = 15 V, HINx (1) = 5V 125 170 A Iqccu Under voltage quiescent supply current VCC = 9 V, HINx (1) = 0 190 250 A Iqcc Quiescent current VCC = 15 V, HINx (1) = 0 560 730 A RDS(on) BS driver ON resistance 150 Low side 1.1 1.4 1.6 V VCCL_th(on) VCCL UV turn-on threshold 10.4 11.6 12.4 V VCCL_th(off) 9.0 10.3 11 V VCC_hys VCC UV hysteresis VCCL UV turn-off threshold Iqccu Under voltage quiescent supply current VCC = 10 V, SD pulled to 5V through RSD = 10k, CIN = LINx 1) = 0; 600 800 A Iqcc Quiescent current VCC = 15 V, SD = 5V, CIN = LINx 1) = 0; 700 900 A 0.5 0.6 0.75 V 25 50 70 A 1 A VSSD Smart SD unlatch threshold ISDh SD logic "1" input bias current SD = 5V ISDl SD logic "0" input bias current SD =0V DocID026578 Rev 5 9/25 25 Electrical characteristics STGIF5CH60TS-L Table 8. Control / protection parts (continued) Symbol Parameter Test condition Min Typ Max Unit Temperature sensor output Temperature sensor output Tj = 25 C voltage 1.4 V ITSO_SNK Temperature sensor sink current capability 0.1 mA ITSO_SRC Temperature sensor source current capability VTSO 4 mA 1. Applied between HINx, LINx and GND for x = U, V, W Table 9. Sense comparator (VCC = 15 V, unless otherwise is specified) Symbol Parameter Test condition ICIN CIN input bias current Vref Internal reference voltage VOD Open drain low level output Iod = 5mA voltage VCIN =1V SD fall slew rate SD pulled to 5V through RSD=10k; CL=1nF through SD and ground; 90% SD to 10% SD Typ -0.2 460 SD pulled to 5V through RSD=10k; measured applying a tCIN_SD CIN comparator delay to SD voltage step 0-1V to Pin CIN 50% CIN to 90% SD SRSD Min 150 510 230 25 Note: Comparator stay enabled even if VCC is in UVLO condition but higher than 4 V. 10/25 DocID026578 Rev 5 Max Unit 0.2 A 560 mV 500 mV 320 ns V/s STGIF5CH60TS-L 4 Fault management Fault management The device integrates an open-drain output connected to SD Pin. As soon as a fault occurs the open-drain is activated and LVGx outputs are forced low. Two types of fault can be pointed out: * Overcurrent (OC) sensed by the internal comparator (see more detail in Section 4.2: Smart shutdown function); * Undervoltage on supply voltage (VCC); Each fault enables the SD open drain for a different time; refer to the following Table 10: Fault timing. Table 10. Fault timing Symbol OC Parameter Event time SD open-drain enable time result 20 s 20 s 20s OC time 50 s 50s 50s until the VCC_LS exceed the VCC_LS UV turn ON threshold UVLO time Over-current event UVLO Under-voltage lock out event Actually the device remains in a fault condition (SD at low logic level and LVGx outputs disabled) for a time also depending on RC network connected to SD pin. The network generates a time contribution that adds up to the internal value. Figure 4. Overcurrent timing (without contribution of RC network on SD) *,3*)65 DocID026578 Rev 5 11/25 25 Fault management STGIF5CH60TS-L Figure 5. UVLO timing (without contribution of RC network on SD) *,3*)65 4.1 TSO output The device integrates temperature sensor. A voltage proportional to die temperature is available on TSO pin. When this function is not used the Pin can be left floating. 4.2 Smart shutdown function The device integrates a comparator committed to the fault sensing function. The comparator input can be connected to an external shunt resistor in order to implement a simple overcurrent detection function. The output signal of the comparator is fed to an integrated MOSFET with the open drain output available on SD input. When the comparator triggers, the device is set in shutdown state and its outputs are all set to low level. 12/25 DocID026578 Rev 5 STGIF5CH60TS-L Fault management Figure 6. Smart shutdown timing waveforms in case of overcurrent event FRPS 9UHI 3527(&7,21 &,1 U $*/@4% /,1 /9* 6' O RSHQGUDLQJDWH LQWHUQDO W W W 2& UHDOGLVDEOHWLPH )DVWVKXWGRZQ WKHGULYHURXWSXWVDUHVHWLQ6'VWDWH LPPHGLDWHO\DIWHUFRPSDUDWRUWULJJHULQJ HYHQLIWKH6'VLJQDOKDVQRW\HWUHDFKHG WKHORZHULQSXWWKUHVKROG W W 6+87'2:1&,5&8,7 ZKHUH 9%,$6 56' 6' )52072 &21752//(5 &6' Note: 5 3'B6' 5 21B2' 60$57 6' /2*,& RON_OD = VOD/5 mA see Table 9; RPD_SD (typ) = 5 V/ISDh DocID026578 Rev 5 13/25 25 Fault management STGIF5CH60TS-L In common over-current protection architectures the comparator output is usually connected to the SD input and an RC network is connected to this SD line in order to provide a monostable circuit, which implements a protection time that follows the fault condition. Differently from the common fault detection systems, the device Smart shutdown architecture allows to immediately turn-off the outputs gate driver in case of fault, by minimizing the propagation delay between the fault detection event and the actual outputs switch-off. In fact the time delay between the fault and the outputs turn off is no more dependent on the RC value of the external network connected to the pin. In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after the comparator triggering. At the same time the internal logic turns on the open drain output and holds it on until the SD voltage goes below the VSSD threshold and toc time is elapsed. The driver outputs restart following the input pins as soon as the voltage at the SD pin reaches the higher threshold of the SD logic input. The Smart shutdown system provides the possibility to increase the time constant of the external RC network (that is the disable time after the fault event) up to very large values without increasing the delay time of the protection. 14/25 DocID026578 Rev 5 DocID026578 Rev 5 976217& )DXOW /LQ: /LQ9 /LQ8 +LQ: +LQ9 +LQ8 9 9 5 5 5 5 5 5 & 9FF 9F F &ERRW: 976217& &6' 56' & & & & & & '] & &762 '] &YFF &YF F & & '] &ERRW9 & 6*1B*1' '] '] &ERRW8 762 *1' &LQ 6'2' 9FF/ /LQ: /LQ9 /LQ8 *1' 9FF+ +LQ: +LQ9 +LQ8 9ERRW: 9ERRW9 9ERRW8 1& /VLGH +VLGH 56) &6) 1: 19 18 : 9 8 3 7 7 0 & 976217& &72 WR0&8RSDPS 3:5B*1' 5VKXQW 572 &YGF 5 99 STGIF5CH60TS-L Typical application circuit Typical application circuit Figure 7. Typical application circuit 0,&52&21752//(5 15/25 25 Recommendations 6 STGIF5CH60TS-L Recommendations 1. Input signals HIN, LIN are active-high logic. A 500 k (typ.) pull-down resistor is built-in for each high side input. To prevent input signal oscillation, the wiring of each input should be as short as possible and the use of RC filters (R1, C1) on each input signal is suggested. The filters should be done with a time constant of about 100 ns and must be placed as close as possible to the IPM input pins. 2. The bypass capacitor Cvcc (aluminum or tantalum) is recommended to reduce the transient circuit demand on the power supply. In addition, a decoupling capacitor C2 (100 to 220 nF, with low ESR and low ESL) is suggested, to reduce high frequency switching noise distributed on the power supply lines. It must be placed as close as possible to each Vcc pin and in parallel to the bypass capacitor. 3. The use of RC filter (RSF, CSF) for preventing protection circuit malfunction is recommended. The time constant (RSF x CSF) should be set to 1us and the filter must be placed as close as possible to the CIN pin. 4. The SD is an input/output pin (open drain type if used as output). It should be pulled up to MCU power supply (3.3/5 V) by a resistor higher than 1.0 k in order to keep Iod lower than 5 mA. The filter on SD has to be sized to get a desired re-starting time after a fault event and placed as close as possible to the SD pin. 5. To increase the noise immunity of the TSO thermal sensor, it is recommended to parallel a decoupling capacitor CTSO between 1nF and 10nF. Similarly, if the NTC thermistor is available and used, it is recommended to parallel a decoupling capacitor COT between 10nF and 100nF. In both cases, the capacitors must be placed close to the MCU. 6. The decoupling capacitor C3 (100 to*220 nF, with low ESR and low ESL) in parallel with each Cboot is recommended to filter high frequency disturbances. Both Cboot and C3 must be placed as close as possible to the U,V,W and Vboot pins. Bootstrap negative electrodes should be connected to U,V,W terminals directly and separated from the main output wires. 7. A Zener diode (Dz1) between each Vcc pin and GND, and in parallel (Dz2) with each Cboot is suggested in order to prevent overvoltage. 8. The decoupling capacitor C4 (100 to 220 nF, with low ESR and low ESL) in parallel with the electrolytic capacitor Cvdc is recommended, in order to prevent surge destruction. Both capacitors C4 and Cvdc should be placed as close as possible to the IPM (C4 has priority over Cvdc). 9. By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an opto-coupler is possible. 10. Low inductance shunt resistors should be used for phase leg current sensing 11. In order to avoid malfunctions, the wiring between N pins, the shunt resistor and PWR_GND should be as short as possible. 12. It is recommended to connect SGN_GND to PWR_GND at only one point (near the terminal of shunt resistor), in order to avoid any malfunction due to power ground fluctuation. 16/25 DocID026578 Rev 5 STGIF5CH60TS-L Recommendations Table 11. Recommended operating conditions Symbol Parameter Test condition Min VPN Supply voltage Applied between P-Nu, NV, Nw VCC Control supply voltage Applied between VCC-GND VBS High side bias voltage Applied between VBOOTi-OUTi for i = U, V, W 13 tdead Blanking time to prevent Arm-short For each input signal 1.0 fPWM PWM input signal -40 C < TC < 100 C -40 C < Tj < 125 C TC Case operation temperature DocID026578 Rev 5 13.5 Typ Max Unit 300 400 V 15 18 V 18 V s 20 kHz 100 C 17/25 25 NTC thermistor 7 STGIF5CH60TS-L NTC thermistor Table 12. NTC thermistor Symbol Parameter Test condition Min Typ Max Unit R25 Resistance T = 25C 85 - k R125 Resistance T = 125C 2.6 - k B B-constant T = 25C to 100C 4092 - K T Operating temperature range 125 C -40 Figure 8. NTC resistance vs. temperature N & *,3*)65 18/25 DocID026578 Rev 5 STGIF5CH60TS-L NTC thermistor Figure 9. NTC resistance vs. temperature - zoom N 0D[ 7\S 0LQ & *,3*)65 DocID026578 Rev 5 19/25 25 Electrical characteristics (curves) 8 STGIF5CH60TS-L Electrical characteristics (curves) Figure 10. Output characteristics ,& $ Figure 11. Vce(sat) vs collector current 9&& 9 9&( VDW 9 9 9 ,*%72& ,*%79&(& 9&& 9 7- & 7- & 9&( 9 Figure 12. Diode VF vs forward current 9) 9 ,*%7'9) ,& $ Figure 13. Eon switching loss vs collector current (21 P ,*%76/& 9'' 99&& 9ERRW 9 7- & 7- & 7- & 20/25 7- & ,) $ DocID026578 Rev 5 ,& $ STGIF5CH60TS-L Electrical characteristics (curves) Figure 14. Eoff switching loss vs collector current (2)) P Figure 15. VTSO output characteristics vs LVIC temperature 9762 9 ,*%76/& 9'' 99&& 9ERRW 9 ,*%79762 7- & 7- & ,& $ 7 & Figure 16. Thermal impedance for SDIP2F-26L IGBT . ,*%7=7+ DocID026578 Rev 5 WS V 21/25 25 Package mechanical data 9 STGIF5CH60TS-L Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 22/25 DocID026578 Rev 5 STGIF5CH60TS-L Package mechanical data Figure 17. SDIP2F-26L type L mechanical drawing 8450803_B Table 13. SDIP2F-26L type L mechanical dimensions(1) Ref. Dimensions Ref. Dimensions Ref. Dimensions A 38.00 0.50 B3 29.40 0.50 e4 2.54 0.20 A1 1.22 0.25 C 3.50 0.20 f 0.60 0.15 A2 1.22 0.25 C1 5.50 0.50 f1 0.50 0.15 A3 35.00 0.30 C2 14.00 0.50 F 2.10 0.15 c 1.50 0.05 e 3.556 0.200 F1 1.10 0.15 B 24.00 0.50 e1 1.778 0.200 R 1.60 0.20 B1 12.00 e2 7.62 0.20 T 0.400 0.025 B2 14.40 0.50 e3 5.08 0.20 V 0 / 5 1. All dimensions are expressed in millimeters. DocID026578 Rev 5 23/25 25 Revision history 10 STGIF5CH60TS-L Revision history Table 14. Document revision history 24/25 Date Revision Changes 20-Jun-2014 1 Initial release. 07-Aug-2014 2 Updated Chapter 8: Package mechanical data. 26-Jun-2015 3 Text and formatting changes throughout document On cover page: - updated Title, Features and Description In Section 1: Internal schematic and pin description: - updated Figure 1 and Table 2 In Section 2: Absolute maximum ratings: - updated Table 3, Table 4, Table 5 and Table 6 In Section 3: Electrical characteristics: - updated Table 7, Figure 2, Table 8 and Table 9 In Section 4: Fault management: - updated Figure 6 In Section 5: Typical application circuit: - updated Figure 7 In Section 6: Recommendations: - updated recommendations list and added Table 11 In Section 8: Electrical characteristics (curves): - added Figure 10, Figure 11, Figure 12, Figure 13, Figure 14, Figure 15 and Figure 16 Datasheet promoted from preliminary data to production data. 23-Jul-2015 4 Updated title in cover page and Table 3. 09-Sep-2015 5 Modified: description and features in cover page Minor text changes DocID026578 Rev 5 STGIF5CH60TS-L IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2015 STMicroelectronics - All rights reserved DocID026578 Rev 5 25/25 25