19-4333, Rev 2; 4/93 MAAXLMAA Microprocessor Supervisory Circuits General Description The MAX6S0A/MAX692A/MAX802L/MAX802M/MAX805L reduce the complexity and number of components required for power-supply monitoring and battery-control functions in microprocessor (uP) systems. They signifi- cantly improve system reliability and accuracy compared to separate ICs or discrete components. These parts provide four functions: 1) A reset output during power-up, power-down, and brownout conditions. 2) Battery-backup switching for CMOS RAM, CMOS pP, or other low-power logic. 3) Areset pulse if the optional watchdog timer has not been toggled within 1.6sec. 4) A 1.25V threshold detector for power-fail warning or low-battery detection, or to monitor a power supply other than +5V. The parts differ in their reset-voltage threshold levels and reset outputs. The MAX690A/MAX802L/MAX805L generate a reset pulse when the supply voltage drops below 4.65V, and the MAX692A/MAX802M generate a reset below 4.40V. The MAX802L/MAX802M guaran- tee power-fail accuracies to +2%. The MAX805L is the same as the MAX690A except that RESET is provided instead of RESET. All parts are available in 8-pin DIP and SO packages. The MAX690A/MAX802L are pin compatible with the MAX690 and MAX694. The MAX692A/MAX802M are pin compatible with the MAX692. Applications Battery-Powered Computers and Controllers Intelligent Instruments Automotive Systems Critical uP Power Monitoring Typical Operating Circuit Features @ Precision Supply-Voltage Monitor: 4.65V for MAX690A/MAX802L/MAX805L 4.40V for MAX692A/MAX802M @ Reset Time Delay 200ms @ Watchdog Timer 1.6sec Timeout Battery-Backup Power Switching # 200A Quiescent Supply Current @ 50nA Quiescent Supply Current in Battery- Backup Mode Voltage Monitor for Power-Fail or Low-Battery Warning @ Power-Fail Accuracy Guaranteed to +2% (MAX802L/M) * Guaranteed RESET Assertion to Voc = 1V # 8-Pin SO and DIP Packages Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX6S80ACPA orc to +70C 8 Plastic DIP MAX690ACSA OC to +70C 8 SO MAX6S0AC/D OC to +70C Dice* MAX690AEPA -40C to +85C 8 Plastic DIP MAX690AESA -40C to +85C 8 SO MAX690AMJA -55C to +125C 8 CERDIP** Ordering information continued on last page. * Dice are specified at T, = +2&C Contact factory for availability and processing to MIL-STD-883. Pin Configurations TOP VIEW UNREGULATED DC. REGULATED +5V Veo seu [f . 7 oul | 1] AAAXLAA ra} veart Ry RESE RESET MAX690A aigiT > Vee [2] [7] RESET (RESET) D nwt! MAX692A * celal Hats, [ele wo OUINE _ mes 3 | VOUNE GND Pri[a] maxeost [5] PFO LITHIUM GPYBAT Vou o. OS BATTERY GND | a = = = Vor DIP/SO MASKAAA CMOS MAXBS0OA RAM MAXBO2L GND ( ) ARE FOR MAX805L ONLY. += MAAXLAMA Maxim Integrated Products 5-5 Cail toll free 1-800-998-8800 for free samples or literature. TSOSXVW/INZOSXVW/1Z08XVW/VC69XVW/VO69XVNMAX690A/MAX692A/MAX802L/MAX802M/MAXS805L Microprocessor Supervisory Circuits ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) VOC ccc cce cece eee ee eee ee en eee t eee eneeenrentenans -0.3V to 6.0V VBATT cece cece cette ee ee ene teen eens eee eens ennes -0.3V to 6.0V All Other Inputs (Note 1) ................ -0.3V to (Voc + 0.3V) Input Current VOC oe ene e nee rn ene en tnd tages 200mA VBATT ccc cence cece tee cece ected tebe bee e tents bras 50mA LC) | Oe 20mA Output Current VOUT eee e eee eee eee Short-Circuit Protected for up to 10sec All Other Outputs .....0. 000. ccc cece cece e ee 20mA Rate of Rise, Voc, Veatr o..- i cece eect ceccee ences ene eees 100V/us Continuous Power Dissipation Plastic DIP (derate 9.09mW/C above +70C) ........ 727mW SO (derate 5.88mW/C above +70C) .....0.......... 471mw CERDIP (derate 8.00mW/C above +70C) ........... 640mW Operating Temperature Ranges: MAX69_AC__, MAX80__C__.................. OC to +70C MAX69_AE__, MAX80__E__ ....... ~40C to +85C MAX69_AMJA, MAX805LMJA................ -55C to +125C Storage Temperature Range .................. -65C to +160C Lead Temperature (soldering, 10sec) .................. +300C Note 1: The input voltage limits on PFI and WDI may be exceeded if the current into these pins is limited to less than 10mA. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Voc_= 4.75V to 5.5V for MAX690A/MAXB02L/MAX805L, Vog = 4.5V to 5.5V for MAX692A/MAX802M, Vaart = 2.8V, Ty = Twin tO Tyax. unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS Operating Voltage Range MAX69_AC, MAX802_C 1.0 5.5 i a avaaeetiiale MAX805LC 11 55 Vv Voc: Vaart (Note 2) MAX69_AE/M, MAX80_ _E 1.2 5.5 Supply Current (Excluding lou) IsupPLy MAX69_AC, MAX802_C 200 350 HA MAX69_AE/M, MAX802_E, MAX805LE/M 200 500 Isuppty in Battery-Backup Mode Veco = OV, Ta = +25C 0.05 1.0 yA (Excluding lout) Veatt = 2.8V Ta = Twin to Tmax 5.0 5.5V > Ven> Ta = +25C -0.1 0.02 Veart Standby Current (Note 3 ce BATT y ( } Vpatr +0.2V Ta = Tuan to Tax -1.0 0.02 HA { = 5mA Ver -0.05 Ver - 0.025 Vour Output our oe ce Vv four = 50mA Vec-05 Voo-0.25 Vout in Battery-Backup Mode lout = 250A, Veo < Veart - 0.2V Veatr- 0.1 Vearr - 0.02 Vv Battery Switch Threshold, Voc Power-up 20 Voc < V, mv to Vaart coe eT Power-down -20 Battery Switchover Hysteresis 40 mv MAX6S0A, MAX802L, MAX805L 450 4.65 4.75 MAX692A, MAX802M 4.25 4.40 4.50 R V : eset Threshold AT [MAXB02L, T, = +25C, Vag falling 4.55 465) MAXB02M, T, = +25C, Veg falling 4.30 4.40 Reset Threshold Hysteresis 40 mV Reset Pulse Width tas 140 200 280 ms Isournce = B00HA Veo: 1.5 Igink = 3.2mA 0.4 RESET Output Voltage MAX69_AC, MAX802_C; Voc = 1.0V 0.3 Vv Isink = SOpA MAX69_AE/M, MAX802_E, Veo = 1.2V, Igiv = 10024 0.3 5-6 MAAXLAAELECTRICAL CHARACTERISTICS (continued) (Veco = 4.75V to 5.5V for MAX690A/MAX802L/MAX805L, Veco = 4.5V to 5.5V for MAX692A/MAX802M, Vagarr = 2.8V. Ta = Tain [0 Tax, unless otherwise noted.) Microprocessor Supervisory Circuits PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS MAX805LC, lsourcE = 4pA, Vcc =1.1V 0.8 MAX805LE/M, Isource = 4pA, Vec =12V 0.9 RESET Output Voltage MAX@05L, Igounce = B00nA Voo- 15 V MAXB05L, Iginx = 3.2MA 04 Watchdog Timetout two 1.00 1.60 2.25 sec WDI Pulse Width twe Vip = O.4V, Vin = (0.8) (Voc) 56 ns Logic low 0.8 WDII t Threshold (Note 4 Voc = SV Vv nput Threshoid (Note 4) cc Logic high 35 WDI Input Current Wel Veo 0 80 Purwurren WDI = OV -150 -50 pA PFI Threshold MAX69_A, MAX805L, Voc = 5V 1.20 1.25 1.30 Vv APUE TNPESNO MAX802_C/E, Voc = 5V 1.225 1.250 1.275 PFI Input Current -25 0.01 25 nA Isource = 800HA Vec- 1.5 PFO Output Voltage Tonk = 32mA 04 Vv Note 2: Either Voc or Vaary can go to OV, if the other is greater than 2.0V. Note 3: *-" = battery-charging current, "+" = battery-discharging current. Note 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and Vgc is in the operating voltage range. WD1 is internally biased to 35% of Voc with an input impedance of 50kQ. MAAXLM 5-7 TSOSXVW/NZOSXUW/ 1c 08XVAN/VC69XVAN/VO69XUNMAX690A/MAX692A/MAX802L/MAX802M/MAX805L Microprocessor Supervisory Circuits OUTPUT VOLTAGE vs. LOAD CURRENT 5.00 T 2.80 Voc =45V Vpatt = +2.8V 4.95 Ta= 425C 2.78 = 4.90 = 276 3 a > 4.85 * 974 SLOPE =5Q 4.80 2.72 4.75 2.70 0 10 20 30 40 50 lour (mA) MAX690A RESET RESPONSE TIME Typical Operating Characteristics MAX690A OUTPUT VOLTAGE RESET OUTPUT VOLTAGE ys. LOAD CURRENT vs. SUPPLY VOLTAGE T +5V Vcc = OV OE \ Veart = 42.8V A= 425C - NX Ta= 425C $s S N NN +5V N\ SLOPE = 800 ND/AL 02 #04 O08 08 four (mA) POWER-FAIL COMPARATOR RESPONSE TIME 1.0 500ms/div POWER-FAIL COMPARATOR RESPONSE TIME Veco = +4V Ta = 425C PFO +V = = = a Q 1 +0V ov +1.30V Woo 2 78V Hav PFI Ta = 425C PFI | ov + HN +120 Li 2usidiv 400ns/div 400ns/div MAX805L RESET OUTPUT VOLTAGE MAXB0SL vs. SUPPLY VOLTAGE RESET RESPONSE TIME +5V Vec +5V a Vee < = 2 w wv OW qoge RESET = = =z wW ow 500ms/div 2us/div 5-8 MAAXLMAMicroprocessor Supervisory Circuits Pin Description PIN MAX690A/MAX692A MAX802L/MAX802M MAX805L NAME FUNCTION Vout Supply Output for CMOS RAM. When Vgc is above the reset threshold, Vout connects to Ver through a P-channel MOSFET switch. When Vec is below the reset threshold, the higher of Voc or Vaarz will be connected to Voyr. Vec +5V Supply Input GND Ground PFI Power-Fail Comparator Input. When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or Veg when not used. Power-Fail Output. When PFI is less than 1.25V, PFO goes low; otherwise PFO stays high. WwDI Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and reset is triggered. If WDI is left floating or connected to a high-impedance three-state buffer, the watchdog feature is disabled. The internal watchdog timer clears whenever reset is asserted, WDI is three-stated, or WDI sees a rising or falling edge. RESET Reset Output. Whenever RESET is triggered, it pulses low for 200ms. It stays low when Voc is below the reset threshold (4.65V in the MAX690A/MAX802L and 4.4V in the MAX692A/MAX802M) and remains low for 200ms after Voc rises above the reset threshold. A watchdog timeout also triggers RESET. RESET Active-High Reset Output is the inverse of RESET. When RESET is asserted, the RESET output voltage = Voc or Vaart, whichever is higher. Veatt Backup-Battery Input. When Vcc falls below the reset threshold, Vgarr will be switched to Voyy if Vaart is 20mV greater than Vec. When Voc rises to 20MV above Vgary, Vour will be reconnected to Voc. The 40mV hysteresis prevents repeated switching if Vcc falls slowly. PAAXLAA TSOSXVIN/NCOSX VW 1c 08X VIN/VZ69XVW/VO6G9XVWMAX690A/MAX692A/MAX802L/MAX802M/MAX805L Microprocessor Supervisory Circuits Vaart BATTERY-SWITCHOVER Vout crcurry | Vcc s , reset |_|. RESET GENERATOR (RESET) 3 WATCHDOG wot TIMER 3 MAAXIAA Fi MAX690A MAXEQ2A x MAXB02L oft MAX802M MAXB05L om sk 1.25 (_ ) ARE FOR MAX80SL ONLY. = GND Veart = PFI = 3.0V (_ ) ARE FOR MAX805L ONLY. lout = OMA Figure 1. Block Diagram Detailed Description Reset Output A microprocessors (uPs) reset input starts the pP in a known state. When the pP is in an unknown state, it should be held in reset. The MAX690A/MAX692A/MAX802L/ MAX802M assert reset during power-up and prevent code execution errors during power-down or brownout condi- tions. On power-up, once Voc reaches 1V, RESET is guaran- teed to be a logic low. As Vcc rises, RESET remains low. When Vcc exceeds the reset threshold, an internal timer keeps RESET low for a time equal to the reset pulse width; after this interval, RESET goes high (Figure 2). If a brownout condition occurs (if Vee dips below the reset threshold), RESET is triggered. Each time RESET is triggered, it stays low for the reset pulse width interval. Any time Voc goes below the reset threshold, the internal timer restarts the pulse. If a brownout con- dition interrupts a previously initiated reset pulse, the reset pulse continues for another 200ms. On power- down, once Vec goes below the threshold, RESET is guaranteed to be logic low until Vcc droops below 1V. RESET is also triggered by a watchdog timeout. If a high or low is continuously applied to the WDI pin for 1.6sec, RESET pulses low. As long as RESET is assert- 5-10 Figure 2. Timing Diagram ed, the watchdog timer remains clear. When RESET comes high, the watchdog resumes timing and must be serviced within 1.6sec. If WDI is tied high or low, a RESET pulse is triggered every 1.8SeC (twp plus tgs). The MAX805L active-high RESET output is the inverse of the MAX690A/MAX682A/MAX802L/MAX802M RESET output, and is guaranteed to be valid with Vec down to 1.1V. Some uPs, such as Intel's 80C51, require an active-high reset pulse. Watchdog Input The watchdog circuit monitors the pPs activity. If the uP does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by open cir- cuiting the WDI input. As long as reset is asserted or the WDI input is open circuited, the timer remains cleared and does not count. As soon as reset is released or WDI is driven high or low, the timer starts counting. It can detect pulses as short as 50ns. Power-Fail Comparator The PFI input is compared to an internal 1.25V refer- ence. If PFI is less than 1.25V, PFO goes low. The power-fail comparator is intended for use as an under- voltage detector to signal a failing power supply; it need not be dedicated to this function though, as it is MA AXLIAMicroprocessor Supervisory Circuits Veatt Vcc Swi SW2 Sw3 SW4 , or oF SUBSTRATE | MAXIM MAX690A MAX802L MAXBO5L A 3 MAX692A_MAX802M Vout CONDITION Swi/Sw2| Sw3/sw4 Vec > Reset Threshoid Open Closed Voc < Reset Threshold and Open Closed Vee > VeaTT Voc < Reset Threshold and Closed Open Vcc < Veart RESET THRESHOLD = 4.65V IN MAXGS0A/MAXB02L/MAXBO5L. RESET THRESHOLD = 4.4V IN MAX692A/MAX802M +5V Voc Vout -_ TO STATIC RAM MAAXLIA MAX690A MAX602 Vparr MAXB05L RESET - 10 yp (RESET) o> z oS WH () ARE FOR MAX805L ONLY. Figure 3. Backup-Battery Switchover Block Diagram completely separate from the rest of the circuitry. The external voltage divider drives PFI to sense the unregu- lated DC input to the +5V regulator (see Typical Operating Circuit). The voltage-divider ratio can be chosen such that the voltage at PFI falis below 1.25V just before the +5V regulator drops out. PFO then trig- gers an interrupt which signals the uP to prepare for power-down. To conserve backup-battery power, the power-fail detector comparator is turned off and PFO is forced low when Vgarr Connects to Voy. Backup-Battery Switchover In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a backup battery installed at Veaty, the devices automati- cally switch RAM to backup power when Vez fails. As long as Voc exceeds the reset threshold, Voy; connects to Veg through a SQ PMOS power switch. Once Veg falls below the reset threshold, Voc or Vgarr (whichever is high- er) switches to Voy. Unlike the MAX690/MAX692, the MAX690A/MAX692A/MAX802L/MAX802M/MAX8051_ don't always connect Vaart tO Vout When Vgarr is greater than Veco. Vaart Connects to Voy (through an 80 switch) only when Voc is below the reset threshold and Vgar, is greater than Voc. MAAXLMM Figure 4. Using a SuperCap as a Backup Power Source with a MAX690A/MAX802L/MAX805L and a +5V+5% Supply When Vcc exceeds the reset threshold, it is connected to the MAX690A/MAX692A/MAX802L /MAX802M/MAX805L substrate, regardless of the voltage applied to Vaart (Figure 3). During this time, the diode (D1) between Vaart and the substrate will conduct current from Vgart tO Voc if Vaarr is 0.6V or greater than Voc. Table 1. Input and Output Status in Battery-Backup Mode SIGNAL STATUS Vee Disconnected from Vout Vv, Connected to Vaart through an internal 802 OUT PMOS switch Connected to Voyr. Current drawn from the Veatt battery is less than 1A, as long as Vec < Veatt -1V. PFI Power-fail comparator is disabled. PFO Logic low RESET Logic low RESET Logic high (MAX805L only) WwDIi Watchdog timer is disabled 5-11 TSO8SXVW/INZO8SXVIW/ 12 O8XVAN/VE69XVW/VO69XVNMAX690A/MAX692A/MAX802L/MAX802M/MAX805L Microprocessor Supervisory Circuits +5V Vec Vout -#_ TO STATIC RAM MAAXLAA MAX692A MAXBO2M Pi Veatt RESET F TOpP $ | 100k ory GND (IH Figure 5. Using a SuperCap as a Backup Power Source with the MAX692A/MAX802M and a +5V+t 10% Supply When Vaart connects to Voyr, backup mode is activat- ed and the internal circuitry is powered from the battery (Table 1). When Vec is just below Vgarr, the current drawn from Vparz is typically 30nA. When Vec drops to more than 1V below Vgarr, the internal switchover com- parator shuts off and the supply current falls to less than 1pA. Applications Information Using a SuperCap as a Backup Power Source SuperCaps are capacitors with extremely high capaci- tance values, on the order of 0.1F. Figure 4 shows a SuperCap used as a backup power source. Do not allow the SuperCaps voltage to exceed the maximum reset threshold by more than 0.6V. In Figure 4s circuit, the SuperCap rapidly charges to within a diode drop of Vec. However, after a long time, the diode leakage current will pull the SuperCap voltage up to Veg. When using a SuperCap with the MAX690A/MAX802L/MAX805L, Voc may not exceed 4.75V + 0.6V = 5.35V. Use the SuperCap circuit of Figure 5 with a MAX692A or MAX802M and a +10% supply. This circuit ensures that the SuperCap only charges to Vcc - Vin Vv Ry Voc MAXISAA MAX690 MAX692A MAX802L MAXBO2M Ra MAXB05L PFI Ra IhWwv ita] + 3 oD 3 + T0 uP = OPTIONAL +5V PFO ov } > ad * Vine Va Vin Ro Vreup = + 25/| = 2+Rg _ Rall Rg Mi = IC +Ro ll Rg M=125 571.25 4.25 Ay Rg Re Figure 6. Adding Hysteresis to the Power-Fail Comparator Allowable Backup Power-Source Batteries Lithium batteries work very well as backup batteries due to very low self-discharge rates and high energy density. Single lithium batteries with open-circuit voltages of 3.0V to 3.6V are ideal. Any battery with an open-circuit voltage less than the minimum reset threshold plus 0.3V can be connected directly to the Vgarr input of the MAX690A/MAX692A/MAX802L/MAX802M/MAX805L with Table 2. Allowable Backup-Battery Voltages (see Using a SuperCap as a Backup Power Source section for use with a SuperCap) 0.5V. At the maximum Vcc of 5.5V, the SuperCap PART NO. MAXIMUM BACKUP-BATTERY charges up to 5.0V, only 0.5V above the maximum . VOLTAGE (V) reset thresholdwell within the requisite 0.6V. MAX690A/ 4.80 MAX802L/MAX805L . MAX692A/ MAX802M 4.55 SuperCap is a trademark of Baknor industries. MAAXLMA 5-12Microprocessor Supervisory Circuits no additional circuitry (see the Typical Operating Circuit. However, batteries with open-circuit voltages that are greater cannot be used for backup, as current is sourced into the substrate through the diode (D1 in Figure 3) when Voc is close to the reset threshold. Operation Without a Backup Power Source If a backup power source is not used, ground Vgearr and connect Vour tO Vcc. Since there is no need to switch over to any backup power source, Voy; does not need to be switched. A direct connection to Voc eliminates any voltage drops across the switch which may push Voy7 below Voc. Replacing the Backup Battery The backup battery can be removed while Ven remains valid, without danger of triggering RESET/RESET. As long as Vcc stays above the reset threshold, battery- backup mode cannot be entered. In other switchover ICs where battery-backup mode is entered whenever Veatt gets close to Veo, an unconnected Vgarr pin MAXIAA MAXEQOA maxeaza PFO MAXBO2L MAXBO2M MAX805L Q lH +5V ov it y TRIP Vv V 0 6-125 _ 1.26- Vipip Ry Ra NOTE: Vipip IS NEGATIVE Figure 7. Monitoring a Negative Voltage PAAXLMA accumulates leakage charge and RESET/RESET in error. Adding Hysteresis to the Power-Fail Comparator Hysteresis adds a noise margin to the power-fail com- parator and prevents repeated triggering of PFO when Vin is close to its trip point. Figure 6 shows how to add hysteresis to the power-fail comparator. Select the ratio of Ry and Ry such that PFI sees 1.25V when Vin falls to its trio point (Vrpip). Rg adds the hysteresis. It will typically be an order of magnitude greater than R, or Ro (about 10 times either R; or Ro). The current through R, and R should be at least 1A to ensure that the 25nA (max) PFI input current does not shift the trip point. Rg should be larger than 10kQ so it does not load down the PFO pin. Capacitor C1 adds additional noise rejection. triggers Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply rail using the circuit of Figure 7. When the negative rail is good (a negative voltage of large magnitude), PFO is low. When the negative rail is degraded (a negative voltage of lesser magnitude), PFO goes high. This circuit's accuracy is affected by the PFI threshold tolerance, the Vcc tine, and the resis- tors. Interfacing to Ps with Bidirectional Reset Pins uPs with bidirectional reset pins, such as the Motorola 68HC1i1 series, can contend with the MAX690A/MAX692A/MAX802L/MAX802M RESET out- put. If, for example, the RESET output is driven high and the uP wants to pull it low, indeterminate logic lev- els may result. To correct this, connect a 4.7kQ resis- tor between the RESET output and the uP reset 1/O, as in Figure 8. Buffer the RESET output to other system components 5-13 TSOSXVW/NCOSXVW/12 08XVW/VE69XVW/VO69XVNMAX690A/MAX692A/MAX802L/MAX802M/MAX805L Microprocessor Supervisory Circuits Vec PAAXLM MAX690A MAX692A _ maxgoat RESET MAXG02M oo Qo N KA BUFFERED RESET TO OTHER SYSTEM COMPONENTS 4.7k >_+ | Vec RESET oa = oO IH Figure 8. Interfacing to Ps with Bidirectional Reset I/O 5-14 MAAXLMMicroprocessor Supervisory Circuits uP Supervisory Circuits Minimum Nominal Nominal Reset Watchdog Power- Reset Pulse Timeout Backup- CE - Fail Manual- Watch- Low- Active- Battery- Part Threshold Width Period Battery Write Com- Reset dog Line High On Number (Vv) (ms) (sec) Switch Protect parator Input Output Output Reset Output MAX690A/692A 4.65/4.40 140 1.6 v v MAX691A/693A 4.65/4.40 140/adj. 1.6/adj. v VW/ji0ns ov v v v v MAX696 Adj. 35/adj. 1.6/adj. v v v v v v MAX697 Adj. 35/adj. 1.6/adj. v 4 v v v MAX700 4.65/adj. 200 - v v MAX703/704 4.65/4.40 140 - v v v MAX705/706 4.65/4.40 140 1.6 v v v MAX706P 2.63 140 1.6 v v v v MAX706R/S/T _2.63/2.93/._ 140 1.6 v v 3.08 MAX707/708 4.65/4.40 140 - v v Vv MAX708R/S/T _2.63/2.93/_ 140 - v v v 3.08 MAX709L/M/ = 4.65/4.40/ 140 R/S/T 2.63/2.93/3.08 MAX791 4.65 140 1 v viitns wv v v v v v MAX792L/M/ s-4.65/4.40/_ 140 1 w/l0ns v v v v v R/S/T 2.63/2.93/3.08 MAX800L/M 4.60/4.40 140 1 6/adj. v W/i0ns W/42% v v v v MAX802L/M 4.60/4.40 140 1.6 v VH2% MAX805L 4.65 140 1.6 v v MAX813L 4.65 140 16 v v vo v MAX820L/M/ s 4.65/4.40/ 140 1 Wi0ns vWH2% Yo v v v R/S/T 2.63/2.93/3.08 MAX1232 4,37/4.62 250 0.15/0.60/1.2 v v MAX1259 - - - v v MA AXIMA 5-15 TSOSXVW/NZO8SXVW/TcO8XVW/V269XVW/VO6G9XVNMAX690A/MAX692A/MAX802L/MAX802M/MAX805L Microprocessor Supervisory Circuits __Ordering information (continued) PART TEMP. RANGE PIN-PACKAGE MAX692ACPA QC to +70C 8 Plastic DIP MAX692ACSA OC to +70C 8 SO MAX692AC/D OC to +70C Dice* MAX692AEPA -40C to +85C 8 Plastic DIP MAX692AESA -40C to +85C 8 SO MAX692AMJA -58C to +125C 8 CERDIP** MAX802LCPA OC to +70C 8 Plastic DIP MAX802LCSA oc to +70C 8 SO MAX802LEPA -40C to +85C 8 Plastic DIP MAX802LESA -40C to +85C 8 SO MAX802MCPA OC to +70C 8 Plastic DIP MAX802MCSA 0C to +70C 8 SO MAX802MEPA -40C to +85C 8 Plastic DIP MAX802MESA -40C to +85C 8 SO MAX805LCPA OC to +70C 8 Plastic DIP MAX805LCSA OC to +70C 8 SO MAX805LC/D OC to +70C Dice* MAX805LEPA -40C to +85C 8 Plastic DIP MAX805LESA -40C to +85C 8 SO MAX805LMJA -55C to +125C 8 CERDIP** * Dice are specified at T, = +25C. Contact factory for availability and processing to MIL-STD-883. 5-16 Chip Topography Vec Vout Veatt RESET (RESET) 0.061" (1.55mm) GND PFI PFO 0.078" (1.98mm) ( ) ARE FOR MAX805L ONLY. TRANSISTOR COUNT: 573; SUBSTRATE MUST BE LEFT UNCONNECTED. MAAXLMA