1. Product profile
1.1 General description
Ultra low capacitance single rail-to-rail ElectroStatic Discharge (ESD) protection device in
a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package designed to
protect one Hi-Speed data line or high-frequency signal line from the damage caused by
ESD and other transients.
PRTR5V0U1T incorporates one ultra low capacitance rail-to-rail protection channel as
well as an additional ESD protection diode to ensure signal line protection even if no
supply voltage is available.
1.2 Features
nESD protection of one Hi-Speed data line or high-frequency signal line
nUltra low input/output to ground capacitance: C(I/O-GND) =1pF
nESD protection up to 8 kV
nIEC 61000-4-2, level 4 (ESD)
nVery low clamping voltage due to an integrated additional ESD protection diode
nVery low reverse current
nSmall SMD plastic package
1.3 Applications
nUSB interfaces (2.0)
nDigital Video Interface (DVI) / High Definition Multimedia Interface (HDMI) interfaces
nMobile and cordless phones
nPersonal Digital Assistants (PDA)
nDigital cameras
nWide Area Network (WAN) / Local Area Network (LAN) systems
nPCs, notebooks, printers and other PC peripherals
PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
Rev. 01 — 25 September 2008 Product data sheet
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 2 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
1.4 Quick reference data
[1] Measured from pin 1 to ground.
[2] Measured from pin 2 to ground.
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Table 1. Quick reference data
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per channel
C(I/O-GND) input/output to ground
capacitance f = 1 MHz;
V(I/O-GND) =0V [1] - 1 1.5 pF
Zener diode
VRWM reverse standoff voltage - - 5.5 V
Csup supply pin to ground
capacitance f = 1 MHz;
VCC =0V [2] -16-pF
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1 I/O input/output
2V
CC supply voltage
3 GND ground
12
3
21
006aab111
3
Table 3. Ordering information
Type number Package
Name Description Version
PRTR5V0U1T - plastic surface-mounted package; 3 leads SOT23
Table 4. Marking codes
Type number Marking code[1]
PRTR5V0U1T ZN*
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 3 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
5. Limiting values
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 1 to 2 or 3.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per device
Tamb ambient temperature −40 +85 °C
Tstg storage temperature −55 +125 °C
Table 6. ESD maximum ratings
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
Per channel
VESD electrostatic discharge voltage [1][2]
IEC 61000-4-2;level 4
(contact discharge) -8kV
MIL-STD-883 (human
body model) -10kV
Table 7. ESD standards compliance
Standard Conditions
Per diode
IEC 61000-4-2; level 4 (ESD) > 8 kV (contact)
Fig 1. ESD pulse waveform according to IEC 61000-4-2
001aaa631
IPP
100 %
90 %
t
30 ns 60 ns
10 %
tr = 0.7 ns to 1 ns
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 4 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
6. Characteristics
[1] Measured from pin 1 to ground.
[2] Measured from pin 2 to ground.
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per channel
IRreverse current VR=3V [1] - < 1 100 nA
C(I/O-GND) input/output to ground
capacitance f = 1 MHz;
V(I/O-GND) =0V [1] - 1 1.5 pF
VFforward voltage - 0.7 - V
Zener diode
VRWM reverse standoff voltage - - 5.5 V
VBR breakdown voltage [2] 6- 9V
Csup supply pin to ground
capacitance f = 1 MHz;
VCC =0V [2] -16-pF
f = 1 MHz; Tamb =25°C
Fig 2. Input/output to ground capacitance as a function of input/output to ground
voltage; typical values
V(I/O-GND) (V)
054231
006aaa483
0.8
1.2
0.4
1.6
2.0
C(I/O-GND)
(pF)
0
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 5 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
Fig 3. ESD clamping test setup and waveforms
006aab112
50 Ω
RZ
CZ
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
unclamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network)
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 10 V/div
horizontal scale = 50 ns/div
GND
GND
GND
GND
450 ΩRG 223/U
50 Ω coax
ESD TESTER
IEC 61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
DUT
Device
Under
Test
vertical scale = 10 V/div
horizontal scale = 50 ns/div
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 6 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
7. Application information
With a capacitance of only 1 pF, the PRTR5V0U1T offers IEC 61000-4-2, level 4
compliant ESD protection.
The PRTR5V0U1T integrates one ultra low capacitance rail-to-rail ESD protection
channel and an additional ESD protection diode.
The additional ESD protection diode connected between ground and VCC prevents
charging of the supply.
To achieve the maximum ESD protection level, no additional external capacitors are
required.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PRTR5V0U1T as close to the input terminal or connector as possible.
2. The path length between the PRTR5V0U1T and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 7 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
Fig 4. Package outline SOT23 (TO-236AB)
04-11-04Dimensions in mm
0.45
0.15
1.9
1.1
0.9
3.0
2.8
2.5
2.1 1.4
1.2
0.48
0.38 0.15
0.09
12
3
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 10000
PRTR5V0U1T SOT23 4 mm pitch, 8 mm tape and reel -215 -235
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 8 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
10. Soldering
Fig 5. Reflow soldering footprint SOT23 (TO-236AB)
Fig 6. Wave soldering footprint SOT23 (TO-236AB)
solder lands
solder resist
occupied area
solder paste
sot023_fr
0.5
(3×)
0.6
(3×)
0.6
(3×)
0.7
(3×)
3
1
3.3
2.9
1.7
1.9
2
Dimensions in mm
solder lands
solder resist
occupied area
preferred transport direction during soldering
sot023_fw
2.8
4.5
1.4
4.6
1.4
(2×)
1.2
(2×)
2.2
2.6
Dimensions in mm
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 9 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
11. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PRTR5V0U1T_1 20080925 Product data sheet - -
PRTR5V0U1T_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 25 September 2008 10 of 11
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PRTR5V0U1T
Ultra low capacitance single rail-to-rail ESD protection
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 25 September 2008
Document identifier: PRTR5V0U1T_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 6
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 7
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Contact information. . . . . . . . . . . . . . . . . . . . . 10
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
