DS04-27241-1Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2004-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2004.5
ASSP for P ower Supply Applications (Secondary battery)
DC/DC Converter IC for Charging
Li-ion Battery
MB39A114
DESCRIPTION
The MB 39A114 is a DC /DC conver ter IC of pulse width mo dulation (PWM ) type for charging, c apable of in de-
pendently controlling the output voltage and output current. It is suitab le for down conversion.
MB39A114 can dynamically control the secondary battery’s charge current by detecting a voltage drop in an A C
adapter to keep its power constant (dynamically-controlled charging) .
This IC c an eas ily set the cha rge cur rent value, making it ide al for use as a built-in ch arging d evice in pr oducts
such as notebook PC.
FEATURES
Built-in constant current control circuit in 2-system.
Analog control of charge current value is possible. (+IN E1 termi nal and +INE2 terminal)
Built-in AC adapter detection function (When VCC is lower than the battery voltage +0.2 V, output is fixed in the off.)
Constant voltage control state detection function (CVM terminal) enables prevention of mis-detection for full
charge.
Built-in overvoltage detection function (OVP terminal) of charge voltage (Continued)
PACKAGE
24-pin plastic SSOP
(FPT-24P-M03)
MB39A114
2
(Continued)
Wide range of operating power-supply voltage range : 8 V to 25 V
Built-in output setting resistor
Built-in switching function (SEL terminal) of output setting voltage 16.8 V or 12.6 V
Output voltage setting accuracy : ± 0.74% (Ta = 10 °C to +85 °C)
Built-in high accuracy current detection amplifier : ± 5% (At the input voltage difference of 100 mV) ,
± 15% (At the input voltage difference of 20 mV)
Output voltage setting resistor is open to enab le prevention of in v alidity current at IC standby (ICC = 0 µA Typ) .
Oscillation frequency range : 100 kHz to 500 kHz
Built-in current detection Amp with wide in-phase input voltage range : 0 V to VCC
Built-in soft-start function independent of loads
Built-in standby current function : 0 µA (Typ)
Built-in totem-pole type output stage supporting Pch MOS FET devices.
MB39A114
3
PIN ASSIGNMENT
INC2
OUTC2
+INE2
INE2
CVM
VREF
FB12
INE1
+INE1
OUTC1
SEL
INC1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
+INC2
GND
CS
VCC
OUT
VH
OVP
RT
INE3
FB3
CTL
+INC1
(TOP VIEW)
(FPT-24P-M03)
MB39A114
4
PIN DESCRIPTION
Pin No. Symbol I/O Description
1INC2 I Current detection amplifier (Current Amp2) inverted input terminal
2 OUTC2 O Current detection amplifier (Current Amp2) output terminal
3+INE2 I Error amplifier (Error Amp2) non-inverted input terminal
4INE2 I Error amplifier (E rror Amp2) inverted in put terminal
5CVMO
Open drain type output terminal of constant voltage control state detec-
tion comparator (CV Comp.)
6 VREF O Re ference voltage output terminal
7 FB12 O Error amplifier (Error Amp1, Error Amp2) output terminal
8INE1 I Error amplifier (E rror Amp1) inverted input terminal
9+INE1 I Error amplifier (Error Amp1) non-inverted input terminal
10 OUTC1 O Current detection amplifier (Current Amp1) output terminal
11 SEL O Charge voltage setting switch terminal (3 cell or 4 cell)
“H” level in SEL terminal : charge voltage setting 16.8 V (4 Cell)
“L” level in SEL terminal : charge voltage setting 12.6 V (3 Cell)
12 INC1 I Current detection amplifier (Current Amp1) inverted input terminal
13 +INC1 I Current detection amplifier (Current Amp1) non-inverted input terminal
14 CTL I Power-supply control terminal
Setting the CTL terminal at “L” level places the IC in the standby mode.
15 FB3 O Error amplifier (Error Amp3) output terminal
16 INE3 I Error amplifier (E rror Amp3) inverted input terminal
17 RT Triangular wave oscillation frequency setting resistor connection
terminal
18 OVP O Open drain type output terminal overvoltage detection comparator (OV
Comp.)
19 VH O Power supply terminal for FET drive circuit (VH = VCC 6 V)
20 OUT O External FET gate drive terminal
21 VCC Power supply terminal for reference power supply, control circuit and
output circuit
22 CS Soft-start capacitor connection terminal
23 GND Ground terminal
24 +INC2 I Current detection amplifier (Current Amp2) non-inverted input terminal
MB39A114
5
BLO C K DIAGRAM
8
10
INE1
OUTC1
13
12
9
+
+
+
4
2
24
1
3
7
++
+
+
16
11
22
+INC1
INC1
+INE1
INE2
OUTC2
+INC2
INC2
+INE2
FB12
INE3
FB3
SEL
H : 4Cell
CS
+
+
+
+
+
5
18
+
21
20
19
14
CVM
OVP
VCC
OUT
VH
CTL
23617 GNDVREFRT
×20
×20
15
<Current Amp 1>
<Error Amp 1>
<Current Amp 2> <Error Amp 2> <PWM Comp.>
<UV Comp.>
<OV Comp.>
0.2 V
1.4 V
<CV Comp.>
2.6 V
VREF
INC2
(VO)
<Error Amp 3>
UVLO
VH
<OUT>
VCC 6 V
Drive
2.5 V
1.5 V
VREF
UVLO
Bias
Voltage
4.2 V/3.15 V
R1
R2
VREF
VREF
<OSC>
500 kHz
4.2 V
bias
CT
45 pF
VCC
VREF
5.0 V
<REF> <CTL>
<SOFT>
10 µA
L : 3Cell
MB39A114
6
ABSOLUTE MAXIMUM RATINGS
* : The packages are mounted on the dual-sided epoxy board (10 cm × 10 cm) .
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Conditions Rating Unit
Min Max
Power supply voltage VCC VCC terminal 28 V
Output current IOUT 60 mA
Peak output current IOUT Duty 5% (t = 1/fosc × Duty) 700 mA
Power dissipation PDTa +25 °C740* mW
Storage temperature TSTG −55 +125 °C
MB39A114
7
RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Conditions Value Unit
Min Typ Max
Power supply voltage VCC VCC terminal 8 25 V
Referenc e vo ltag e outpu t
current IREF −10mA
VH terminal output current IVH 030 mA
Input vo lta ge VINE INE1 to INE3, +INE1, +INE2 terminal 0 5V
VINC +INC1, +INC2, INC1, INC2 terminal 0 VCC V
CTL terminal input voltage VCTL 025 V
Output current IOUT −45 +45 mA
Peak output current IOUT Duty = 5% (t = 1/fosc × Duty) 600 +600 mA
CVM termi nal output voltage VCVM 025 V
CVM termi nal output cu rrent ICVM 01mA
OVP terminal output voltage VOVP 025 V
OVP terminal output current IOVP 01mA
SEL terminal input voltage VSEL 025 V
Osci llati on fre que nc y fosc 100 300 500 kHz
Timing resistor RT27 47 130 k
Soft-start capacitor CS0.022 1.0 µF
VH terminal capacitor CVH 0.1 1.0 µF
Referenc e vo ltag e outpu t
capacitor CREF 0.1 1.0 µF
Operating ambient
temperature Ta −30 +25 +85 °C
MB39A114
8
ELECTRICAL CHARACTERISTICS (VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
* : Standard design value (Continued)
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Reference
voltage block
[REF]
Output voltage VREF1 6Ta = +25 °C 4.975 5.000 5.025 V
VREF2 6Ta = 10 °C to +85 °C 4.963 5.000 5.037 V
Input stability Line 6 VCC = 8 V to 25 V 310mV
Load stability Load 6 VREF = 0 mA to 1 mA 110mV
Output current at
short circuit Ios 6 VREF = 1 V 50 25 12 mA
Under voltage
lockout
protection
circuit block
[UVLO]
Threshold
voltage VTLH 6VREF = 2.6 2.8 3.0 V
VTHL 6VREF = 2.4 2.6 2.8 V
Hysteresis width VH60.2* V
Soft start block
[SOFT] C harge cu rrent ICS 22 −14 10 6µA
Triangular wave
oscillator block
[OSC]
Oscillation
frequency fosc 20 RT = 47 k270 300 330 kHz
Frequency
temperature
stability f/fdt 20 Ta = 30 °C to +85 °C1* %
Error amplifier
block
[Error Amp1,
Error Amp2]
Input offset
voltage VIO 3, 4, 8, 9 FB12 = 2 V 15mV
Input bias
current IB3, 4, 8, 9 −100 30 nA
In-pha se inp ut
voltage range VCM 3, 4, 8, 9 0VCC 1.8 V
Voltage gain AV7DC 100* dB
Frequency
bandwidth BW 7 AV = 0 dB 1.3* MHz
Output voltage VFBH 74.8 5.0 V
VFBL 70.8 0.9 V
Output source
current ISOURCE 7 FB12 = 2 V −120 60 µA
Output si nk
current ISINK 7 FB12 = 2 V 2.0 4.0 mA
MB39A114
9
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
* : Standard design value (Continued)
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Error amplifier
block
[Error Am p3]
Volta ge gain A V15 DC 100* dB
Frequency
bandwidth BW 15 AV = 0 dB 1.3* MHz
Output voltage VFBH 15 4.8 5.0 V
VFBL 15 0.8 0.9 V
Outp ut so ur ce
current ISOURCE 15 FB3 = 2 V −120 60 µA
Output sink
current ISINK 15 FB3 = 2 V 2.0 4.0 mA
Threshold
voltage
VTH1 1SEL = 5 V, FB3 = 2 V,
Ta = +25 °C16.716 16.800 16.884 V
VTH2 1SEL = 5 V, FB3 = 2 V,
Ta = 10 °C to +85 °C16.676 16.800 16.924 V
VTH3 1SEL = 0 V, FB3 = 2 V,
Ta = +25 °C12.537 12.600 12.663 V
VTH4 1SEL = 0 V, FB3 = 2 V,
Ta = 10 °C to +85 °C12.507 12.600 12.694 V
Input current IIN 1INC2 = 16.8 V 84 150 µA
IINL 1VCC = 0 V, INC2 = 16.8 V  1µA
Input
resistance R1 1, 16 105 150 195 k
R2 16 35 50 65 k
SEL input
voltage
VON 11 +INE3 = 4.2 V
(4 Cell setting) 225 V
VOFF 11 +INE3 = 3.15 V
(3 Cell setting) 00.8 V
Input current ISELH 11 SEL = 5 V 50 100 µA
ISELL 11 SEL = 0 V 01µA
Current
detection
amplifier block
[Current Amp1,
Current Amp2]
Input offset
voltage VIO 1, 12,
13, 24 +INC1 = +INC2 =
INC1 = INC2 = 3 V to VCC 3+3mV
Input current
I + INCH 13, 24 +INC1 = +INC2 = 3 V to VCC,
VIN = 100 mV 20 30 µA
I INCH 12 +INC1 = 3 V to VCC,
VIN = 100 mV 0.1 0.2 µA
I + INCL 13, 24 +INC1 = +INC2 = 0 V,
VIN = 100 mV 180 120 µA
I INCL 1, 12 +INC1 = +INC2 = 0 V,
VIN = 100 mV 195 130 µA
MB39A114
10
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
* : Standard design value (Continued)
Par ameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Current
detection
amplifier block
[Current Amp1,
Current Amp2]
Current
detection
voltage
VOUTC1 2, 10 +INC1 = +INC2 = 3 V to VCC,
VIN = 100 mV 1.9 2.0 2.1 V
VOUTC2 2, 10 +INC1 = +INC2 = 3 V to VCC,
VIN = 20 mV 0.34 0.40 0.46 V
VOUTC3 2, 10 +INC1 = +INC2 = 0 V,
VIN = 100 mV 1.8 2.0 2.2 V
VOUTC4 2, 10 +INC1 = +INC2 = 0 V,
VIN = 20 mV 0.2 0.4 0.6 V
In-phase input
voltage range VCM 1, 12,
13, 24 0VCC V
Voltage gai n AV2, 10 +INC1 = +INC2 = 3 V to VCC,
VIN = 100 mV 19 20 21 V/V
Frequency
bandwidth BW 2, 10 AV = 0 dB 2* MHz
Output voltage VOUTCH 2, 10 4.7 4.9 V
VOUTCL 2, 10 20 200 mV
Output sour ce
current ISOURCE 2, 10 OUTC1 = OUTC2 = 2 V −21mA
Output sink
current ISINK 2, 10 OUTC1 = OUTC2 = 2 V 150 300 µA
PWM
comparator
block
[PWM Comp.]
Threshold
voltage
VTL 7, 15 Duty cycle = 0%1.4 1.5 V
VTH 7, 15 Duty cycle = 100%2.5 2.6 V
Output block
[OUT]
Output sour ce
current ISOURCE 20 OUT = 1 3 V, Duty 5 %
(t = 1/fosc × Duty) 400* mA
Output sink
current ISINK 20 OUT = 19 V, Duty 5%
(t = 1/fosc × Duty) 400* mA
Output ON
resistor ROH 20 OUT = 45 mA 6.5 9.8
ROL 20 OUT = 45 mA 5.0 7.5
Rise time tr120 OUT = 3300 pF 50* ns
Fall time tf120 OUT = 3300 pF 50* ns
AC adaptor
dete ct ion bl oc k
[UV Comp.]
Threshold
voltage VTLH 21 VCC = , INC2 = 16.8 V 17.2 17.4 17.6 V
VTHL 21 VCC = , INC2 = 16.8 V 16.8 17.0 17.2 V
Hysteresis
width VH21 0.4* V
MB39A114
11
(Continued) (VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
* : Standard design value
P aramet er Symbol Pin No. Conditions Value Unit
Min Typ Max
Constant
voltage control
state detection
block
[CV Comp.]
Threshold
voltage VTLH 5FB3 = 2.6 2.7 2.8 V
VTHL 5FB3 = 2.5 2.6 2.7 V
Hysteresis
width VH50.1* V
CMV terminal
output leak
current ILEAK 5CVM = 25 V 01µA
CVM terminal
output ON
resistor RON 5CVM = 1 mA 200 400
Overvoltage
detection block
[OV Comp.]
Threshold
voltage VTLH 18 FB3 = 1.3 1.4 1.5 V
VTHL 18 FB3 = 1.2 1.3 1.4 V
Hysteresis
width VH18 0.1* V
OVP terminal
output leak
current ILEAK 18 OVP = 25 V 01µA
OVP terminal
output ON
resistor RON 18 OVP = 1 mA 200 400
Control block
[CTL]
CTL input
voltage VON 14 IC operating state 2 25 V
VOFF 14 IC standby staet 0 0.8 V
Input current ICTLH 14 CTL = 5 V 100 150 µA
ICTLL 14 CTL = 0 V 01µA
Bias voltage
block
[VH ] Output voltage VH19 VCC = 8 V to 25 V,
VH = 0 mA to 30 mA VCC 6.5 VCC 6.0 VCC 5.5 V
General
Standby
current ICCS 21 CTL = 0 V 010µA
Power supply
current ICC 21 CTL = 5 V 57.5mA
MB39A114
12
TYPICAL CHARACTERISTICS
(Continued)
Ta = +25 °C
CTL = 5 V
6
5
4
3
2
1
00 5 10 15 20 25
1000
900
800
700
600
500
400
300
200
100
0
10
9
8
7
6
5
4
3
2
1
0
501510 25
Ta = +25 °C
VCC = 19 V
VREF = 0 mA
20
VREF
ICTL
6
5
4
3
2
1
0501510 2520
Ta = +25 °C
CTL = 5 V
VREF = 0 mA
6
5
4
3
2
1
0501510 25 30 3520
Ta = +25 °C
VCC = 19 V
CTL = 5 V
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
VCC = 19 V
CTL = 5 V
VREF = 0 mA
2040 2006040 10080
Power supply current ICC (mA)
Power supply voltage VCC (V)
Power Supply Current vs. Power Supply Voltage
CTL terminal input
current ICTL (µA)
CTL ter minal input v ol tag e VCTL (V)
CTL terminal Input Current, Reference Voltage vs.
CTL terminal Input Voltage
Referenc e voltag e VREF (V)
Power supply voltage VCC (V)
Reference voltage vs. Power Supply voltage
Reference v oltage VREF (V)
Load current IREF (mA)
Reference Voltage vs. Load Current
Reference voltage VREF (V)
Operating ambient temperature Ta ( °C)
Reference Voltage vs.
Operating Ambient Temperature
Reference voltage VREF (V)
MB39A114
13
(Continued)
VCC = 19 V
CTL = 5 V
RT = 47 k
2040 2006040 10080
340
330
320
310
300
290
280
270
260
Ta = +25 °C
VCC = 19 V
CTL = 5 V
1000
100
1010 100 1000
4.25
4.24
4.23
4.22
4.21
4.20
4.19
4.18
4.17
4.16
4.15
VCC = 19 V
CTL = 5 V
2040 2006040 10080
Operating ambient temperature Ta ( °C)
Triangular Wave Oscillation Frequency vs.
Operating Ambient Temperature
Triangular wave oscillation
frequency fosc (kHz)
Timing resistor RT (k)
Triangular Wave Oscillation Frequency vs. Timing Resistor
Triangular w ave osci ll ati on
frequency fosc (kHz)
Error Amplifier Threshold Voltage vs. Ambient Temperature
Error ampli fier th reshold v oltage VTH (V)
Ambient temperature Ta ( °C)
340
330
320
310
300
290
280
270
260
Ta = +25 °C
CTL = 5 V
RT = 47 k
501510 2520
Triangular wave oscillation
frequ ency fos c (kHz )
Power supply voltage VCC (V)
Triangular Wave Oscillation Frequency vs.
Power Supply Voltage
MB39A114
14
(Continued)
Ta = +25 °C
VCC = 19 V
40
30
20
10
0
10
20
30
40
180
90
0
90
180
AV
1 k 10 k 100 k100 1 M 10 M
ϕ
+
+
+
7
8
9
Error Amp1
(Error Amp2)
(4)
(3)
IN
CS
OUT
10 k
10 k
2.4 k
240 k
1 µF
Ta = +25 °C
VCC = 19 V
40
30
20
10
0
10
20
30
40
180
90
0
90
180
AV
1 k 10 k 100 k100 1 M 10 M
ϕ
+
+
+
15
16
Error Amp3
IN
CS
OUT
10 k
10 k
2.4 k
4.2 V
240 k
1 µF
AV
ϕ
40
30
20
10
0
10
20
30
40
180
90
0
90
180
1 k 10 k 100 k100 1 M 10 M
+
+
10
13
12 (2)
(24)
(1)
Current Amp1
(Current Amp2)
VCC = 19 V
IN
12.6 V
OUT
10 k
10 k
1 µF
Gain AV (dB)
Frequency f (Hz)
Error Amplifier Gain, Phase vs. Frequency
Phase ϕ (d eg)
Gain AV (dB)
Frequency f (Hz)
Error Amplifier Gain, Phase vs. Frequency
Phase ϕ (deg)
Gain AV (d B)
Frequency f (Hz)
Current Detection Amplifier Gain, Phase vs. Frequency
Phase ϕ (deg)
MB39A114
15
(Continued)
800
700
600
500
400
300
200
100
0
740
2040 20060
40 10080
Power dissipation PD (mW)
Operating ambient temperature Ta ( °C)
Power Dissipation vs. Operating Ambient Temperature
MB39A114
16
FUNCTIONAL DESCRIPTION
1. DC/DC Conver ter Block
(1) Reference voltage block (REF)
The reference v oltage circuit generator uses the v oltage supplied from the VCC terminal (pin 21) to generate a
temperature compensated stable voltage (5.0 V T yp) used as the reference supply voltage for the internal circuits
of the IC. It is also p ossible to su pply the load current o f up to 1 m A to exter nal circuits as a output reference
voltage through the VREF terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator block has built-in capacitor for frequency setting, and generates the triangular
wave oscillation waveform by connecting the freguency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator circuits on the IC.
(3) Error amplifier block (Error Amp1)
The error amplifier (Error Amp1) detects voltage drop of the AC adapter and outputs a PWM control signal.
Also, b y connecting feedback resistor and capacitor between FB12 terminal (pin 7) and INE1 terminal (pin 8),
it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system.
The CS terminal (pin 22) can be connected to a soft-start capacitor to prev ent rush currents at startup. The soft
start time is detected by the error amplifier , which provides a constant soft-start time independent of output load.
(4) Error amplifier block (Error Amp2)
The amplifier detects output signal from the current detection amplifier (Current Amp 2) . This is amplifier providing
PWM control signal by comparing to +INE2 terminal (pin3), and it is used to control the charging current.
Also, by connecting feedback resistor and capacitor between FB12 terminal (pin 7) and INE2 terminal
(pin 4) , it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system.
The CS terminal (pin 22) can be connected to a soft-start capacitor to prev ent rush currents at startup . The soft
start time is detected by the error amplifier , which provides a constant soft-start time independent of output load.
(5) Error amplifier block (Error Amp3)
The error amplifier (Error Amp3) detects output voltage of the DC/DC conver ter and outputs a PWM control
signal. Output voltage become 16.8 V if the SEL terminal is set in “H” level, and become 12.6 V if it sets in “L” level .
Also, by connecting feedback resistor and capacitor between FB3 terminal (pin 15) and INE3 terminal
(pin 16) , it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system.
The CS terminal (pin 22) can be connected to a soft-start capacitor to prev ent rush currents at startup . The soft
start time is detected by the error amplifier , which provides a constant soft-start time independent of output load.
(6) Current detection amplifier block (Current Amp1)
The cu rre nt detectio n am pli fie r (Cu rren t Amp1) de tect s a voltage dr o p whi ch occurs betwee n bot h end s o f the
output sense resistor (RS) due to the flow of the char ge c urrent , using the +INC1 termin al (pi n 13) and INC1
terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error amp1) at the next
stage.
MB39A114
17
(7) Current detection amplifier bl ock (Current Amp2)
The cu rre nt detectio n am pli fie r (Cu rren t Amp2) de tect s a voltage dr o p whi ch occurs betwee n bot h end s o f the
output sense resistor (RS) due to the flow of the char ge c urrent , using the +INC2 termin al (pi n 24) and INC2
terminal (pin 1) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp2) at the next
stage.
(8) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width conv erter that controls the output duty of the error amplifier
(Error Amp.1 to Error Amp.3) according to the output voltage.
It is compared between triangular wave voltage generated in triangular wave oscillator and error amplifier output
voltage and dur ing inter vals when the tr iangula r wave voltage is lower than the error am plifier output voltage,
an external output transistor is switched on.
(9) Output block (OUT)
The output circuit uses a totem-pole configuration and is capable of driving an external P-ch MOS FET de vice.
For the output “L” level, s et the o utput amp litude to 6 V ( Typ) us ing th e voltage generated by the b ias voltage
blo ck (VH) .
This results in higher conversion efficiency and suppressing the withstand voltage of the connected external
transistor even in a wide range of input voltages.
(10) Power control (CTL)
Setting the CTL terminal (14 pin) low places the IC in the standby mode.
(Power supply current 10 µA max at standby mode.)
CTL function table
(11) Bias voltage block (VH)
The bia s vol tage circuit outputs VCC 6 V (Typ ) as the minimum p otential of the out put circuit. In the sta ndby
mode, this circuit outputs the potential equal to VCC.
2. Protection Function
(1) Under voltage lockout protection circuit (UVLO)
The transient state, which occurs when the power supply (VCC) is turned on, a momentary decrease in supply
voltage or in ter nal r eference voltage (VREF ), may cause the cont rol IC t o ma lfunct ion, r esulting in bre akdown
or degradation o f the syst em. To preven t such malfunctions, un der volta ge lockout pr otection circ uit detect s a
internal reference voltage drop and fixes the OUT terminal (pin 20) at the “H” level.
The s yste m restores voltage s upply when the inter nal reference voltage reac hes the thresh old voltage of the
under voltage lockout protection circuit.
Protection circuit (UVLO) operation function table.
At UVLO operating (VREF voltage is lower than UVLO threshold voltage.)
CTL Power
L OFF (Standby)
HON (Active)
OUT CS CVM OVP
HLHH
MB39A114
18
(2) AC adapter detection block (UV Comp.)
This block d etects that power-s upply voltage (VCC) is lower than the batter y voltage +0.2 V ( Typ ) , and OU T
terminal (pin 18) is fixed at the High lev el. The system restores voltage supply when the supply voltage reaches
the threshold voltage of the AC adapter detection block.
Protection circuit (UV Comp.) operation function table.
At UV Comp. operating (VCC voltage is lower than UV Comp. threshold voltage.)
3. Soft start Function
Soft start block (SOFT )
Connect ing a capacitor to the CS ter minal (pi n 22) p revents rush c urrents from flowing up on activation of the
power supply. Using the error amplifier to detect a soft start allows to soft-start at constant setting time intervals
independent of the output load of the DC/DC converter.
4. Detection Function
(1) Constant v oltage control st ate detection block. (CV Comp.)
Error amplifier (Error Amp3) detects the voltage at FB3 terminal (pin 15) falling to or below 2.6 V (Typ) and
outputs the Low level to the constant voltage control state detection block output terminal (CVM, pin 5) .
(2) Overvoltage state detection block (OV Comp.)
Error amplifier (Error Amp3) detects the voltage at FB3 terminal (pin 15) falling to or below 1.3 V (Typ) and
outputs the High level to the overvoltage detection block output terminal (OVP, pin 18) .
5. Switching function
Output voltage switching function block (SEL)
The charge voltage is set in 16.8 V or 12.6 V by SEL terminal (pin 11) .
SEL function table
OUT CS
HL
SEL DC/DC output setting v oltage
H 16.8 V
L 12.6 V
MB39A114
19
SETTING THE CHARGING VOLTAGE
The setting of the charging voltage is s witched to 3 cell or 4 cell by the SEL terminal. As for the charge voltage ,
the SEL terminal becomes 16.8 V at “H” level. It become 12.6 V at “L” level.
SETTING THE CHARGING CURRENT
The charging current value (output limit current value) is set at the +INE2 terminal (pin 3) .
If a current exceeding the set value attempts to flow , the charge voltage drops according to the set current value.
Battery charge current setting voltage : +INE2
+INE2 (V) = 20 × I1 (A) × RS ()
SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wav e oscillation frequency can be set by connecting a timing resistor (RT ) to the R T terminal (pin
17) .
Triangular wave oscillation frequency : fosc
fosc (kHz) := 14100/RT (k)
Charging voltage of battery : VO
VO (V) = (150 k + 50 k) /50 k × 4.20 V = 16.8 (SEL = H)
VO (V) = (150 k + 50 k) /50 k × 3.15 V = 12.6 (SEL = L)
INC2
INE3
CS
R3 <Error Amp3>
R4
150 k
50 k
SEL
3.15 V 4.2 V
16
11
22
+
+
B
V
O
1
MB39A114
20
SETTING THE SOFT START TIME
(1) Setting consta nt voltage mode soft start
To preven t r ush cur rent s when the IC i s tur ned on, you can set a soft- start by connecting sof t-sta r t capaci tors
(CS ) to the CS terminal (pin 22).
When CT L ter mi nal (pi n 14) is “H” l eve ls and IC is ac tivated (VCC UVLO thresho ld voltage), Q2 becom es off
and the external soft-start capacitors (CS) connected to CS terminal are charged at 10 µA.
The err or amplifi er outpu t (FB3 ter mi nal (pin 1 5) ) is d eterm ined by comp arison between th e lower voltage of
the two non -inverted inpu t ter mi nal voltage (interna l reference voltage 4.2 V (Typ) , CS ter mi nal voltages) and
the inverted input terminal voltage (−INE3 terminal (pin 16) voltage). The FB3 is decided for the soft-start period
(CS terminal voltage < 4.2 V) by the comparison between INE3 terminal v oltage and CS terminal voltage. The
DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally
connected to the CS terminal is charged. The soft-start time is obtained from the following formula :
Soft start circuit
Soft start time : ts (time until output voltage 100%)
ts (s) := 0.42 × CS (µF)
CS terminal voltage
Internal reference voltage
in Error Amp block
Soft-start time : ts
:= 4.9 V
:= 4.2 V
:= 0 V
+
+
22
FB3
16
INE3
CS
CS
Error
Amp3
4.2 V
Q2 UVLO
VREF
10 µA 10 µA
15
MB39A114
21
(2) Setting constant current mode soft-start
To preven t r ush cur rent s when the IC i s tur ned on, you can set a soft- start by connecting sof t-sta r t capaci tors
(CS ) to the CS terminal (pin 22).
When CTL term inal (pin 14) is “H” levels and IC activated (VREF UVLO thr eshold voltage), Q2 becom es off
and the external soft-start capacitors (CS) connected to CS terminal are charged at 10 µA.
The error amp lif ie r1 output (FB12 termi nal (pin 7) ) is deter m in ed by compar i s on bet ween th e lower voltage of
the two non-inverted input terminal voltage (+INE1 terminal (pin 9) voltage, CS terminal voltages) and the inverted
input terminal voltage (−INE1 terminal (pin 8) voltage). The FB12 is decided for the soft-start period (CS terminal
voltage < +INE1) by the comparison between INE1 terminal voltage and CS terminal voltage. The DC/DC
converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally
connected to the CS terminal is charged.
The error amp lif ie r2 output (FB12 termi nal (pin 7) ) is deter m in ed by compar i s on bet ween th e lower voltage of
the two non-inverted input terminal voltage (+INE2 terminal (pin 3) voltage, CS terminal voltages) and the inverted
input terminal voltage (−INE2 terminal (pin 4) voltage). The FB12 is decided for the soft-start period (CS terminal
voltage < +INE2) by the comparison between INE2 terminal voltage and CS terminal voltage. The DC/DC
converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally
connected to the CS terminal is charged.
The soft-start time is obtained from the following formula :
Soft start time : ts (time until output voltage 100%)
ts (s) := +INE1 (+INE2) /10 µA × CS (µF)
CS terminal voltage
Comparison voltage with Error Amp1block
INE1 voltage
(comparison voltage with Error Amp2 block
INE2 voltage)
Soft-start time : ts
:= 4.9 V
+INE1
(+INE2)
:= 0 V
MB39A114
22
Soft start circuit
+
+
7
22
FB12
4
INE1
INE2
+INE1
+INE2
CS
CS
Error Amp1
(Error Amp2)
Q2 UVLO
VREF
10 µA 10 µA
8
9
3
MB39A114
23
SETTING THE DYNAMICALLY-CONTR OLLE D CHARGING
With an external resistor connected to +INE1 terminal (pin 9) , dynamically-controlled charging mode to reduce
the charge current to k eep A C adapter power constant when the partial potential point A of AC adapter voltage
(VCC) become lower the INE1 terminal v oltage.
Dynamically-controlled charging setting voltage : Vth
Vth (V) = (R1 + R2) /R2 × INE1
+
8
9
+INE1
INE1
A
R1
VCC
R2
<Error Amp1>
MB39A114
24
ABOUT CONSTANT VOLTAGE CONTROL STATE DETE C TION/
OVERVOLTAGE DETECTION TIMING CHART
In the constant voltage control state, the CVM ter minal (pin 5) of the constant voltage con trol state detection
block (CV Comp .) outputs the “L” le vel when the v oltage at the FB3 terminal (pin 15) of the error amplifier (Error
Amp3) becomes 2.6 V (Typ) or less.
When the DC/DC conv erter output voltage enters the state of the ov ervoltage higher than a setting voltage, the
voltage at FB3 terminal (pin 15) of the error amplifier (Error Amp3) becomes 1.3 V (Typ) or less. As a result, the
OVP terminal (pin 18) of the overvoltage detection block (OVComp.) outputs the “H” level.
Both of the CVM terminal and the OVP terminal are open-drain output forms :
Error Amp3 FB3
Error Amp2
Error Amp1 FB12
CV Comp. CVM
2.6 V CV Comp. VTHL
2.5 V
1.3 V OV Comp. VTHL
1.5 V
OV Comp. OVP
OUT
Constant current
control Constant voltage
control Overvoltage
State
MB39A114
25
ABOU T THE OPERATION TIMING CHART
Error Amp3 FB3
Current Amp2 OUTC2
Error Amp2
Error Amp1 FB12
2.5 V
1.5 V
OUT
Constant voltage
control AC adapter dynamically-
controlled charging
Constant current
control
MB39A114
26
PROCESSING WITHOUT USING OF THE CURRENT AMP1 AND AMP2
When C urre nt Amp is not us ed, co nnect the +INC1 terminal (pin 13), and INC1 terminal (pin 12) to VREF, and
be short-circuit ed of +INC2 te rmin al ( pi n 24 ) a nd INC2 termi na l (pi n 1) , an d the n le ave OUTC1 terminal (p in
10) and OUTC terminal (pin 2) open.
PROCESSING WITHOUT USING OF THE ERROR AMP1 AND AMP2
When Error Amp is not used, leave FB12 terminal (pin 7) open and connect the INE1 terminal (pin 8) and
INE2 terminal (pin 4) to GND, and connect +INE 1 termin al (p in 9) and +INE2 terminal (pin 3) to VREF.
24
+INC2
+INC1
INC2
OUTC1
OUTC2
VREF
INC1
12
1
10
2
6
13
VO
“Open”
Connection when Current Amp is not used
Connection when Error Amp is not used
23
+INE2
+INE1
INE2
VREF
FB12
GND
INE1
9
4
8
3
7
6
“Open”
MB39A114
27
PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open.
Connection when no soft-start time is specified
22
CS
“Open”
MB39A114
28
I/O EQUIVALENT CIRCUIT
(Continued)
+
21
23
VCC
GND
6VREF
22 CS +
17 RT
14CTL
3
FB12
+INE2
4INE2
37.8
k
12.35
k
33.1
k
51
k
GND
VREF
(5.0 V)
GND
VREF
(5.0 V)
VCC
GND
VREF
(5.0 V)
GND
VCC
CS
7
9
FB12
+INE1
8INE1
GND
VCC
CS
1.3 V
FB3
15
16INE3
VREF
(5.0 V)
GND
VCC
4.2 V
CS
13+INC1
12
10
INC1
OUTC1
VCC
GND
24+INC2
1
2
INC1
OUTC2
VCC
GND
Reference v oltage block
ESD protection
element ESD p rotecti on
element
Control block
Soft start block Triangular wave oscillator
block Error amplifier block (Error Amp1)
Error amplifier block (Error Amp2) Error amplifier block (Error Amp3)
Current detection amplifier block (Current Amp1) Current detection amplifier block (Current Amp2)
MB39A114
29
(Continued)
CT
GND
VCC
FB12
FB3
VCC
GND
INC2
VREF
(5.0 V)
VCC
GND
VH
20 OUT
5CVM
VCC
FB3
VREF
(5.0 V)
GND
18 OVP
VCC
FB3
VREF
(5.0 V)
GND
19 VH
VCC
GND
11SEL
GND
85 k
97 k
PWM comparator block Output block AC adapter detection block
Constant voltage control state detection block Overvoltage detection block
Bias vol tag e block Output voltage switching function block
MB39A114
30
APPLICATION EXAMPLE
A B
A
B
+
D2
R4
180 k
VIN
(8 to 25 V) R5
330 k
R6
30 k
R10
120 kC8
10000 pF
R11
30 k
R9
10 k
R12
30 k
R16
200 k
R13
20
k
Q2
SW
R14
1 k
R15
120
R3
330 k
R8
100 k
R7
22 k
C10
4700 pF
C6
1500 pF
C11
0.022 µF
R2
47 k
C9
0.1 µF
C12
0.1 µFC7
0.1
µF
C1
4.7
µF
C2
4.7
µF
C3
22
µF
C4
4.7 µF
Q1
L1
15 µH
D1
Q3
Battery
VO
I1
R1
0.033
R27
100 k
+
+
+
8
10
INE1
OUTC1
13
12
9
+
+
+
4
2
24
1
3
7
++
+
16
11
22
+INC1
INC1
+INE1
INE2
OUTC2
+INC2
INC2
+INE2
FB12
INE3
FB3
SEL
H : 4Cell
CS
+
+
+
+
5
18
21
20
19
14
CVM
OVP
VCC
OUT
VH
CTL
23617 GNDVREFRT
×20
×20
15
<Current Amp 1>
<Error Amp 1>
<Current Amp 2> <Error Amp 2> <PWM Comp.>
<UV Comp.>
<OV Comp.>
0.2 V
1.4 V
<CV Comp.>
2.6 V
VREF
INC2
(VO)
<Error Amp 3>
UVLO
VH
<OUT>
VCC 6 V
Drive
2.5 V
1.5 V
VREF
UVLO
Bias
Voltage
4.2 V/3.15 V
R1
R2
VREF
VREF
<OSC>
500 kHz
4.2 V
bias
CT
45 pF
VCC
VREF
5.0 V
<REF> <CTL>
<SOFT>
10 µA
L : 3Cell
MB39A114
31
PARTS LIST
Note : NEC : NEC Corporation
SANYO : SANYO Electric Co., Ltd.
ROHM : ROHM CO., LTD.
SUMIDA : Sumida Corporation
TDK : TDK Corporat ion
KOA : K OA Corporatio n
ssm : SUSUMU CO., LTD.
OS-CON is a trademark of SANYO Electric Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PARTS No.
Q1, Q3
Q2 Pch FET
Nch FET VDS = 30 V, ID = 7.0 A
VDS = 30 V, ID = 1.4 A NEC
SANYO µPA2714GR
MCH3401
D1, D2 Diode VF = 0.42 V (Max) , At IF = 3 A ROHM RB053L-30
L1 Inductor 15 µH 3.6 A, 50 mSUMIDA CDRH104R-150
C1, C2, C4
C3
C6
C7, C9
C8
C10
C11
C12
Ceramics Condenser
OS-CONTM
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
4.7 µF
22 µF
1500 pF
0.1 µF
0.01 µF
4700 pF
0.022 µF
0.1 µF
25 V
20 V
50 V
50 V
50 V
50 V
50 V
50 V
TDK
SANYO
TDK
TDK
TDK
TDK
TDK
TDK
C3225JB1E475K
20SVP22M
C1608JB1H152K
C1608JB1H104K
C1608JB1H103K
C1608JB1H472K
C1608JB1H223K
C1608JB1H104K
R1
R2
R3, R5
R4
R6
R7
R8
R9
R10
R11, R12
R13
R14
R15
R16
R27
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
33 m
47 k
330 k
180 k
30 k
22 k
100 k
10 k
120 k
30 k
20 k
1 k
120
200 k
100 k
1%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
KOA
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
SL1TTE33LOF
RR0816P-473-D
RR0816P-334-D
RR0816P-184-D
RR0816P-303-D
RR0816P-223-D
RR0816P-104-D
RR0816P-103-D
RR0816P-124-D
RR0816P-303-D
RR0816P-203-D
RR0816P-102-D
RR0816P-121-D
RR0816P-204-D
RR0816P-104-D
MB39A114
32
SELECTION OF COMPONENTS
Pch MOS FET
The P-ch MOS FET f or switching use should be rated for at least +20% more than the input voltage. To minimize
continuity loss, use a FET with low RDS(ON) between the drain and source. For high input voltage and high frequency
operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this application,
the NEC µPA2714GR is used. Continuity loss, on/off switching loss and total loss are determined by the following
formulas. The selection must ensure that peak drain current does not exceed rated values.
Example : Using the µPA2714GR
16.8 V setting
Input voltage VIN (Max) = 25 V, output voltage VO = 16.8 V, drain current ID = 3 A, oscillation frequency f osc =
300 kHz, L = 15 µH, drain-source on resistance RDS (ON) := 18 m, tr := 15 ns, tf := 42 ns
Continuity loss : Pc
PC = ID2 × RDS (ON) × Duty
On-cycle swiching loss : PS (ON)
PS (ON) = VD (Max) × ID × tr × fosc
6
Off-cycle switching loss : PS (OFF)
PS (OFF) = VD (Max) × ID (Max) × tf × fosc
6
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
Drain current (Max) : ID (Max)
ID (Max) =Io + VIN (Max) Vo tON
2L
=3 + 25 16.8 × 1 × 0.672
2 × 15 × 10 6300 × 103
:=3.6 A
Drain current (Min) : ID (Min)
ID (Min) =Io VIN (Max) Vo tON
2L
=3 25 16.8 × 1 × 0.672
2 × 15 × 106300 × 103
:=2.4 A
MB39A114
33
The above power dissipation figures f or the µPA2714GR are satisfied with ample margin at 2.0 W.
12.6 V setting
Input voltage VIN (Max) = 22 V, output voltage VO = 12.6 V, drain current ID = 3 A, oscillation frequency fosc =
300 kHz, L = 15 µH, drain-source on resistance RDS (ON) := 18 m, tr := 15 ns, tf := 42 ns
PC =ID2 × RDS (ON) × Duty
=32 × 0.018 × 0.672
:= 0.109 W
PS (ON) =VD × ID × tr × fosc
6
=25 × 3 × 15 × 109 × 300 × 103
6
:= 0.056 W
PS (OFF) =VD × ID (Max) × tf × fosc
6
=25 × 3.6 × 42 × 109 × 300 × 103
6
:= 0.189 W
PT =PC + PS (ON) + PS (OFF)
:= 0.109 + 0.056 + 0.189
:= 0.354 W
Drain current (Max) : ID (Max)
ID (Max) =Io + VIN (Max) Vo ton
2L
=3 + 22 12.6 × 1 × 0.572
2 × 15 × 106300 × 103
:=3.6 A
Drain current (Min) : ID (Min)
ID (Min) =Io VIN (Max) Vo tON
2L
=3 22 12.6 × 1 × 0.572
2 × 15 × 106300 × 103
:=2.4 A
MB39A114
34
The above power dissipation figures f or the µPA2714GR are satisfied with ample margin at 2.0 W.
Inductor
In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor,
but also to note that the lower lim it for r ipple current is a cr itical point that if reache d will ca use dis continuous
operation and a considerable drop in efficiency. This can be prevented b y choosing a higher inductance value,
which will enable continuous operation under light loads. Note that if the inductance value is too high, however,
direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at
the point where efficiency is greatest.
Note also that the DC superimposition characteristics become worse as the load current value approaches the
rated current value of the inductor , so that the inductance value is reduced and ripple current increases, causing
loss of eff iciency. Th e selection of rate d current value and inducta nce value will var y dependi ng on where the
point of peak efficiency lies with respect to load current. Inductance values are determined by the following
formulas.
The L value for all load current co nditions is set so th at the peak t o peak value of the ripp le curren t is 1/2 the
load current or less.
PC =ID2 × RDS (ON) × Duty
=32 × 0.018 × 0.572
:= 0.093 W
PS (ON) =VD × ID × tr × fosc
6
=22 × 3 × 15 × 109 × 300 × 103
6
:= 0.050 W
PS (OFF) =VD × ID (Max) × tf × fosc
6
=22 × 3.6 × 42 × 109 × 300 × 103
6
:= 0.166 W
PT =PC + PS (ON) + PS (OFF)
:= 0.093 + 0.050 + 0.166
:= 0.309 W
Inductance value : L
L 2 (VIN Vo) tON
Io
MB39A114
35
16.8 V output
Example)
12.6 V output
Example)
Inductance values derived from the above formulas are values that provide sufficient margin for continuous
operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore
necessary to determine the load level at which continuous operation becomes possible. In this application, the
SUMIDA CDRH104R-150 is used. The following formula is av ailable to obtain the load current as a continuous
current condition when 15 µH is used.
Example) Using the CDRH104R-150
15 µH (tolerance ± 30%) , rated current = 3.6 A
16.8 V output
12.6 V output
L 2 ( VIN (Max) Vo ) tON
Io
2 × (25 16.8) × 1 × 0.672
3 300 × 103
12.2 µH
L 2 ( VIN (Max) Vo ) tON
Io
2 × (22 12.6) × 1 × 0.572
3300 × 103
12.0 µH
The value of the load current satisfying the continuous current condition : Io
Io Vo tOFF
2L
Io Vo tOFF
2L
16.8 × 1 × (1 0.672)
2 × 15 × 106300 × 103
0.61 A
Io Vo tOFF
2L
12.6 × 1 × (1 0.572)
2 × 15 × 106300 × 103
0.60 A
MB39A114
36
To deter mi ne whether th e current through the inductor is wit hin rated values, it is necessar y to deter mine the
peak value of the ripple c urrent as well a s the peak-to-pea k values of the ripp le current tha t affec t the output
ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following
formulas.
Example) Using the CDRH104R-150
15 µH (tolerance ± 30%) , rated current = 3.6 A
Peak Value
16.8 V output
12.6 V output
Peak-to-peak Value
16.8 V output
Peak Value : IL
IL Io + VIN Vo tON
2L
Peak-to-peak Value :
IL
IL =VIN Vo tON
L
IL Io + VIN Vo tON
2L
3 + 25 16.8 × 1 × 0.672
2 × 15 × 106300 × 103
3.6 A
IL Io + VIN Vo tON
2L
3 + 22 12.6 × 1 × 0.572
2 × 15 × 106300 × 103
3.6 A
IL =VIN Vo tON
L
=25 16.8 × 1 × 0.672
15 × 106300 × 103
:=1.22 A
MB39A114
37
12.6 V output
Flyback diode
Shottky barrier diode (SBD) is generally used for the flyback diode when the rev erse voltage to the diode is less
than 40V. Th e SB D ha s th e c hara cteristic s of high er sp eed in te rms of faster rever s e rec overy t ime, and lower
forward v oltage, and is ideal f or achieving high efficiency. As long as the DC reverse v oltage is sufficiently higher
than the input voltage , and the mean current flowing during the diode conduction time is within the mean output
current level, and as the peak current is within the peak surge current limits, there is no problem. In this application
the ROHM RB053L-30 are used. The diode mean current and diode peak current can be obtained by the following
formulas.
Example) Using the RB053L-30
VR (DC reverse voltage) = 30 V, mean output current = 3.0 A, peak surge current = 70 A,
VF(forward voltage) = 0.42 V, at IF = 3.0 A
16.8 V output
12.6 V output
IL =VIN Vo tON
L
=22 12.6 × 1 × 0.572
15 × 106300 × 103
:=1.2 A
Diode mean current : IDi
IDi Io × (1 Vo )
VIN
Diode peak current : IDip
IDip (Io + Vo tOFF)
2L
IDi Io × (1 Vo )
VIN
3 × (1 0.672)
0.984 A
IDi Io × (1 Vo )
VIN
3 × (1 0.572)
1.284 A
MB39A114
38
16.8 V output
12.6 V output
Smoothing capacitor
The smoothing capacitor is an indispensable element for reducing ripple voltage in output. In selecting a smooth-
ing capacitor, it is essential to consider equivalent series resistance (ESR) and allowable ripple current. Higher
ESR means higher ripple voltage, so that to reduce ripple voltage it is necessary to select a capacitor with low
ESR. However , the use of a capacitor with low ESR can have substantial effects on loop phase characteristics,
and ther e fore requir es a tten tion to s yste m s ta bil ity. Ca r e sho u ld be a lso t aken to us e a c ap ac ity wi th su ffi ci ent
margin for allowable ripple current. This application uses the 20SVP22M (OS-CONTM : SANYO) . The ESR,
capacitance value, and ripple current can be calculated from the follo wing formulas.
Example) Using the 20SVP22M
Rat ed voltage = 20 V, ESR = 60 m, maximum allowable ripple current = 1450 mArms
Equivalent series resistance
16.8 V output
IDip (Io + Vo tOFF)
2L
3.6 A
IDip (Io + Vo tOFF)
2L
3.6 A
Equivalent series resistance :
ESR
ESR Vo 1
IL2πfCL
Capacitance value : CL
CL IL
2πf (Vo IL × ESR)
Ripple current : ICLrms
ICLrms (VIN Vo) tON
23L
ESR Vo 1
IL2πfCL
0.168 1
1.22 2π × 300 × 103 × 22 × 106
114 m
MB39A114
39
12.6 V output
Capacitance value
16.8 V output
12.6 V output
Ripple current
16.8 V output
12.6 V output
ESR Vo 1
IL2πfCL
0.126 1
1.2 2π × 300 × 103 × 22 × 106
80 m
CL IL
2πf (Vo IL × ESR)
1.22
2π × 300 × 103 × (0.168 1.22 × 0.06)
6.8 µF
CL IL
2πf (Vo IL × ESR )
1.2
2π × 300 × 103 × (0.126 1.2 × 0.06)
11.8 µF
ICLrms (VIN Vo) tON
23L
(25 16.8) × 0.672
23 × 15 × 106 × 300 × 103
707 mArms
ICLrms (VIN Vo) tON
23L
(22 12.6) × 0.572
23 × 15 × 106 × 300 × 103
690 mArms
MB39A114
40
REFERENCE DATA
(Continued)
0.01 0.1 1 10
100
98
96
94
92
90
88
86
84
82
80
02468101214
100
98
96
94
92
90
88
86
84
82
80
18
16
14
12
10
8
6
4
2
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
D.C.C. Mode
Dead Battery Mode
D.C.C. Mode : Dynamically-controlled charging
Conversion efficiency vs. Charging current (constant voltage mode)
Conversion efficiency vs. Charging voltage (constant current mode)
Ta = +25 °C
VAC = 19 V
VBATT = 12 .6 V setting
η = (VBATT × IBATT) / (VAC × IAC)
VBATT conversion
Ta = +25 °C
VAC = 19 V
IBATT = 3 A setting
η = (VBATT × IBATT) / (VAC × IAC)
VBATT conversion
IBATT (A)
Effciency η (%)
VBATT (V)
Effciency η (%)
BATT voltage vs. BATT charging current (12.6 V setting)
Ta = +25 °C
VAC = 19 V
VBATT = 12.6 V setting
IBATT (A)
VBATT (V)
MB39A114
41
(Continued)
0.01 0.1 1 10
100
98
96
94
92
90
88
86
84
82
80
0246810121416
100
98
96
94
92
90
88
86
84
82
80
18
16
14
12
10
8
6
4
2
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
D.C.C. Mode
Dead Battery Mode
D.C.C. Mode : Dynamically-controlled charging
Conversion efficiency vs. Charging current
(constant voltage mode)
Conversion efficiency vs. Charging voltage (constant current mode)
Ta = +25 °C
VAC = 19 V
VBATT = 16.8 V setting
η = (VBATT × IBATT) / (VAC × IAC)
VBATT conversion
Ta = +25 °C
VAC = 19 V
IBATT = 3 A setting
η = (VBATT × IBATT) / (VAC × IAC)
VBATT conversion
IBATT (A)
Effciency η (%)
IBATT (A)
VBATT (V)
VBATT (V)
Effciency η (%)
BATT voltage vs. BATT charging current (16.8 V setting)
Ta = +25 °C
VAC = 19 V
VBATT = 16.8 V setting
MB39A114
42
(Continued)
VD (V)
20
15
10
5
0
OUT (V)
15
10
5
0
012345678910(µs)
VAC = 19 V
CV mode
IBATT = 1.5 A
VBATT = 12.6 V setting
VD (V)
20
15
10
5
0
OUT (V)
15
10
5
0
012345678910(µs)
VAC = 19 V
CC mode
IBATT = 3 A setting
VBATT = 10 V
Switching waveform at constant voltage mode (12.6 V setting)
Switching waveform at constant current mode (12.6 V setting at 10 V)
MB39A114
43
(Continued)
VD (V)
20
15
10
5
0
OUT (V)
15
10
5
0
012345678910(µs)
VAC = 19 V
CV mode
IBATT = 1.5 A
VBATT = 16.8 V setting
VD (V)
20
15
10
5
0
OUT (V)
15
10
5
0
012345678910(µs)
VAC = 19 V
CC mode
IBATT = 3 A setting
VBATT = 10 V
Switching waveform at constant voltage mode (16.8 V setting)
Switching waveform at constant current mode (16.8 V setting at 10 V)
MB39A114
44
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 12.6 V setting
VO
CTL
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 12.6 V setting
OVP
CVM
CTL
Soft start operating waveform at constant voltage mode (12.6 V setting) (1)
Soft start operating waveform at constant voltage mode (12.6 V setting) (2)
MB39A114
45
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 12.6 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 12.6 V setting
OVP
CVM
CTL
Discharge operating waveform at constant voltage mode (12.6 V setting) (1)
Discharge operating waveform at constant voltage mode (12.6 V setting) (2)
MB39A114
46
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 12.6 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 12.6 V setting
OVP
CVM
CTL
Soft start operating waveform at constant current mode (12.6 V setting) (1)
Soft start operating waveform at constant current mode (12.6 V setting) (2)
MB39A114
47
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 12.6 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 12.6 V setting
OVP
CVM
CTL
Discharge operating waveform at constant current mode (12.6 V setting) (1)
Discharge operating waveform at constant current mode (12.6 V setting) (2)
MB39A114
48
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 16.8 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 16.8 V setting
OVP
CVM
CTL
Soft start operating waveform at constant voltage mode (16.8 V setting) (1)
Soft start operating waveform at constant voltage mode (16.8 V setting) (2)
MB39A114
49
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 16.8 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CV mode
RL = 20
VBATT = 16.8 V setting
OVP
CVM
CTL
Discharge operating waveform at constant voltage mode (16.8 V setting) (1)
Discharge operating waveform at constant voltage mode (16.8 V setting) (2)
MB39A114
50
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 16.8 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 16.8 V setting
OVP
CVM
CTL
Soft start operating waveform at constant current mode (16.8 V setting) (1)
Soft start operating waveform at constant current mode (16.8 V setting) (2)
MB39A114
51
(Continued)
CTL (V)
VO (V)
5
0
20
15
10
5
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 16.8 V setting
CTL
VO
CTL (V)
CVM (V)
5
0
OVP (V)
5
0
6
4
2
0
0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 25.0(ms)
VAC = 19 V
CC mode
RL = 3.33
VBATT = 16.8 V setting
OVP
CVM
CTL
Discharge operating waveform at constant current mode (16.8 V setting) (1)
Discharge operating waveform at constant current mode (16.8 V setting) (2)
MB39A114
52
USAGE PRECAUTIONS
Printed circuit board ground lines should be set up with consideration for common impedance.
Take appropriate static electricity measures.
Containers for semiconductor materials should have anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 k to 1 M between body and ground.
Do not apply negative voltages.
The u se of negati ve voltage s bel ow 0.3 V m ay create parasitic transis tors on LSI lines, wh ich can c ause
abnorm al opera tio n.
ORDERING INFORMATION
Part number Package Remarks
MB39A114PFV 24-pin pla st ic SSOP
(FPT-24P-M03)
MB39A114
53
PACKAGE DIMENSION
24-pin plastic SSOP
(FPT-24P-M03)
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) .
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2003 FUJITSU LIMITED F24018S-c-4-5
7.75±0.10(.305±.004)
5.60±0.10 7.60±0.20
(.220±.004) (.299±.008)
*1
*2
0.10(.004)
112
1324
0.65(.026) –0.07
+0.08
0.24
.009 +.003
–.003 M
0.13(.005)
INDEX
0.17±0.03
(.007±.001)
"A"
0.25(.010)
0.10±0.10
(.004±.004)
(Stand off)
Details of "A" part
(Mounting height)
1.25 +0.20
–0.10
–.004
+.008
.049
0~8˚
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10(.004)
MB39A114
54
MEMO
MB39A114
55
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
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http://jp.fujitsu.com/fml/en/
For further information please contact:
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Korea
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http://www.fujitsu.com/sg/services/micro/semiconductor/
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Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
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10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
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The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
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limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
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Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
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The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.