4/26/04
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IRF7842
HEXFET® Power MOSFET
Notes through are on page 9
Top View
8
1
2
3
45
6
7
D
D
D
DG
S
A
S
S
A
SO-8
PD - 95864
Benefits
lVery Low RDS(on) at 4.5V VGS
lLow Gate Charge
lFully Characterized Avalanche Voltage
and Current
Applications
lSynchronous MOSFET for Notebook
Processor Power
lSecondary Synchronous Rectification
for Isolated DC-DC Converters
lSynchronous Fet for Non-Isolated
DC-DC Converters
VDSS RDS(on) max Qg (typ.)
40V 5.0m:@VGS = 10V 33nC
Absolute Maximum Ratings
Parameter Units
VDS Drain-to-Source Voltage V
VGS Gate-to-Source Voltage
ID @ TA = 25°C Continuous Drai n Current, VGS @ 10V
ID @ TA = 70°C Continuous Drai n Current, VGS @ 10V A
IDM Pulsed Drai n Current
c
PD @TA = 25°C Power Dissipation
f
W
PD @TA = 70°C Power Dissipation
f
Linear Derating Fac t or W/°C
TJ Operating Junction and °C
TSTG Storage Temperat ure Range
Thermal Resistance Parameter Typ. Max. Units
RθJL Junct i on-to-Drain Lead
g
––– 20 °C/W
RθJA Junction-to-Ambient
fg
––– 50
-55 to + 150
2.5
0.02
1.6
Max.
18
14
140
± 20
40
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Static @ TJ = 25°C (unless otherwise specif i ed)
Parameter Min. Typ. Max. Units
BVDSS Drain-to-S ource Breakdown Vol tage 40 ––– ––– V
∆ΒVDSS
/
∆TJ Breakdown Voltage Temp. Coef ficient ––– 0.037 ––– V/°C
RDS(on) Static Drai n-t o -S ource On-Resis t ance ––– 4.0 5.0 mΩ
––– 4.7 5.9
VGS(th) Gate Threshol d V ol tage 1.35 ––– 2.25 V
∆VGS(th) Gate Threshol d V ol tage Coefficient ––– - 5.6 ––– mV/°C
IDSS Drain-to-S ource Leakage Current ––– ––– 1. 0 µA
––– ––– 150
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leak age ––– ––– -100
gfs Forward Transconductance 81 ––– ––– S
QgTotal Gate Charge ––– 33 50
Qgs1 Pre-Vth Gate-t o-Source Charge ––– 9. 6 –––
Qgs2 Post-Vth Gate-to-Source Charge ––– 2. 8 ––– nC
Qgd Gate-to-Drain Charge ––– 10 –––
Qgodr Gate Charge Overdriv e ––– 10. 6 –––
Qsw Switc h Charge (Q gs2 + Qgd)––– 12.8 –––
Qoss Output Charge ––– 18 ––– nC
RGGate Resis t ance ––– 1. 3 TBD Ω
td(on) Turn-On Delay Time ––– 14 –––
trRise Time ––– 12 –––
td(off) Turn-Off Del ay Ti m e ––– 21 ––– ns
tfFall Time ––– 5. 0 –––
Ciss Input Capacit ance ––– 4500 –––
Coss Output Capacit ance ––– 680 ––– pF
Crss Reverse Transfer Capacitance ––– 310 –––
Avalanche Characterist i cs
Parameter Units
EAS Single Pul se Avalanche Energy
d
mJ
IAR Avalanche Current
c
A
Diode Characterist i cs
Parameter Min. Typ. Max. Units
ISContinuous S ource Current ––– ––– 3. 1
(Body Diode) A
ISM Pulsed S ource Current ––– ––– 140
(Body Diode)
c
VSD Diode Forward Voltage ––– ––– 1. 0 V
trr Reverse Rec overy Time ––– 99 150 ns
Qrr Reverse Rec overy Charge ––– 11 17 nC
Conditions
Max.
50
14
ƒ = 1.0MHz
Conditions
VGS = 0V, ID = 250µA
Reference t o 25° C, ID = 1mA
VGS = 10V, ID = 17A
e
MOSFET symbol
VDS = 16V, VGS = 0V
VDD = 20V, VGS = 4. 5V
e
ID = 14A
VDS = 20V
VGS = 20V
VGS = -20V
VDS = 32V, VGS = 0V
TJ = 25°C, IF = 14A, V DD = 20V
di/dt = 100A/µs
e
TJ = 25°C, IS = 14A, V GS = 0V
e
showing the
integral rev erse
p-n juncti on di ode.
VGS = 4.5V, I D = 14A
e
VGS = 4.5V
Typ.
–––
VDS = VGS, ID = 250µA
Clamped Induc tive Load
VDS = 20V, I D = 14A
VDS = 32V, VGS = 0V, TJ = 125°C
–––
ID = 14A
VGS = 0V
VDS = 20V
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 25°C
2.5V
VGS
TOP 10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.8V
BOTTOM 2.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 150°C
2.5V
VGS
TOP 10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.8V
BOTTOM 2.5V
1.5 2.0 2.5 3.0 3.5 4.0
VGS, Gate-to-Source Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ID, Drain-to-Source Current (Α)
VDS = 25V
≤ 60µs PULSE WIDTH
TJ = 25°C
TJ = 150°C
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 18A
VGS = 10V
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 20406080
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 30V
VDS= 20V
ID= 14A
0.2 0.4 0.6 0.8 1.0 1.2
VSD, Source-t o-Drain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
0 1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN T H IS AREA
LIM ITED BY RDS(on)
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 9. Maximum Drain Current Vs.
Case Temperature Fig 10. Threshold Voltage Vs. Temperature
25 50 75 100 125 150
TJ , Junction Temperature (°C)
0
2
4
6
8
10
12
14
16
18
ID , Drain Current (A)
-75 -50 -25 025 50 75 100 125 150
TJ , Tem perat ure ( ° C )
0.4
0.8
1.2
1.6
2.0
2.4
VGS(th) Gate threshold Voltage (V)
ID = 250µA
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rect angular Pulse Durati on (sec)
0.0001
0.001
0.01
0.1
1
10
100
Thermal Response ( Z thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
Ri (°C/W) τi (sec)
10.48 0.138167
26.83 1.8582
12.69 44.8
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci τi/Ri
Ci= τi/Ri
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Fig 13c. Maximum Avalanche Energy
Vs. Drain Current
Fig 14a. Switching Time Test Circuit
Fig 14b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)
trtf
VGS
Pulse Widt h < 1µs
Duty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
Fig 13b. Unclamped Inductive Waveforms
Fig 13a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 12. On-Resistance Vs. Gate Voltage
2.0 4.0 6.0 8.0 10.0
VGS, Gate-to-Source Voltage (V)
0
4
8
12
16
RDS(on), Drain-to -Source On Resistance (mΩ)
TJ = 25°C
TJ = 125°C
ID = 18A
25 50 75 100 125 150
Starting TJ, Junction Tem perature (°C)
0
40
80
120
160
200
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 6.7A
7.5A
BOTTOM 14A
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D.U.T. VDS
ID
IG
3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 16. Gate Charge Test Circuit
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Fig 17. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
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SO-8 Package Details
SO-8 Part Marking
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BAS IC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BAS IC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MIL L IME T E R SINCHES
MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BAS IC 0.635 BAS IC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
7
K x 45°
8X L 8X c
y
0.25 [.010] CAB
e1
A
A1
8X b
C
0.10 [.004]
4312
F OOT P R I NT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
4. OUT LINE CONFORMS T O JEDEC OUTLINE MS -012AA.
NOT ES :
1. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ].
5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUSIONS NOT T O EXCEED 0.25 [.010].
7 DIME NS ION IS T HE LENGT H OF LEAD F OR S OLDERING T O
A S U B S T R AT E .
MOLD PROT RUSIONS NOT T O EXCEED 0.15 [.006].
8X 1.78 [.070]
DAT E CODE (YWW)
XXXX
INTERNATIONAL
RECTIFIER
LOGO
F7101
Y = LAS T DIGIT OF T HE YEAR
PART NUMBER
LOT CODE
WW = WE E K
EXAMPLE: THIS IS AN IRF7101 (MOSFET)
P = DE S I GNAT E S L E AD- F R E E
PRODUCT (OPTIONAL)
A = AS S E MB L Y S IT E CODE
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Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.5mH
RG = 25Ω, IAS = 14A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.4/04
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSIO N : MI LLIMETER.
2. ALL DIMENSIO NS A RE SHOWN IN MILLIMETE RS (INCHES).
3. O U T LINE CONFORM S TO EI A-481 & EIA-541.
SO-8 Tape and Reel
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