74LVX138MTCX - Fairchild Semiconductor

June 1993

Revised October 2003

74LVX138 Low Voltage 1-of-8 Decoder/Demultiplexer

74LVX138

Low Voltage 1-of-8 Decoder/Demultiplexer

General Description

The LVX138 is a high -sp eed 1 -of-8 deco der/de multi plexer.

This device is ideally suited for high-speed bipolar memory

chip select address decoding. The multiple input enables

allow parallel expansion to a 1-of-24 decoder using just

three LVX138 devices or a 1-of-32 decoder using four

LVX138 devices and one inverter.

Features

■Input voltage level translation from 5V to 3V

■Ideal for low power/low noise 3.3V applications

■Guaranteed simultaneous switching noise level and

dynamic thresh ol d per for man ce

Ordering Code:

Devices also available in Tape and R eel. Speci fy by append ing suffix let te r “X” to the ord ering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Pin Descriptions

Order Number Package Number Package Description

74LVX138M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LVX138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVX138MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

A0–A2Address Inputs

E1– E2Enable Inpu ts

E3Enable Inpu t

O0–O7Outputs

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74LVX138

Functional Description

The LVX138 high-speed 1-of-8 decoder/demultiplexer

accepts three binary weighted inputs (A0, A1, A2) and,

when enabled, provides eight mutually exclusive active-

LOW outputs (O0–O7). The LVX138 featur es three Enable

inputs, two a ctive- LO W (E 1, E2) and one active-HIGH (E3).

All outputs will be HIGH unless E1 and E2 are LOW and E3

is HIGH.

The LVX138 ca n be used as an 8-output demultiplexe r by

using one of the active LOW Enable inputs as the data

input and the other Enable in puts as strobes. The Enable

inputs which are not used must be permanently tied to their

appropriate active-HIGH or active-LOW state.

Tr uth Table

H = HIGH Voltage Le ve l

L = LOW Voltage Level

X = Immaterial

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propaga tio n delays.

Inputs Outputs

E1E2 E3A0A1 A2O0O1O2O3 O4O5O6O7

HXXXXXHHHHHHHH

XHXXXXHHHHHHHH

XXLXXXHHHHHHHH

LLHL LLLHHHHHHH

LLHHLLHLHHHHHH

LLHLHLHHLHHHHH

LLHHHLHHHLHHHH

LLHL LHHHHHLHHH

LLHHLHHHHHHLHH

LLHLHHHHHHHHLH

LLHHHHHHHHHHHL

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74LVX138

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions (Note 2)

Note 1: The “Absolute Maximum Ratings” are those val ues beyond w hich

the saf ety of the device cannot be guarante ed. The device s hould not be

operated at these limits. The parametric values defined in the Electrical

Char ac teristic s tables are not guaranteed at t he ab s ol ute m ax imum r ating s .

The “R ecomm ended Ope rating Co ndition s” table will define the condit ions

for actu al device operation.

Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Noise Characteri stics (Note 3)

Note 3: Input tr = tf = 3 ns

Supply Voltage (VCC)−0.5V to +7.0V

DC Input Diode Current (IIK)

VI = −0.5V −20 mA

DC Input Voltage (VI)−0.5V to 7V

DC Output Diode Current (IOK)

VO = −0.5V −20 mA

VO = VCC + 0.5V +20 mA

DC Output Voltage (VO)−0.5V to VCC + 0.5V

DC Output Source

or Sink Current (IO)±25 mA

DC VCC or Ground Current (ICC or IGND)±75 mA

Storage Temperature (TSTG) −65°C to +150°C

Power Dissipation 180 mW

Supply Voltage (VCC) 2.0V to 3.6V

Input Voltage (VI) 0V to 5.5V

Output Voltage (VO)0V to V

Operating Temperature (TA)−40°C to +85°C

Input Rise and Fall Time (∆t/∆V) 0 ns/V to 100 ns/V

Symbol Parameter VCC TA = +25°CT

A = −40°C to +85°CUnits Conditions

Min Typ Max Min Max

VIH HIGH Level 2.0 1.5 1.5

Input Voltage 3.0 2.0 2.0 V

3.6 2.4 2.4

VIL LOW Level 2.0 0.5 0.5

Input Voltage 3.0 0.8 0.8 V

3.6 0.8 0.8

VOH HIGH Level 2.0 1.9 2.0 1.9 VIN = VIL or VIH IOH = −50 µA

Output Voltage 3.0 2.9 3.0 2.9 V IOH = −50 µA

3.0 2.58 2.48 IOH = −4 mA

VOL LOW Level 2.0 0.0 0.1 0.1 VIN = VIL or VIH IOL = 50 µA

Output Voltage 3.0 0.0 0.1 0.1 V IOL = 50 µA

3.0 0.36 0.44 IOL = 4 mA

IIN Input Leakage Current 3.6 ±0.1 ±1.0 µAV

IN = 5.5V or GND

ICC Quiescent Supply Current 3.6 4.0 40.0 µAV

IN = VCC or GND

Symbol Parameter VCC TA = 25°CUnits CL (pF)

(V) Typ Limit

VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.5 V 50

VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.3 −0.5 V 50

VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50

VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50

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74LVX138

AC Electrical Characteristics

Note 4: Parameter guaranteed by design. tOSLH = |tPLHm–tPLHn|, tOSHL = |tPHLm–tPHLn|

Capacitance

Note 5: CPD is defined as the v alue of the internal equivalent capa c it ance which is calc ulated from the operating cu rrent consumption without load.

Average operating current can be obtained by the equation: CPD × VCC × IIN + ICC

Symbol Parameter VCC TA = +25°CT

A = −40°C to +85°CUnits CL (pF)

(V) Min Typ Max Min Max

tPLH Propagation 2.7 7.1 13.8 1.0 16.5

tPHL Delay Time 9.6 17.3 1 .0 20.0 50

An to On3.3 ± 0.3 5.5 8.8 1.0 10.5 15

8.0 12.3 1.0 14.0 50

tPLH Propagation 2.7 8.8 16.0 1.0 18.5

tPHL Delay Time 11.3 19.5 1.0 22.0 50

E1 or E2 to On3.3 ± 0.3 6.9 10.4 1.0 11.5 15

9.4 13.9 1.0 15.0 50

tPLH Propagation 2.7 8.7 16.3 1.0 19.5

tPHL Delay Time 11.2 19.8 1.0 23.0 50

E3 to On3.3 ± 0.3 6.8 10.6 1.0 12.5 15

9.3 14.1 1.0 16.0 50

tOSHL Output to Output 2.7 1.5 1.5 ns 50

tOSLH Skew (Note 4) 3.3 1.5 1.5

Symbol Parameter TA = +25°CT

A = −40°C to +85°CUnits

Min Typ Max Min Max

CIN Input Capacitance 4 10 10 pF

CPD Power Dissipation Capacitance (Note 5) 34 pF

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74LVX138

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M16A

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74LVX138

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Sma ll Outline Pack age (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16D

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74LVX138 Low Voltage 1-of-8 Decoder/Demultiplexer

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lea d Th in S hri n k Small Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC16

Fairchild does not assume an y responsibility fo r use of any circu itry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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