LMX9820ASM - National Semiconductor

LMX9820A

LMX9820A Bluetooth Serial Port Module

Literature Number: SNOSAF5J

LMX9820A Bluetooth Serial Port Module

February 200 7

1.0 General Desc ription

The National Semiconductor LMX9820A Bluetooth Serial

Port module is a highly integrated radio, baseband control-

ler, and memory device implemented on an FR4 substrate.

All hardware and firmware is included to provide a com-

plete solution from antenna from the complete lower and

upper layers of the Bluetooth stack, up to the application

support layers including the Generic Access Profile (GAP),

the Service Discovery Application Profile (SDAP), and the

Serial Port Profile (SPP). The module includes a config-

urable service database to fulfill service requests for addi-

tional profiles on the host. The LMX9820A features a small

form factor (10.1 x 14.1 x 2.0 mm) design, which solves

many of the challenges associated with compact system

integration. Moreover, the LMX9820A is pre-qualified as a

Bluetooth Integrated Component. Conformance testing

through the Bluetooth qualification program enables a fast

time to market after system integration by ensuring a high

degree of compliance and interoperability.

2.0 Functional Block Diagram

UART_RX

UART_TX

UART_RTS#

UART_CTS#

UART

IOVCC

TX_SWITCH_P

ENV0

ENV1

LSTAT_0

LSTAT_1

HOST_WU

RESET_B#

RESET_5100#

AUX

PORTS

COMPACTRISC™

BASEBAND

LINK

MGMNT

CONTROLLER

JTAGRAMFLASH

DIGITAL

SMART

RADIO

SYNTHESIZER

LNA

CRYSTAL/OSCILLATOR

ANTENNA

DIG_GND[1:2]VCC

PROCESSOR

(LMP)

CORE

ANALOG

DIGITAL

VDD_ANA_OUT

VDD_DIG_OUT

VDD_DIG_PWR_D#

VOLTAGE

REGULATORS

FIRMWARE

(INCLUDES

PRO FILES AND

COMMAND

INTERFACE)

ISEL2

ISEL1

INTERFACE

SELECT

ADVANCED

AUDIO INTERFACE

AAI_STD

AAI_SRD

AAI_SFS

AAI_SCLK

Based on National’s CompactRISC™ 16-bit processor

architecture and Digital Smart Radio technology, the

LMX9820A is optimized to handle the data and link man-

agement processing requirements of a Bluetooth node.

The firmware supplied with this device offers a complete

Bluetooth (v1.1) stack including profiles and command

interface. This firmware features point-to-point and point-

to-multipoint link management supporting data rates up to

the theoretical maximum over RFComm of 704 kbps. The

internal memory supports up to three active Bluetooth data

links and one active SCO link.

1.1 APPLICATIONS

■Personal Digital Assistants

■POS Terminals

■Data Loggin g Systems

■Audio Gateway applications

LMX9820A

Bluetooth® Serial Port Module

CompactRISC is a trademark of National Semiconductor Corporation.

Bluetooth is a registered trademark of Bluetooth SIG, Inc. and is used under license by National Semiconductor.

Obsolete

www.national.com 2

LMX9820A

3.0 Fe at ures

■Bluetooth version 1.1 qualified

■Implemented in CMOS technology on FR4 substrate

■Temperature Range: -40°C to +85°C

■FCC certified on LMX9820ADONGLE,

FCC ID ED9LMX9820ASM

3.1 DIGITAL HARDWARE

■Baseband and Link Management processors

■CompactRISC Core

■Integrated Memory:

–Flash

–RAM

■UART Command/Data Port:

– Support for up to 921.6k baud rate

■Auxiliary Host Interface Ports:

–Link Status

– Transceiver Status (Tx or Rx)

– Operati ng Envi ron me nt Contro l:

– Default Bluetooth mode

– In System Programming (ISP) mode

■Advanced Power Management (APM) features

■Advanced Audio Inter face for external PCM codec

3.2 FIRMWARE

■Compl ete Blueto oth Stac k inc lu din g:

– Baseband and Link Manager

– L2CAP, RFCOMM, SDP

–Profiles:

–GAP

–SDAP

– SPP

■Additional Profile support on host for any SPP based

profi le, like

– Dial Up Networking (DUN)

– Facsimile Profile (FAX)

– File Transfer Protocol (FTP)

– Object Push Profile (OPP)

– Headset (HSP)

– Handsfree Profile (HFP)

■On-chip application support including:

– Command Interface:

– Link setup and configuration (also Multipoint)

– Config urat ion of the module

– In-System Programming (ISP)

– Service dat abase modificatio ns

– Default connections

– UART Transparent mode

– Different Operation modes:

– Automatic mode

– Command mode

3.3 DIGITAL SMART RADIO

■Accepts external clock or crystal input:

–12 MHz

– 20 ppm cumulative clock error required for Bluetooth

– Secondary 32.768kHz oscillator for low-power

modes.

■Synthesizer:

– Integrated VCO and loop filter

– Provides all clocking for radio and baseband func-

tions

■Antenna Port (50 ohms nominal impedance):

– Embedded front-end filter for enhanced out of band

performance

■Integr ate d t rans mi t/re cei ve s w itc h (ful l-du ple x op eration

via antenn a port)

■Typical -81 dBm input sensitivity

■0 dBm typical output power

3.4 PHYSICAL DIMENSIONS

■Compact size: 10.1mm x 14.1mm x 2.0mm

■Complete system interface provided in Land Grid Array

on underside for surface-mount assembly

Obsolete

3 www.national.com

LMX9820A

Table of Contents

1.0 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 APP L IC ATION S . . . . . . . . . . . . . . . . . . . . . . . . . . .1

2.0 Function a l B lo c k D ia gram . . . . . . . . . . . . . . . . . . . . . . .1

3.0 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

3.1 DIGITAL HARDWARE . . . . . . . . . . . . . . . . . . . . . .2

3.2 FIR M W ARE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

3.3 DIGITAL SMART RADIO . . . . . . . . . . . . . . . . . . . .2

3.4 PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . .2

4.0 C onn e c tion Dia g r a m . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

5.0 Pad Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

6.0 Electrica l Speci f i c a t ions . . . . . . . . . . . . . . . . . . . . . . . .8

6.1 GENERAL SPECIFICATIONS . . . . . . . . . . . . . . . .8

6.2 DC CHARACTERISTICS . . . . . . . . . . . . . . . . . . .10

6.3 RF PE R FO R MANCE C H AR ACTER I STICS . . . .1 1

6.4 PERFORMANCE DATA (TYPICAL ) . . . . . . . . . .13

7.0 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . .15

7.1 BASEBAND AND LINK MANAGEMENT

PROCESSORS . . . . . . . . . . . . . . . . . . . . . . . . . .15

7.1.1 Bluetooth Lower Link Controller . . . . . . . . . . . .15

7.1.2 Bluetooth Upper Layer Stack . . . . . . . . . . . . . .15

7.1.3 Profile Support . . . . . . . . . . . . . . . . . . . . . . . . .15

7.1.4 Application with Command Interface . . . . . . . .15

7.2 MEM ORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 5

7.3 CON T R OL AND TRANS PORT PORT . . . . . . . . .15

7.4 AUXILIARY PORTS . . . . . . . . . . . . . . . . . . . . . . .15

7.4.1 Reset_5100 and Reset_b# . . . . . . . . . . . . . . .15

7.4.2 Operating Environment Pads (Env0 and Env1) 15

7.4.3 Interface Select Inputs (ISEL1, ISEL 2) . . . . . .16

7.4.4 Module and LInk Status Outputs . . . . . . . . . . .16

7.5 AU D IO PORT . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

8.0 D igita l S m a r t R a dio . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8.1 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . .17

8.2 RECEIVER FRONT END . . . . . . . . . . . . . . . . . . .17

8.2.1 Poly-Phase Bandpass F ilter . . . . . . . . . . . . . . .17

8.2.2 Hard Limiter and RSSI . . . . . . . . . . . . . . . . . . .17

8.3 RECEIVER BACK END . . . . . . . . . . . . . . . . . . . .17

8.3.1 Frequency Discriminator . . . . . . . . . . . . . . . . .17

8.3.2 Post-Detection Filter and Equalizer . . . . . . . . .17

8.4 AUTOTUNING CIRCUITRY . . . . . . . . . . . . . . . . .17

8.5 SYN T H ESIZER . . . . . . . . . . . . . . . . . . . . . . . . . .17

8.5.1 Phase-Frequency Detector . . . . . . . . . . . . . . .17

8.6 TRANSMITTER CIRCUITRY . . . . . . . . . . . . . . . .18

8.6.1 IQ-DA Converters and TX Mixers . . . . . . . . . .18

8.7 CRYSTAL REQUIREMENT S . . . . . . . . . . . . . . .18

8.7. 1 Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8.7.2 TCXO (Temperature Compensated Crystal

Oscillator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

8.7.3 Optional 32 kHz Oscillator . . . . . . . . . . . . . . . .21

8.7.4 ESR (Equivalent Series Resistance) . . . . . . . .22

8.8 ANTENNA MATCHING AND FRONT-END

FIL TERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

9.0 System Power- Up Se quence . . . . . . . . . . . . . . . . . . . 23

10.0 Integr ate d Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . 24

10.1 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

10.1.1 Operation Modes . . . . . . . . . . . . . . . . . . . . . . 24

10.1.2 Default Connections . . . . . . . . . . . . . . . . . . . . 24

10.1.3 Event Filte r . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

10.1.4 Default Link Policy . . . . . . . . . . . . . . . . . . . . . 24

10.1.5 Audio Support . . . . . . . . . . . . . . . . . . . . . . . . . 24

10.1.6 Default Sniff operation . . . . . . . . . . . . . . . . . . 24

11.0 Power Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

11.1 LOW POWER MODES . . . . . . . . . . . . . . . . . . . . 25

11.2 UART TRANSPORT LAYE R CONTROL . . . . . . 26

11.2.1 Hardware Wa ke-Up Functio n a lity . . . . . . . . . . 26

11.2.2 Disabling the UART Transport Layer . . . . . . . 26

11.2.3 LMX9820A Enabling the UART Interface . . . . 26

11.2.4 Enabling the UART Transport Layer from Host 26

12.0 Command Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

12.1 FRAMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

12.1.1 Start and End Delimiters . . . . . . . . . . . . . . . . . 27

12.1.2 Packet Ty p e ID . . . . . . . . . . . . . . . . . . . . . . . . 27

12.1.3 Opcode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

12.1.4 Data Length . . . . . . . . . . . . . . . . . . . . . . . . . . 27

12.1.5 Checksu m . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

12.2 COMMAND SET OVERVI EW . . . . . . . . . . . . . . 28

13.0 Usage Scenar ios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

13.1 SCENARIO 1: POINT-TO-POINT

CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . 32

13.2 SCENARIO 2: AUTOMATIC POINT-TO-POINT

CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . 33

13.3 SCENARIO 3: POINT-TO-MULTIPOINT

CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . 34

14.0 Application Information . . . . . . . . . . . . . . . . . . . . . . . 35

14.1 MATCHING NETWORK . . . . . . . . . . . . . . . . . . . 35

14.2 FILTERED POWER SUPPLY . . . . . . . . . . . . . . . 35

14.3 HOST INTERFACE . . . . . . . . . . . . . . . . . . . . . . 35

14.4 CLOCK INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . 35

14.5 SCHEMATIC AND LAYOUT EXAMPLES . . . . . 35

15.0 Referen c e design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

16.0 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

17.0 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . 42

18.0 Physical Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Obsolete

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LMX9820A

4.0 Connection Diagram

Figure 1. Connection Diagram

NC NC NC NC NC NC NC PI1_ NC Tx_rx_ CCB_ BBCLK PI2_TP12

NC RF GND RF GND RF GND RF GND RF GND RF GND Clk- Clk+ AAI_srd Env1 AAI_std 32kHz_CLKI

NC RF GND RF GND RF GND RF GND RF GND RF GND Tx_rx_ Uart_rx Uart_rts# AAI_sfs AAI_sclk 32kHz_CLKO

NC RF GND RF GND RF GND RF GND RF GND RF GND CC B_data Uart_tx Uart_cts# Reset_ Dig_gnd_1 NC

NC RF GND RF GND RF GND RF GND RF GND RF GND Lstat_0 Env0 J_rdy USB_D+ USB_D- NC

NC RF GND RF GND RF GND RF GND RF GND RF GND Lstat_1 Host_wu J_tdi J_tdo USB_VCC PH3_TP9

NC RF GND RF GND RF GND RF GND RF GND NC Reset_b# J_tms J_tck Dig_gnd_2 USB_Gnd PH2_TP8

NC VCC TX_ NC RF GND RF GND RF GND RF_inout RF GND RF GND RF GND IOVCC ISEL2

NC VDD_ANA_OUT VDD_DIG_PWR_D#

VDD_DIG_OUT

NC NC NC NC NC NC CCB_ ISEL1

12345678910111213

RF_CE_TP11 synch Clock

data

5100#

Switch_P

latch

X-Ray (Top View)

Table 1. Ordering Information

Order Number Spec Shipment Method

LMX9820ASM Tape & Reel 153 pcs

LMX9820ASMX Tape & Reel 1000 pcs

LMX9820ASM NOPB Tape & Reel 153 pcs

LMX9820ASMX NOPB Tape & Reel 1000 pcs

Obsolete

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LMX9820A

5.0 Pad Descriptions

Table 2. System Interface Signals

Pad Name Pad

Location Direction Description

Clk- B8 Input Xtal g or Negative Clock Input. Typically connected along with

XTAL_D to an external surface-mount AT-cut crystal. Leave not con-

nected in case Clk+ is connected to external crystal oscillator.

Clk+ B9 Input Xtal d or Positive Clock Input. Typically connected along with

XTAL_G t o an ext ernal sur face-moun t AT-cu t crystal . Can als o be co n-

figured as a frequency input when using an external crystal oscillator.

When co nfigure d as a freque ncy i nput, ty pica lly c onnec ted to an ext er-

nal Temperature Compensated Crystal Oscillator (TCXO) through an

Alternating Current (AC) coupling capacitor.

32kHz_CLKI B13 Input 32 kHz Clock input. If not used connect to ground.

32kHz_CLKO C13 Output 32 kHz Clock Output. If not used then treat as no connect.

RF_inout H8 Input/Output RF Antenna Port. 50Ω nomina l impedance . Typically c onnected to an

antenna through a 6.8 pF capacitor.

ISEL2 H13 Input Module Interface Select Input Bit 1

ISEL1 J13 Input Module Interface Select Input Bit 0

Table 3. USB Interface Signals (not supported by LMX9820A firmware)

Pad Name Pad

Location Direction Description

USB_VCC F12 Input USB Transceiver Power Supply + 1

USB_D+ E11 Input/Output USB Data Positive 1

USB_D- E12 Input/Output USB Data Negative 1

USB_Gnd G12 Input USB Transceiver Ground. Connect to GND.

1. Tr eat as no con ne ct. Pad requ ired for mech anical stab ili ty.

Table 4. UART Interface Signals

Pad Name Pad

Location Direction Description

Uart_tx D9 Output UART Host Control Interface Transport, Transmit Data

Uart_rx C9 Input UART Host Control Interface Transport, Receive Data

Uart_rts# C10 Output UART Host Control Interface Transport, Request to Send 1

Uart_cts# D10 Input UART Host Control Interface Transport, Clear to Send 2

1. Treat as no connect if not used. Pad required for mechanical stability.

2. Connect GND if not used.

Table 5. Auxiliary Ports Interface Signals

Pad Name Pad

Location Direction Description

IOVCC H12 Input 2.85V to 3.6V Logic Threshold Program Input.

Obsolete

www.national.com 6

LMX9820A

5.0 Pad Descriptions (Continued)

Reset_b# G8 Input

Re set for Sm art Ra dio

. Connect to Reset_5100.

Reset_5100# D11 Input

Re set for Baseban d proces sor.

Low activ e, either con nect to ho st or

use pull-up with max. 1K

Ω

resistor .

Lstat_0 E8 Output Link Status Bit 0

Lstat_1 F8 Output Link Status Bit 1

Host_wu F9 Output Host Wakeup

Env0 E9 Input Module Operating Environment Bit 0

Env1 B11 Input Module Operating Environment Bit 1

TX_Switch_P H3 Output Transceiver Status. 0 = Receive; 1 = Transmit.

Table 6. Audio Port Interface Signals

Pad Name Pad

Location Direction Description

AAI_srd B10 Input Advanced Audio Interface Receive Data Input 1

AAI_std B12 Output Advanced Audio Interface Transmit Data Output 1

AAI_sfs C11 Input/Output Advanced Audio Interface Frame Synchronization 1

AAI_sclk C12 Input/Output Advanced Audio Interface Clock 1

1. Treat as no connect if not used. Pad required for mechanical stability.

Table 7. Test Interface Signals

Pad Name Pad

Location Direction Description

J_rdy E10 Output JTAG Ready 1

J_tdi F10 Input JTAG Test Data 1

J_tdo F11 Input/Output JTAG Test Data 1

J_tms G9 Input/Output JTAG Test Mode Select 1

J_tck G10 Input JTAG Te st Clock 1

PI1_RFCE_TP11

A8 Test Pin Module Test Point 1

PI2_TP12 A13 Test Pin Module Test Point 1

Tx_rx_data C8 Test Pin Module Test Point 1

Tx_rx_synch A10 Test Pin Module Test Point 1

CCB_Clock A11 Test Pin Module Test Point 1

CCB_data D8 Test Pin Module Test Point 1

CCB_l atch J12 Test Pin Module Test Point 1

BBCLK A12 Test Pin Module Test Point 1

PH3_TP9 F13 Test Pin Module Test Point 1

PH2_TP8 G13 Test Pin Module Test Point 1

1. Tr eat as no con ne ct. Pad requ ired for mech anical stab ili ty.

Table 5. Auxiliary Ports Interface Signals (Continued)

Pad Name Pad

Location Direction Description

Obsolete

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LMX9820A

5.0 Pad Descriptions (Continued)

Table 8. Power, Ground, and No Connect Signals

Pad Name Pad

Location Direction Description

NC A1, A2, A3, A4, A5,

A6, A7, A9, B1 , C1,

D1, D13, E1, E13,

F1, G1, G7, H1, J1,

J3, J6, J7, J9, J10,

J11

No Connect No Connect. Pad required for mechanical stability.

RF GND 1B2, B3, B4, B5, B6,

B7, C2, C3, C4, C5,

C6, C7, D2, D3, D4,

D5, D6, D7, E2, E3,

E4, E5, E6, E7, F2,

F3, F4, F5, F6, F7,

G2, G3, G4, G5,

G6, H4, H5, H6, H7,

H9, H10, H11

Input Radio System Ground. Must be connected to RF

Ground plane. Thermal relief required for proper solder-

ing.

Dig_gnd_1 1D12 Input Dig ital Ground

Dig_gnd_2 1G11 Input Digital Ground

VCC H2 Input 2.85V to 3.6V Input for Internal Power Supply Regula-

tors

VDD_ANA_OUT J2 Output Voltage Regulator Output/Power Supply for Analog

Circuitry. If not used, place pad and do not connect to

VCC or Ground.

VDD_DIG_OUT J5 Output Voltage Regulator Output/Power Supply for Digital

Circuitry. If not used, place pad and do not connect to

VCC or Ground.

VDD_DIG_PWR_D# J4 Input Power Down for the Internal Power Supply Regulator

for the Digital Circuitry . Place pad and do not co nnect to

VCC or Ground.

1. Connect RF GND, Dig_gnd_1, and Dig_gnd_2 to a single ground plane.

Obsolete

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LMX9820A

6.0 Elect rica l Speci fications

6.1 GENERAL SPECIFICATIONS

Absolute Maximum Ratings (see Table 9) indicate limits

beyond which damage to the device may occur. Operating

Ratings (see Table 10) indicate conditions for which the

device is intended to be functional.

This dev ic e is a hi gh performanc e R F in teg r ate d ci rcu it an d

is ESD sensitive. Handling and assembly of this device

should be performed at ESD free workstations.

The following conditions apply unless otherwise stated in

the tables below:

•TA = -40°C to +85°C

•VCC = 3.3V, IOVCC = 3.3V

•RF system performance specifications are guaranteed

on National Semiconductor Austin Board rev1.0b refer-

ence design platform.

Table 9. Absolute Maximum Ratings

Symbol Parameter Min Max Unit

VCC Core Logic Power Supply Voltage -0.3 4.0 V

IOVCC I/O Power Supply Voltage -0.3 4.0 V

USB_VCC1USB Power Supply Voltage -0.5 3.63 V

VIVoltage on any pad with GND = 0V -0.5 3.6 V

PinRF RF Input Power +15 dBm

TSStorage Temperature Range -65 +125 oC

TLLead Temperature (solder 4 sec) +235 oC

ESD-HBM ESD, Human Body Model 2000 2V

ESD-MM ESD, Machine Model 200 V

ESD-CDM ESD, Charged Device Model 1000 3V

1. USB Interface not supported by LMX9820A firmware. Treat as no connect. Pad required for mechanical stability.

2. Antenna pin passes 1500V HBM.

3. BRCLK(A12) pin passes 500V CDM.

Table 10. Recommended Operating Conditions1

Symbol Parameter Min Typ2Max Unit

VCC3Module Power Supply Voltage 2.85 3.3 3. 6 V

IOVCC4I/O Power Supply Voltage 2.85 3.3 3.6 V

tRModule Pow er Supp ly Ris e Time 50 ms

TOOperating Temperature Range -40 +85 °C

HUMOP Humidity (operating, across operating

temperature range) 10 90 %

HUMNONOP Humidity (non -operating , 38.7oC web bulb

temperature) 595%

1. Maximum voltage difference allowed between VCC and IOVCC is 500 mV.

2. Typical operating conditions are VCC = 3.3V, IOVCC = 3.3V operating voltage and 25°C ambient temperature.

3. VCC internally regulated to VDD_ANA (see Table 11)

4. IOVCC internally regulated to VDD_DIG (see Table 11)

Obsolete

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LMX9820A

6.0 Electrical Specifications (Continued)

Note: The vol tage re gulato rs are op timi zed fo r the in ternal

operation of the LMX9820A. Because any noise coupled

into these supplies can have influence on the radio perfor-

mance, it is highly recommended to have no additional

load on their outputs.

Table 11. Power Supply Electrical Specifications (Analog and Digital LDOs)

Symbol Parameter Min Typ1Max Unit

VDD_ANA_OUT2Analog Voltage Output Range 2.8 V

VDD_DIG_OUT3Digital Voltage Output Range 2.5 V

1. Typical operating conditions are VCC = 3.3V, IOVCC = 3.3V operating voltage and 25°C ambient temperature. Values

reflect voltages of internally generated, regulated voltages VDD_ANA and VDD_DIG

2. Output of internally generated regulated voltage VDD_ANA

3. Output of internally generated regulated voltage VDD_DIG

Table 12. Power Supply Requirements1

Symbol Parameter Min Typ2Max Unit

ICC-TX Power supply current for continuous transmit 68 mA

ICC-RX Power supply current for continuous receive 62 mA

ICC-Inq Inquiry 31 mA

IRXSL Receive Data in SPP Link, slave 3,423 mA

IRXM Receive Data in SPP Link, master 3,4 18 mA

IHV3 Active HV3 SCO Audio Link 22 mA

ISnM Sniff Mode, sniff interval 1 second 38mA

ISC-TLDIS Scanning, no active link, TL disabled 3,5 500 µA

IIdle Idle, scanning disabled, TL disabled 3,5 150 µA

1. Pow er supply requirements bas ed on Class II output power.

2. VCC = 3.3V, IOVCC = 3.3V, Ambient Temperature = +25°C.

3. Average values.

4. Based on UART Baudrate 115.2kbit/s.

5. TL: Transport Layer

Obsolete

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LMX9820A

6.0 Electrical Specifications (Continued)

6.2 DC CHARACTERISTICS

Table 13. Digital DC Characteristics

Symbol Parameter Condition Min Max Units

VCC1Core Logic Supply Voltage 2.85 3.6 V

IOVCC2IO Supply Voltage 2.85 3.6 V

VIH Logical 1 Input Voltage 0.7 x

VDD_ANA VDD_ANA +

0.5 V

VIL Logical 0 Input Voltage -0.5 0.2 x

VDD_ANA V

VHYS Hysteresis Loop Width30.1 x

VDD_ANA V

IOH Logical 1 Output Current VDD_ANA = 2.8V -1.6 mA

IOL Logical 0 Output Current VDD_ANA = 2.8V 1.6 mA

IOHW Weak Pull-up Current VDD_ANA = 2.8V -10 µA

IIH High-level Input Current VIH = VDD_ANA = 2.8V - 10 10 µA

IIL Low-level Input Current VIL = 0 - 10 10 µA

ILHigh Impedance Input Leakage

Current 0V ≤ VIN ≤ VDD_ANA -2.0 2.0 µA

IO(Off) Output Leakage Current (I/O pins in

input mode) 0V ≤ VOUT ≤ VDD_DIG -2.0 2.0 µA

1. VCC internally regulated to VDD_ANA (see Table 11)

2. IOVCC internally regulated to VDD_DIG (see Table 11)

3. Guaranteed by design.

Obsolete

11 www.national.com

LMX9820A

6.0 Electrical Specifications (Continued)

6.3 RF PERFORMANCE CHARACTERISTICS

In the performance characteristics tables the following

applies:

•All tests performed are based on Bluetooth Test Specifi-

cation rev 0.92.

•All tests are me as ure d at ante nn a po rt unless othe rwis e

specified

•TA = -40°C to +85°C

•VCC = 3.3V, IOVCC = 3.3V unless otherwise specified

RF system performance specifications are guaranteed on

National Semiconductor Austin Board rev1.0b reference

design pla tform.

Table 14. Receiver Performance Characteristics

Symbol Parameter Condition Min Typ1Max Unit

RXsense 2Receive Sensitivity BER < 0.001 2.402 GHz -81 -77 dBm

2.441 GHz -81 -77 dBm

2.480 GHz -81 -77 dBm

PinRF Maximum Input Level -10 0 dBm

C/IACI3Carrier to Interferer Ratio in

the Presence of Adjacent

Channel Interferer

∆FACI = + 1 MHz,

PinRF = -60 dBm,

BER < 0.001

-1 dB

∆FACI = + 2 MHz.

PinRF = -60 dBm,

BER < 0.001

-37 dB

∆FACI = + 3 MHz,

PinRF = -67 dBm,

BER < 0.001

-47 dB

C/IIMAGE -1MHz Carrier to Interferer Ratio in

the Presenc e of Image -1MHz

Interferer

∆f = -3 MHz,

PinRF = -67 dBm,

BER < 0.001

-32 dB

IMP3,4 Intermodul ati on Perfo r ma nce F1= + 3 MHz,

F2= + 6 MHz,

PinRF = -64 dBm

-38 -36 dBm

RSSI RSSI Dynam ic Range at LNA

Input -72 -52 dBm

ZRFIN Input Impedance of RF Port

(RF_inout) Single input imp eda nc e

Fin = 2.45 GH z 50 Ω

Return Loss3Return Loss -8 dB

OOB3Out Of Band Blocking

Performance PinRF = -10 dBm,

30 MHz < FCWI < 2 GHz,

BER < 0.001

-10 dBm

PinRF = -27 dBm,

2000 MHz < FCWI < 2399 MHz,

BER < 0.001

-27 dBm

PinRF = -27 dBm,

2498 MHz < FCWI < 3000 MHz,

BER < 0.001

-27 dBm

PinRF = -10 dBm,

3000 MHz < FCWI < 12.75 GHz,

BER < 0.001

-10 dBm

1. Typical operating conditions are at 2.85V operating voltage and 25°C ambient temperature.

2. The receiver sensitivity is measured at the device interface.

3. Not tested in production.

4. The f0 = -64 dBm Bluetooth modulated signal, f1 = -39 dbm sine wave, f2 = -39 dBm Bluetooth modulated signal,

f0 = 2f1 - f2, and |f2 - f1| = n x 1 MHz, in which n is 3, 4, or 5. For the typical case, n = 3.

Obsolete

www.national.com 12

LMX9820A

6.0 Electrical Specifications (Continued)

Table 15. Transmitter Performance Characteristics

Symbol Parameter Condition Min Typ1Max Unit

POUTRF 2Transmit Output Power 2.402 GHz -3 +1 +4 dBm

2.441 GHz -3 +1 +4 dBm

2.480 GHz -3 +1 +4 dBm

Power Density 5Power Density -4 1 2 dBm

MOD ∆F1AVG Modulation Characteristics Data = 00001111 140 165 175 kHz

MOD ∆F2MAX 3Modulation Characteristics Data = 10101010 115 125 kHz

∆F2AVG/∆F1AVG 4Modulation Characteristics 0.8

20 dB Bandwidth 1000 kHz

ACP 5Adjacent Channel Power

(In-band Spurious) | M - N | = 2 -48 -20 dBm

| M - N | > 3-51-40dBm

POUT2*fo 6PA 2nd Harmonic

Suppression Maxi mum gain setti ng:

f0 = 2402 MHz,

Pout = 4804 MHz

-30 dBm

POUT3*fo 5PA 3rd Harmoni c

Suppression Maxi mum gain setti ng:

f0 = 2402 MHz,

Pout = 7206 MHz

-32 dBm

ZRFOUT RF Output Impedance/Input

Impedance of RF Port

(RF_inout)

Pout @ 2.5 GHz 50 Ω

Return Loss 5Return Loss -14 dB

1. Typical operating conditions are at VCC = 3.3V, IOVCC = 3.3V operating voltage and 25°C ambient temperature.

2. The output power is m easure at the device interface.

3. ∆F2max > 115 kHz for at least 99.9% of all ∆f2max.

4. Modulation index set between 0.28 and 0.35.

5. Not tested in production.

6. Out-of-Band spurs only exist at 2nd and 3rd harmonics of the CW frequency for each channel.

Table 16. Synthesizer Performance Characteristics

Symbol Parameter Condition Min Typ Max Unit

fVCO VCO Frequency Range 5000 MHz

tLOCK Lock Time f0 + 20 kHz 120 µs

∆f0offset 1,2 Initial Carrier Frequency Tolerance During preamble -75 0 75 kHz

∆f0drift 2,3 Initial Carrier Frequency Drift DH1 data packet -25 0 25 kHz

DH3 data packet -40 0 40 kHz

DH5 data packet -40 0 40 kHz

Drift Rate -20 0 20 kHz/50µs

tD-Tx Transmitter Delay Time From Tx data to antenna 4 µs

1. Frequency accuracy is depende nt on cryst al oscillator chosen. The crystal must have a cumulativ e accuracy of <20 p pm

to meet Bluetooth specifications.

2. Not tested in production.

3. Frequency accuracy is dependent on crystal oscillator chosen. The crystal must have a cumulative accuracy of <20 ppm

to meet Bluetooth specifications.

Obsolete

13 www.national.com

LMX9820A

6.0 Electrical Specifications (Continued)

6.4 PERFORMANCE DATA (TYPICAL)

Figure 2. Modulation

Figure 3. Transmit Spectrum

Figure 4. Corresponding Eye Diagra m

Figure 5. Synthesizer Phase No ise

Figure 6. Front-End Bandpass Filter Response

Filter Insertion Loss

-4

-2

-6

-8

-10 2.8E+0

2.7E+092.2E+092.1E+09 2.3E+09 2.4E+09 2.5E+09 2.6E+09

Frequency (Hz)

Obsolete

www.national.com 14

LMX9820A

6.0 Electrical Specifications (Continued)

Figure 7. TX and RX Pin 50Ω Impedance Characteristics

1.00

0.50

2.00

1.00

0.50

0.00

S(1.1)

-0.50

-1.00

-2.00

freq(2.400 GHz to 2.500 GHz)

freq = 2.500 GHz

S(1.1) = 0.035/175.614

impedance = Z0* (0.933 + j0.005)

freq = 2.402 GHz

S(1.1) = 0.093/-29.733

impedance = Z0* (1.170 - j0.109)

Figure 8. Transceiver Return Loss

Obsolete

15 www.national.com

LMX9820A

7.0 Functional Description

7.1 BASEBAND AND LINK MANAGEMENT

PROCESSORS

Baseband and Lower Link control functions are imple-

mented using a combination of National Semiconductor’s

CompactRISC 16-bit processor and the Bluetooth Lower

Link Controller. These processors operate from integrated

Flash memory and RAM and execute on-board firmware

implementing all Bluetooth functions.

7.1.1 Bluetooth Lower Link Controller

The integrated Bluetooth Lower Link Controller (LLC) com-

plies with the Bluetooth Specification version 1.1 and

implem en t s the fol low i ng func tio ns :

•Support for 1, 3, and 5 slot packet types

•79-channel hop frequency generation circuitry

•Fast frequency hopping at 1600 hops per second

•Power management control

•Access code correlation and slot timing recovery

7.1.2 Bluetooth Upper Layer Stack

The integrated upper layer stack is prequalified and

includes the following protocol layers:

•L2CAP

•RFComm

•SDP

7.1.3 Profile Support

The on-chip application of the LMX9820A allows full stand-

alone operation, without any Bluetooth protocol layer nec-

essary outside the module. It supports the Generic Access

Profile (GAP), the Service Discovery Application Profile

(SDAP), and the Serial Port Profile (SPP).

The on-ch ip profiles ca n be us ed a s in terf aces to add iti ona l

profiles executed on the host. The LMX9820A includes a

configurable service database to answer requests with the

profiles supported.

7.1.4 Application with Command Interface

The mod ule support s automatic s lav e o pera tion elim in atin g

the need for an external control unit. The implemented

transparent option enables the chip to handle incoming

data raw, without the need for packaging in a special for-

mat. The device uses a fixed pin to block unallowed con-

nections.

Acting as master, the application offers a simple but versa-

tile command interface for standard Bluetooth operations

such as inquiry, s ervic e discovery, and serial port connec-

tion. The fi rmwa re su pports up to th ree slave s. Defa ul t Lin k

Policy settings and a specific master mode allow optimized

configuration for the application specific requirements. See

also Section "Integrated Firmware" on page 24.

7.2 MEMORY

The LMX9820A includes 256KB of programmable Flash

memory that can be used for code and constant data. It

allows single-cycle read access from the CPU. In addition

to storing all algorithms and firmware, the on-board Flash

also contains the IEEE 802 compliant Media Access Con-

troller (MAC) address (BDADDR). The firmware and the

BDADDR are programmed by National Semiconductor or

can be programmed by the customer either before assem-

bly into the host system or in-system. Module firmware can

also be updated during manufacturing or in-system using

the ISP capabilities of the LMX9820A. The LMX9820A

firmware uses the internal RAM for buffers and program

variables.

7.3 CONTROL AND TRANSPORT PORT

The LMX9820A provides one Universal Asynchronous

Receive r Transmitt er (UART). It support s 8-bi t d at a form ats

with or without parity and one or two stop bits. The baud

rate is generated by hardware that is programmed at boot

time. Alternatively, the speed and configuration settings

can be read out of internal memory settings. The UART

can operate at baud rates of 2.4k, 4.8k, 7.2k, 9.6k, 19.2k,

38.4k, 57.6k, 115.2k, 230.4k, 460.8k and 921.6k. It imple-

ments flow control logic (RTS, CTS) to provide hardware

handshaking capability. The UART offers wakeup from the

low-power modes through the multi-input wakeup module.

UART logic thresholds are set via the IOVCC pin.

7.4 AUXILIARY PORTS

7.4.1 Reset_5100 and Reset_b#

Reset_5100 and Reset_b# are active low reset inputs for

the baseband controller and digital smart radio portions of

the LMX9820A, respectively. These pins are normally tied

together and are connected to the host system so that the

host can initialize the LMX9820A by asserting the reset

inputs. Upon de-assertion, the status of the module operat-

ing environment (Env) pads are sampled and the

LMX9820A enters the corresponding operational mode.

7.4.2 Operating Environment Pads (Env0 and Env1)

The module provides two operating environments (see

Table 17) select ed by the states on the Env inputs sam ple d

at reset.

The ISP mode allows end-of-line or field programming of

the LMX9820A Flash memory by starting the baseband

controller from the boot block of memory.

Table 17. Operating Environments

Operating Environment Env1

(Pad B11) Env0

(Pad E9)

ISP Mode 1 0

Run (Normal) Mode (Default) 1 1

Obsolete

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LMX9820A

7.0 Functional Description (Continued)

7.4.3 Interface Select Inputs (ISEL1, ISEL2)

The inter face selection pads are used for settin g the UART

speed and settings. If ISEL1 and ISEL2 are unconnected,

they are pulled high by weak internal pullups, which select

a default baudrate of 921.6k baud. The settings for Stop-

bits, Startbit, and Parity are stored as internal non-volatile

storage (NVS) parameters. If a baud rate different from the

values li st ed i n Table 18 is needed, I SEL 1 and ISEL2 m us t

be pulled low. This forces the device to read the UART

speed from the parameter table in NVS. The default baud

rate value programmed in NVS is 9.6k baud, however the

device firmware can be modified to support other values.

The defa ult con fig uration in NVS is 1 Stopbit, 1 Sta rtbi t, and

No parity. Table 18 shows the ISEL1 and ISEL2 selection

settings.

7.4.4 Module and LInk Status Outputs

The LMX9820A provides signals that the host can use to

determine the real-time status of the radio link. The

TX_Switch_P signal (pad H3) is a real-time indication of

the current configuration (direction) of the transceiver. The

link status lines (Lstat_0 and Lstat_1, pads E8 and F8,

respectively) are GPIO lines controlled by the LMX9820A

firmware. The Host Wakeup line (Host_wu, pad F9) is

implemented using GPIO and firmware. It is used to bring

the host processor out of Sleep mode when link activity

calls for host processing. Host_wu can also be used by the

host to check if link activity is present. If Host_wu is active,

then link activity is present and the host loses network

awareness if the operating system continues to allow the

host processor to enter Sleep mode. Table 19 presents the

definitions of the various module and link status outputs.

7.5 AUDIO PORT

Advanced Audio Interface

The Advanced Audio Interface (AAI) is an advanced ver-

sion of the Synchronous Serial Interface (SSI) that pro-

vides a full-duplex communications port to a variety of

industry-standard 13/14/15/16-bit linear or 8-bit log PCM

codecs, DSPs, and other serial audio devices.

The LMX9820A allows the support for one codec. The

firmware selects the desired audio path and interface con-

figuration by a parameter stored in NVS. The audio path

options include the Motorola MC145483 codec, OKI

MSM7717 codecs, and the PCM slave through the AAI, or

no audio.

Table 20 summariz es the a udi o p a th s ele ction and th e co n-

figuration of the audio interface at the specific mode.

Table 18. UART Speed Selection

ISEL1

(Pad J13) ISEL2

(Pad H13) Interface

Speed (baud) UART

Settings

1 1 921.6k From NVS

0 1 115.2k From NVS

1 0 9.6k 1Stop, 1Start,

No Parity

0 0 Check NVS From NVS

Table 19. Module/Link Status Definitions

Lstat_0

(Pad E8)

Lstat_1

(Pad F8)

TX_Switch_P

(Pad H3)

Host_wu

(Pad F9)

Mode

x 1 x x At least 1 SPP link es-

tablished

x 0 x x No active SPP link

x x 1 x Transceiver = Transmit

x x 0 x Transceiver = Receive

x x x 0 Host can Sleep

x x x 1 Wakeup host/host

should not Sleep

Table 20. Audio Path Configuration

Audio Path Format AAI Bit Clock AAI Frame Clock AAI Frame Sync

Pulse Length

Motorola MC145483113-bit linear 480 kHz 8 kHz 13 bits

OKI MSM7717 8-bit log PCM

(A-law only) 120 kHz 8 kHz 14 bits

PCM slave28/16 bits 128 - 1024 KHz 8 kHz 8/16 bits

1. Due to internal clock divider limitations, the optimum of 512 kHz, 8 kHz cannot be reached. The values are set to the

best possible values. The clock mismatch does not result in any discernible loss in audio quality.

2. In PCM slave mode, parameters are stored in NVS. Bit clock and frame clock must be generated by the host interface.

Obsolete

17 www.national.com

LMX9820A

8.0 Digital Smart Radio

8.1 FUNCTIONAL DESCRIPTION

The integrated Digital Smart Radio uses a heterodyne re-

ceiver architecture with a low intermediate frequency (2

MHz), such tha t the intermed iate frequency filte rs can be in-

tegrated on-chip. The receiver consists of a low-noise am-

plifier (LNA) followed by two mixers. The intermediate

frequency signal processing blocks consist of a poly-phase

bandpass filter (BPF), two hard limiters (LIM), a frequency

discriminator (DET), and a post-detection filter (PDF). The

received signal level is detected by a received signal

strength indicator (RSSI).

The received frequency equals the local oscillator frequen-

cy (fLO) plus the intermediate frequency (fIF):

fRF = fLO + fIF (supradyne).

The radio includes a synthesizer consisting of a phase de-

tector, a charge pump, an (off-chip) loop filter, an RF fre-

quency divider, and a voltage-controlled oscillator (VCO).

The transmitter uses IQ-modulation with bit-stream data

that is gaussian filtered. Other blocks included in the trans-

mitter are a VCO buffer and a power amplifier (PA).

8.2 RECEIVER FRONT END

The receiver front end consists of a low-noise amplifier

(LNA) followed by two mixers and two low-pass filters for the

I- and Q-chann els .

The intermediate frequency (IF) part of the receiver front

end consists of two IF amplifiers that receive input signals

from the m ixers , de li veri ng balan ce d I- an d Q -s ign als t o th e

poly-phase bandpass filter. The poly-phase bandpass filter

is directl y fol lowe d by two hard limiters that togeth er gen er-

ate an AD-converted RSSI signal.

8.2.1 Poly-Phase Bandpass Filter

The purpose of the IF bandpass filter is to reject noise and

spurious (mainly adjacent channel) interference that would

otherwise enter the hard-limiting stage. In addition, it han-

dles image rejection.

The bandpass filter uses both the I- and Q-signals from the

mixers . The out-o f-band su ppres sion sh ould be higher tha n

40 dB ( f < 1 MHz, f > 3 MH z). The ban dpass filt er is tun ed

over process spread and temperature variations by the au-

totuner circuitry. A 5th-order Butterworth filter is used.

8.2.2 Har d Limiter a nd RSSI

The I- and Q-outputs of the bandpass filter are each fol-

lowed by a hard-limiter. The hard-limiter has its own refer-

ence current. The RSSI (Received Signal Strength

Indicator) reports the level of the RF input signal.

The RSSI is generated by piece-wise linear approximation

of the level of the RF signal. The RSSI has a mV/dB scale,

and an analog-to-digital converter for processing by the

baseba nd circuit. The input R F power is conv erted to a 5-bit

value. T he RSSI value i s then propo rtional to th e input pow -

er (in dBm).

The digital output from the ADC is sampled on the BPK-

TCTL signal low-to-high transition.

8.3 RECEIVER BACK END

The hard limiters are followed by two frequency discrimina-

tors. The I-frequency discriminator uses the 90o phase-

shifted signal from the Q-path, while the Q-discriminator

uses the 90o phase-shifted signal from the I-path. A poly-

phase bandpass filter performs the required phase shifting.

The output signals of the I- and Q-discriminator are sub-

tracted a nd filtered by a low-pass filter. An equali ze r is ad d-

ed to improve the eye-pattern for 101010 patterns.

Aft er equalizat ion, a dynamic AFC (automati c frequency off-

set compensation) circuit and slicer extract the RX_DATA

from the an alog data p attern. The Eb /No of the demodu lator

is ap proximately 17 dB.

8.3.1 Frequency Discriminator

The frequency discriminator gets its input signals from the

limiter. A defined signal level (independent of the power

supply volta ge) is nee ded to obt ain the input signal. Bo th in-

puts of the frequency discriminator have limiting circuits to

optimize performance. The bandpass filter in the frequency

discriminator is tuned by the autotuning circuitry.

8.3.2 Post-Detection Filter and Equalizer

The output signals of the FM discriminator go through a

post -det ect ion fi lte r fo ll owed by a n equ al ize r. Both th e pos t-

detection filter and equalizer are tuned to the proper fre-

quency by the autotuning circuitry. The post-detection filter

is a low-p as s filte r intende d to suppr ess all rema ining spuri-

ous si gnals , suc h as the s econ d harm onic (4 MHz ) f rom th e

FM detector and noise generated after the limiter.

The post-detection filter also helps for attenuating the first

adjacent channel signal. The equalizer improves the eye-

opening for 101010 patterns. The post-detection filter is a

third-order Butterworth filter.

8.4 AUTOTUNING CIRCUITRY

The autotuning circuitry is used for tuning the bandpass fil-

ter, detector, post-detection fil ter, equalize r, and tr ans mi t fi l-

ters for process and temperature variations. The circuitry

includes offset compensation for the FM detector.

8.5 SYNTHESIZER

The synthesizer consists of a phase-frequency detector, a

charge pump, a low-pass loop filter, a programmable fre-

quency divider, a voltage-controlled oscillator (VCO), a del-

ta-sigma modulator, and a lookup table.

The frequency divider consists of a divide-by-2 circuit (di-

vides the 5 GHz signal from the VCO down to 2.5 GHz), a

divide-by-8-or-9 divider, and a digital modulus control. The

delta-sigma modulator controls the division ratio and also

generates an input channel value to the lookup table.

8.5.1 Phase-Frequency Detect or

The phase-frequency detector is a 5-state phase-detector.

It responds only to transitions, hence phase-error is inde-

pendent of input waveform duty cycle or amplitude varia-

tions. Loop lockup occurs when all the negative transitions

on the inputs, F_REF and F_MOD, coincide. Both outputs

(i.e., Up and Down) then remain high. This is equal to the

zero error mode. The phase-frequency detector input fre-

quency range operates at 12 MHz.

Obsolete

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LMX9820A

8.0 Digital Smart Radio (Continued)

8.6 TRANSMITTER CIRCUITRY

The transmitter consists of ROM tables, two Digital to Ana-

log (DA) converters, two low-pass filters, IQ mixers, and a

power amplifier (PA).

The ROM tables generate a digital IQ signal based on the

transmi t da t a. T he o utp ut o f the R OM t a ble s i s i ns erted in to

IQ-DA converters and filtered through two low-pass filters.

The two s ignal componen t s are m ixed up to 2.5 GHz by the

TX mixers and added together before being inserted into

the transmit PA.

8.6.1 IQ-DA Converters and TX Mixers

The ROM output signals drive an I- and Q-DA converter.

T wo Butterworth low-pass filters filter the DA output signals.

The 6 M Hz clo ck fo r the DA con verters an d the l ogic circu it-

ry around the ROM tables are derived from the autotuner.

The T X mi xe rs m ix the bala nced I- and Q -signals up to 2 . 4-

2.5 GHz. The output signals of the I- and Q-mixers are

summed.

8.7 CRYSTAL REQUIREMENTS

The LMX9820A includes a crystal driver circuit. This circuit

operates with an external crystal and capacitors to form an

oscillator. Figure 9 shows the recommended crystal circuit.

Table 24 on page 22 specifies system clock requirements.

The RF local oscillator and internal digital clocks for the

LMX9820A are derived from the reference clock at the

CLK+ input. This reference may either come from an exter-

nal clock or a dedicated crystal oscillator. The crystal oscil-

lator connections require a crystal and two grounded

capacitors.

It is important to consider board- and design-dependent

capacitance in tuning the crystal circuit. The following

equatio ns allow a close approximat io n of the requ ire d cry s-

tal tuning capacitance, but the actual values will vary with

the capacitive properties of the board. As a result, there is

some fine tuning of the crystal circuit which cannot be cal-

culated, but must be determined experimentally by testing

different values of load capac itance.

Many different crystals can be used with the LMX9820A. A

key requirement from the Bluetooth specification is 20

ppm. Additionally, ESR (Equivalent Series Resistance)

must be carefully considered. LMX9820A can support a

maximum of 230Ω ESR, but it is recommended to stay <

100Ω ESR for best performan ce over vol tag e and tem pera-

ture. See Figure 14 on page 22 for ESR as part of the crys-

tal circuit for more information.

8.7.1 Crystal

The crystal appears inductive near its resonant frequency.

It forms a resonant circuit with its load capacitors. The res-

onant frequency may be trimmed with the crystal load

capacitance.

1. Load Capacitance

For resonance at the correct frequency, the crystal should

be loaded with its specified load capacitance, which is the

value of capacitance used in conjunction with the crystal

unit. Load capacitance is a parameter specified by the

crystal, typically expressed in pF. The crystal circuit shown

in Figure 10 on page 19 is composed of:

— C1 (motional capac it anc e)

— R1 (motional resis tan ce)

— L1 (motional inductance)

— C0 (static or shunt cap ac ita nc e)

The LMX9820A provides some of the load with internal

capacitors Cint. The remainder must come from the exter-

nal capacitors and tuning capacitors labeled Ct1 and Ct2

as shown in Figure 9. Ct1 and Ct2 should have the same

the value for best noise performance.

The LMX9820A has an additional internal capacitance

CTUNE of 2.6 pF. Crystal lo ad cap acit anc e (CL) is calcul ated

as:

CL = Cint + CTUNE + Ct1/Ct2

The CL above does not include the crystal internal self-

capacitance C0 as shown in Figure 10 on page 19, so the

total capacitance is:

Ctotal = CL + C0

Based on the crystal specification and equation:

CL = Cint + CTUNE + Ct1//Ct2

CL = 8pF + 2.6pF + 6pF = 16.6pF

16.6 pF is very close to the TEW crystal requirement of 16

pF load capacitance. With the internal shunt capacitance

Ctotal:

Ctotal = 16.6pF + 5pF = 21.6pF

Figure 9. LMX9820A Crystal Recommended

Circuit

CLK+ CLK-

Ct1 Ct2

Crystal

LMX9820A

Cint

CTUNE

Obsolete

19 www.national.com

LMX9820A

8.0 Digital Smart Radio (Continued)

2. Crystal Pullability

Pullability is another important parameter for a crystal,

which is the change in frequency of a crystal with units of

ppm/pF, either from the natural resonant frequency to a

load resonant frequency or from one load resonant fre-

quency to another. The frequency can be pulled in a paral-

lel resonant circuit by changing the value of load

capacitance. A decrease in load capacitance causes an

increase in frequency, and an increase in load capacitance

causes a decrease in frequency.

3. Frequ enc y Tun ing

Frequency tuning is achieved by adjusting the crystal load

capacitance with external capacitors. It is a Bluetooth

requirement that the frequency is always within 20 ppm.

The crystal network or oscillator must have cumulative

accuracy specifications of 15 ppm to provide margin for

frequency drift with aging and temperature.

Figure 10. Crystal Equivalent Circuit

TEW Crystal

The LMX9820A has been tested with the TEW TAS-4025A

crystal, see Table 21 on page 19 for specification. Because

the int ernal ca pacitance of the cryst al ci rcuit is 8 pF and the

load capacita nce is 16 pF, 12 pF is a go od starting point for

both Ct1 and Ct2. The 2480 MHz RF frequency offset is

then tested. Figure 11 on page 20 shows the RF frequency

of fset tes t resul t s.

Figure 11 on page 20 shows the results are -20 kHz off the

center frequency, which is -1 ppm. The pullability of the

crystal is 2 ppm/pF, so the load capacitance must be

decreased by about 1.0 pF. By changing Ct1 or Ct2 to

10 pF, the total load capacitance is decreased by 1.0 pF.

Figure 12 on page 20 shows the frequency offset test

results. The frequency offset is now zero with Ct1 = 10 pF,

Ct2 = 10 pF.

Reference Table 22 on page 19 for crystal tuning values

used on Austin Development Board with TEW crysta l.

R1 C1 L1

Table 21. TEW TAS-4025A

Specification Value

Package 4.0 x 2.5 x 0.65 mm (4 pads)

Frequency 12.000 MHz

Mode Fundamental

Stability >15 ppm @ -40 to +85°C

CL Load Capacitance 16 pF

ESR 80Ω max.

C0 Shunt Capacitance 5 pF

Drive Lev el 50 ± 10 uV

Pullability 2 ppm/pF min

Storage Temperature -40 to +85°C

Table 22. TEW on Arizona Board

Reference LMX9820A

Ct1 10 pF

Ct2 10 pF

Obsolete

www.national.com 20

LMX9820A

8.0 Digital Smart Radio (Continued)

Figure 11. Frequency Offset with 12 pF/12 pF Capacitors

Figure 12. Frequency Offset with 10 pF/10 pF Capacitors

Obsolete

21 www.national.com

LMX9820A

8.0 Digital Smart Radio (Continued)

8.7.2 TCXO (Temperature Compensated Crystal

Oscillator)

The LMX9820A also can operate with an external TCXO

(Temperature Compensated Crystal Oscillator). The TCXO

signal is directly connected to the CLK+.

1. Input Impedance

The LMX9820A CLK+ pin has in input impedance of 2 pF

capac i tance in paral lel with >400kΩ resistance.

8.7.3 Optional 32 kHz Oscillator

A second osci llator is p rovide d (see Figure 1 3) that i s tune d

to provide optimum performance and low-power consump-

tion while operating with a 32.768 kHz crystal. An external

crystal clock network is required between the 32kHz_CLKI

clock input (pad B13) and the 32kHz_CLKO clock output

(pad C13) signals.The oscillator is built in a Pierce configu-

rati on and uses tw o ext ernal c apaci tors. Table 23 prov ides

the oscillator’s specifications.

In case the 32Khz is placed optionally, it is recommended

to remove C2 and replace C1 with a zero ohm resistor.

Figure 13. 32.7 68 kH z Os cill ator

32kHz_CLKI

32kHz_CLKO

GND

32.768 kHz

Table 23. 32.768 kHz Oscillator Specifications

Symbol Parameter Condition Min Typ Max Unit

VDD Supply Voltage 1.62 1.8 1.98 V

IDDACT Supply Current (Active) 2 µA

f Nominal Output Frequency 32.768 kHz

VPPOSC Oscillating Amplitude 1.8 V

Duty Cycle 40 60 %

Obsolete

www.national.com 22

LMX9820A

8.0 Digital Smart Radio (Continued)

8.7.4 ESR (Equi vale nt Series Resistance)

LMX9820A can operate with a wide range of crystals with

diffe rent E SR ra tings . Refe renc e Tab le 24 on page 22 and

Figure 14 on page 22 fo r more details.

Figure 14. ESR vs. Load Capacitance for the Crystal

8.8 ANTENNA MATCHING AND FRONT-END FIL-

TERING

Figure 15 shows the recommended component layout to

be used between RF output and antenna input. Allows for

versatility in the design such that the match to the antenna

maybe improved and/or the blocking margin increased by

addition of a LC filter. Refer to antenna design application

note rev1.1 for further details

Figure 15. Front End Layout

Table 24. System Clock Requirements

Parameter Min Typ Max Unit

External Reference Clock Frequency 12 MHz MHz

Frequency Tolerance (over full operating temperature and aging) 15 20 ppm

Crystal Serial Resistance 230 Ω

External Refe rence Clock Power Swing , pk to pk 100 200 400 mV

Aging 1 ppm per year

LC filt er

PI Match

To An tenna

Obsolete

23 www.national.com

LMX9820A

9.0 System Power-Up Sequence

The following sequence must be performed to correctly

power-up the LMX9820A:

1. Apply I O VCC and VCC to the LMX9820A.

2. Reset_b# and Reset_5100# of the LMX9820A are driven

high a minimum of 2 ms after the LMX9820A voltage

rails are high. The LMX9820A is the properly reset.

See Table 25 on page 23.

Figure 16. LMX9820A System Power-Up Sequence Timing

BBP_CLOCK

CCB_DATA

Standby Active

TX_RX_DATA

TX_RX_SYNC

High

VCC

LMX9820A in LMX9820A in Normal Mode

Reset_b#

Low

CCB_CLOCK

CCB_LATCH High

Low

Power-Up Mode

LMX9820A

Oscillator

Start-Up

LMX9820A

Initialization LMX9820A

Initialization

IOVCC tPTOR

Low

Reset_5100

Table 25. LMX9820A System Power-up Sequence Timing

Symbol Parameter Condition Min Typ Max Unit

tPTOR Power to Reset VCC and IOVCC at operating

voltage level to valid reset 2ms

Obsolete

www.national.com 24

LMX9820A

10.0 Integrated Firmwa re

The LMX9820A includes the full Bluetooth protocol stack

up to RFComm to support the following profiles:

— GAP (Generic Access Profile)

— SDAP (Servic e Discovery A pplication P rofile)

— SPP (Serial Port Profile)

Figure 17 shows the Bluetooth protocol stack with com-

mand interpreter interface. The command interpreter offers

a number of different commands to support the functional-

ity given by the different profiles. Execution and interface

timing is handl ed by the co ntrol applica tio n.

The chip has an internal data area in Flash and the NVS

parameters can be found in the Software Users Guide.

10.1 FEATURES

10.1.1 Operation Modes

On boot-up, the application configures the module follow-

ing the parameters in the data area.

Automatic Mode

No Default Connecti ons S tored

In Automatic mode the module is connectable and discov-

erable and automatically answers to service requests. The

comma nd i nte rpret er listens to c om ma nds an d li nk s c an b e

set up. The full command list is supported.

If conn ec ted by an other dev ic e, the mo du le sends a n e ve nt

back to the host, where the RFComm port has been con-

nected, and switches to transparent mode.

Default Connection s St ored

If default connections were stored on a previous session,

after the LMX9820A is reset, it will attempt to reconnect to

each device stored within the data Flash three times. The

host will be notified about the success of the link setup via

a link status event.

Command Mode

In Command mode, the LMX9820A does not check the

default connections section within the Data Flash. If con-

nected by another device, it will not switch to transparent

mode and continue to interpret data sent on the UART.

Tran sparent Mode

The LMX9820A supports transparent data communication

from the UART interface to a Bluetooth link.

If activated, the module does not interpret the commands

on the UART which normally are used to configure and

control the mod ule . In th is ca se , the pac ke t s do n ot ne ed to

be formatted as described in Table 27 on page 27. Inst ead,

all data are directly passed through the firmware to the

active Bluetooth link and the remote device.

Transparent mode can only be supported on a point-to-

point connection. To leave Transparent mode, the host

must send a UART_BREAK signal to the module

Force Master Mode

In Force Master mode, the LMX9820A tries to act like an

Access point for multiple connections. In this mode, it will

only accept a link if a master/slave role switch is accepted

by the connecting device. After successful link establish-

ment, the LMX9820A will be master and available for addi-

tional incoming links. On the first incoming link the

LMX9820A may switch to transparent mode, depending on

the setting for automatic or command mode. Additional

link s wil l onl y be po ssi ble i f th e dev ice is not in tra nspar ent

mode.

10.1.2 Default Connections

The LMX98 20A suppo rts t he stora ge of up to 3 defa ult con-

nections within its NVS. Those connections can either be

connected after reset or on demand using a specific com-

mand.

10.1.3 Event Filter

The LMX9820A uses events or indicators to notify the host

about successful commands or changes on the Bluetooth

interface. Depending on the application, the LMX9820A

can be configured. The following levels are defined:

•No Events—the LMX9820A is not reporting any events.

Optimized for passive cable replacement solutions.

•Standard LMX9820A Events—only necessary events

will be reported.

•All Events —addit ional t o the sta ndard al l chan ges at th e

physical layer will be reported.

10.1.4 Default Link Policy

Each Bluetooth link can be configured to support mas-

ter/slave role switch, Hold mode, Sniff mode, and Park

mode. The default link policy defines the standard setting

for incoming and outgoing connections.

10.1.5 Audio Support

The LMX9820A offers commands to establish and release

synchronous connections (SCO) to support Headset or

Handsfree applications. The firmware supports one active

link with all available package types (HV1, HV2, HV3), for

routing audio data between the Bluetooth link and the

advanced audio interface. To provide the analog data inter-

face, an external audio codec is required. The LMX9820A

includes a list of codecs which can be used

10.1.6 Default Sniff operation

To support optimized power consumption, the LMX9820A

offers the ability to enable Sniff mode during link establish-

ment on i nco ming lin ks or on defa ult con ne cti on s etu p. Th e

default parameters for the Sniff mode are stored in NVS.

Figure 17. LMX9820A Software Implementation

Command Interpreter

Control Application

SPP

GAP

SDAP

RFComm

L2CAP

Link Manager

Baseband

SDP

Obsolete

25 www.national.com

LMX9820A

11.0 Power Reduction

The LMX9820A supports several low-power modes to

reduce p ow er i n di f ferent operating s itu atio ns . The mo dular

structure of the LMX9820A allows the firmware to power

down unused modules.

The low-power modes have influence on:

•UART transport layer—enables or disables the inter-

face.

•Bluetooth Baseband activity—firmware disables LLC

and radio, if possible.

11.1 LOW POWER MODES

The following LMX9820A power modes, which depend on

the activity level of the UART transport layer and the radio

acti vity, are de fined:

The activ ity of th e Blueto oth radi o mainl y depe nds on a ppli-

cation requirements and is controlled by standard Blue-

tooth operations such as inquiry/page scanning or an

active lin k. A rem ot e dev ic e e st a bli sh ing or di sc onn ec tin g a

link may also indirectly change the activity level of the

radio.

The UART transport layer by default is enabled on device

power up . The “D isable Transport Layer” comma nd is use d

to disable the transport layer. Therefore, only the host-side

command interface can disable the transport layer.

Enabling the transport layer is controlled by the hardware

wake-up signalling. This can be initiated from either the

host or an LMX9820A input. See also “LMX9820A Soft-

ware Users Guide” for detailed information on timing and

implem en t ati on requ irem ents .

Figure 18. Transition between different Hardware Power Modes

Table 26. Power Mode Activity

Power

Mode UART Bluetooth

Radio Reference

Clock

PM0 Off Off None

PM1 On Off 12 MHz

PM2 Off Scanning 12 MHz /

32kHz1

1. 12MHz used if 32khz not present

PM3 O n Scanning 12 MHz

PM4 Of f SPP Link 12 MHz

PM5 On SPP Link 12 MHz

No radio activity Page / In quiry Scanning Active Link(s)

Bluetooth Radio Activity

UART Disabled

Wake-up En abled

UART Enabled

Wake-up Disabled

All Links Released

PM0

PM1 PM3 PM5

PM4

PM2

Link Established

All Links released

Link Established

All Links released

Incoming Link

All Links released

TL Enabled

Disable TL Disable TL Disable TL

TL Enabled TL Enabled

Scanning Enabled

Scanning Disabled

Obsolete

www.national.com 26

LMX9820A

11.0 Power Reduction (Continued)

11.2 UART TRANSPORT LAYER CONTROL

11.2.1 Hardware Wake-Up Functionality

In some circumstances, the host may switch off the trans-

port layer of the LMX9820A to reduce power consumption.

The host and LMX9820A then may shut down their UART

interfaces.

To simplify the system design, the UART interface is con-

figured for hardware wake-up functionality. For a detailed

timing and command functionality, see the “LMX9820A

Software Users Guide”.

The interface bet w een the h os t and LM X982 0A is s how n in

Figure 19.

11.2.2 Disabling the UART Transport Layer

The ho st can disabl e the UA RT transp ort la yer by sending

the “Disable Transport Layer” Command. The LMX9820A

will empty its buffers, send the confirmation event, and dis-

able its UART interface. The UART interface will then be

reconfig ured to wak e up the LMX9820A o n a fal lin g edge of

the CTS pin.

11.2.3 LMX9820A Enabling the UART Interface

Because the transport layer can be disabled in any situa-

tion, the LMX9820A must verify that the transport layer is

enabled before sending data to the host. Possible situa-

tions in which the LMX9820A will need to re-enable the

interface include incoming data or incoming link indicators.

If the UART is not enabled, the LMX9820A must assume

that the host is in a low-power mode and initiate a wake-up

event by asserting RTS and setting HOST_WU to 1. To be

able to respond to the wake-up event, the host must moni-

tor its CTS input (i.e. the LMX9820A RTS output).

As soon as the host activates its RTS output (i.e. the

LMX9820 A CTS input), th e LMX98 20A will fi rst send a co n-

firmation event and then start to transmit the events.

11.2.4 Enabling the UART Transport Layer from Host

If the host needs to send data or commands to the

LMX9820A while the UART transport layer is disabled, it

must firs t assu me that th e LMX98 20A is s leepin g and wak e

it up by asserting the host RTS output (i.e. the LMX9820A

CTS input).

When the LMX9820A detects the wake-up signal, it

enables the UART and acknowledges the wake-up signal

by asserting its RTS output and HOST_WU signal. Addi-

tionally, the wake-up event will be acknowledged by send-

ing a confirmation event. When the host has received this

“Transport Layer Enabled” event, it knows the LMX9820A

is ready to receive commands.

Figure 19. UART Null Modem Connections

LMX9820A Host

RTS#

CTS#

RTS#

CTS#

GPIO

Host_WU (optional)

Obsolete

27 www.national.com

LMX9820A

12.0 Command Interface

The LMX9820A offers Bluetooth functionality through

either a self-contained slave functionality or a simple com-

mand interface. The interface is carried over the UART

interface.

The following sections describe the protocol on the UART

interface between the LMX9820A and the host in com-

mand mode (see Figure 20). In Transparent mode, no data

framing is necess ary and th e devic e does not interp ret dat a

carried over the interface as commands.

12.1 FRAMING

The connection is considered “Error free”. But for packet

recognition and synchronization, some framing is used.

All packets sent in both directions are constructed following

the model shown in Table 27.

12.1.1 Start and End Delimiters

The “STX” character is used as the start delimiter: STX =

0x02. ETX = 0x03 is used as the end delimiter.

12.1.2 Packet Type ID

This byte identifies the type of packet. See Table 28 for

details.

12.1.3 Opcode

The opcode identifies the command to execute. The

opcode values can be found within the “LMX9820A Soft-

ware User’s Guide” included with the LMX9820A Evalua-

tion Board.

12.1.4 Data Length

Number of bytes in the Packet Data field. The maximum

size is 333 data bytes per packet.

12.1.5 Checksum

This is a simple Block Check Character (BCC) checksum

of the bytes “Packet type”, “Opcode”, and “Data Length”.

The BCC checksum is calculated as low byte of the sum of

all bytes (e.g., if the sum of all bytes is 0x3724, the check-

sum is 0x24).

Figure 20. Bluetooth Functionality

LMX9820A

UART

Existing dev ic e

without Bluetooth™

capabilities

UART

Table 27. Packet Framing

Start

Delimiter Packet

Type ID Opcode Data Length Checksum Packet Data End

Delimiter

1 Byte 1 Byte 1 Byte 2 Bytes 1 Byte <Data Length> Bytes 1 Byte

- - - - - - - - - - - - - Checksum - - - - - - - - - - - - -

Table 28. Packet Type Ident ification

ID Direction Description

0x52

‘R’ REQUEST

(REQ) A request sent to the Bluetooth module.

All requests are answered by exactly one confirm.

0x43

‘C’ Confirm

(CFM) The Bluetooth modules confirm to a request.

All requests are answered by exactly one confirm.

0x69

‘i’ Indication

(IND) Information sent from the Bluetooth module that is not a direct confirm to a request.

Indicating status changes, incoming links, or unrequested events.

0x72

‘r’ Response

(RES) An optional response to an indication.

This is used to respond to some type of indication message.

Obsolete

www.national.com 28

LMX9820A

12.0 Command Interface (Continued)

12.2 COMMAND SET OVERVIEW

The LMX9820A has a well-defined command set to:

•Configure the device:

– Har dware settings

– Local Bluetooth parameters

– Service database

•Set up and handle links

Tables 29 through 39 show the actual command set and

the events coming back from the device. A fully docu-

mented description of the commands can be found in the

“LMX9820A Software Users Guide”.

Note: Additional command details are contained in the

Software Users Guide.

Table 29. Device Discovery Commands

Command Event Description

Inquiry Inquiry Complete Search for devices

Device Found Lists BDADDR and class of device

Remote Device Name Remote Device Nam e Confirm Get name of remote device

Table 30. SDAP Client Commands

Command Event Description

SDAP Connect SDAP Connect Confirm Create an SDP connection to remote device

SDAP Disconnect SDAP Disconnect Confirm Disconnect an active SDAP link

Connection Lost Notification for lost SDAP link

SDAP Service Browse Service Browse Confirm Get the services of the remote device

SDAP Service Search SDAP Service Search Confirm Search a specific service on a remote device

SDAP Attribute Request SDAP Attribute Request Confirm Searches for services with specific attributes

Table 31. SPP Link Commands

Command Event Description

Establish SPP Link Establishing SPP Link Confirm Initiates link establishment to a remote device

Link Established Link successfully established

Incoming Link A remote device established a link to the local

device

Set Link Timeout Set Link Timeout Confirm Confirms the supervision timeout for the existing

link

Get Link Timeout Get Link Timeout Confirm Get the supervision timeout for the existing link

Release SPP Link Release SPP Link Confirm Initiate release of SPP link

SPP Send Data SPP Send Data Confirm Send data to specific SPP port

Incoming Data Incoming data from remote device

Trans par ent Mo de Transpar ent Mo de Co nfi rm Switch to transpa rent mode on the U ART

Table 32. Default Connection Commands

Command Event Description

Connect Default Connection Connect Default Connection Confirm Connects to either one or all stored default

connections

Store Default Connection Store Default Connection Confirm Store device as default connection

Get List of Default Connections

List of Default Devices

Delete Default Connections Delete Default Connections Confirm

Obsolete

29 www.national.com

LMX9820A

12.0 Command Interface (Continued)

Table 33. Power Mode Commands

Command Event Description

Set Default Link Policy Set Default Link Policy Confirm Defines the link policy used for any incoming

or outgoing link.

Get Default Link Policy Get Default Link Policy Confirm Returns the stored default link policy

Set Link Policy Set Link Policy Confirm Defines the modes allowed for a specific link

Get Link Policy Get Link Policy Confirm Returns the actual link policy for the link

Enter Sniff Mode Enter Sniff Mode Confirm

Exit Sniff Mode Exit Sniff Mode Confirm

Enter Park Mode Enter Park Mode Confirm

Enter Hold Mode Enter Hold Mode Confirm

Power Save Mode Changed Remote device changed the power save

mode on the link

Table 34. Audio Control Commands

Command Event Description

Establish SCO Link Establish SCO Link Confirm Establish SCO link on existing RFComm

link

Relea se SCO Lin k Release SCO Lin k Confi r m Release SCO link

SCO Link Established Indicator A remote device has established a SCO

link to the local device

SCO Link Released Indicator SCO link has been released

Change SCO Packet Type Change SCO Packet Type Confirm Changes packet type for existing SCO link

SCO Packet Type changed indicator SCO packet type has been changed

Set Audio Settings Set Audio Settings Confirm Set audio settings for existing link

Get Audio Settin gs Get Audio Settin gs Conf irm Get audio settin gs for exi sti ng lin k

Set Volume Set Volume Confirm Configure the volume

Get Volume Get Volume Con firm Get curr ent vo lum e set ting

Mute Mute Confirm Mutes the microphone input

Table 35. Wake Up Function Commands

Command Event Description

Disable Transport Layer Transport Layer Enabled Disabling the UART transport layer and

activate s the hard w are wake -up functi on

Obsolete

www.national.com 30

LMX9820A

12.0 Command Interface (Continued)

Table 36. SPP Port Configuration and Status Commands

Command Event Description

Set Port Config Set Port Config Confi rm Set port setti ng for the “virtu al” serial port li nk

over the air

Get Port Config Get Port Config Confirm Read the actual port settings for a “virtual”

serial port

Port Config Changed Notification if port settings were changed

from remote device

SPP Get Port Status SPP Get Port Status Confirm Returns status of DTR and RTS (for the ac-

tive RFComm link)

SPP Port Set DTR SPP Port Set DTR Confirm Sets the DTR bit on the specified link

SPP Port Set RTS SPP Port Set RTS Confirm Sets the RTS bit on the specified link

SPP Port BREAK SPP Port BREAK Indicates that the host has detected a break

SPP Port Overrun Error SPP Port Overrun Error Confirm Used to indicate that the host has detected an

overrun error

SPP Port Parity Error SPP Port Parity Error Confirm Host has detected a parity error

SPP Port Framing Error SPP Port Framing Error Confirm Host has detected a framing error

SPP Port Status Changed Indicates that remote device has changed

one of the port status bits

Table 37. Local Settings Commands

Command Event Description

Read Local Name R ead Local Name Confirm Read user-friendly name of t he device

Write Local Name Write Local Name Confirm Set the user-friendly name of the device

Read Local BDADDR Re ad Local BDADDR Confirm

Change Local BDADDR Change Local BDADDR Confirm Note: Only use if you have your own

BDADDR pool

Store Class of Device Store Class of Devi ce Confirm

Set Scan Mode Set Scan Mode Confirm Change mode for discoverability and

connectability

Set Scan Mode Indication Reports end of automatic limited

discoverable mode

Get Fixed Pin Get Fixed Pin Confirm Reads current PinCode stored within the

device

Set Fixed Pin Set Fixed Pin Confirm Set t he local Pin Code

Get Security Mode Get Security Mode Confirm Get actual Security mode

Set Security Mode Set Security Mode Confirm Configure Security mode for local device

(default 2)

Remove Pairing Remove Pairing Confirm Remove pairing with a remote device

List Paired Devices List of Paired Devices Get list of paired devices stored in the

LMX9820A data memory

Set Default Link Timeout Set Default Link Timeout Confirm Store default link supervision timeout

Get Default Lin k Tim eou t Get Default Lin k Tim eou t Conf irm Get stored defaul t link superv is io n time out

Force Master Role Force Master Role Confirm Enables/Disables the request for master role

at incoming connections

Obsolete

31 www.national.com

LMX9820A

12.0 Command Interface (Continued)

Table 38. Local Service Database Configuration Commands

Command Event Description

Store SPP Record Store SPP Record Confirm Create a new SPP record within the service da-

tabase

Store DUN Record Store DUN Re cord Confirm Create a new DUN record within the service da-

tabase

Store FAX Record Store FAX Record Confirm Create a new FAX record within the service da-

tabase

Store OPP Record Store OPP Record Confirm Create a new OPP record within the service da-

tabase

Store FTP Record Store FTP Record Confirm Create a new FTP record with in the service d ata-

base

Store IrMCSync Record Store IrMCSync Record Confirm Create a new IrMCSync record within the service

database

Enable SDP Record Enable SDP Record Confirm Enable or disable SDP records

Delete All SDP Records Delete All SDP Records Confirm

Ports to Open Ports to Open Confirmed Specify the RFComm Ports to open on

startup

Table 39. Local Hardware Commands

Command Event Description

Set Default Audio Settings Set Default Audio Settings Confirm Configure default settings for audio codec

and air format, stored in NVS

Get Default Audi o Settin gs Get Default Audio Settings Conf irm Get stored defaul t audio setti ngs

Set Event Filter Set Event Filter Confirm Configures the reporting level of the

comma nd inte rfac e

Get Event Filter Get Event Filter Confirm Get the status of the reporting level

Read RSSI Read RSSI Confirm Returns an indicator for the incoming signal

strength

Change UART Speed Change UART Speed Confirm Set specific UART speed; needs proper ISEL

pin setting

Change UART Settings Change UART Settings Confirm Change configuration for parity and stop bits

Test Mode Test Mode Confirm Enable Bluetooth, EMI test, or local loopback

Restore Factory Settings Restore Factory Settings Confirm

Reset Dongle Ready Soft reset

Firmware Upgrade Stops the Bluetooth firmware and executes

the in-system programming code

Obsolete

www.national.com 32

LMX9820A

13.0 Usage Sce narios

13.1 SCENARIO 1: POINT-TO-POINT

CONNECTION

LMX9820A acts only as slave, no further configuration is

required.

Example: Sensor with LMX9820A; hand-held device with

standard Bluetooth option.

The SPP conform ance of the LMX9 820A allo ws any devic e

using the SPP to connect to the LMX9820A.

By switching to transparent mode automatically, the con-

troller has no need for an additional protocol layer; data is

sent raw to the other Bluetooth device.

On default, a PinCode is requested to block unallowed tar-

geting.

Figure 21. Point-to-Point Connection

Microcontrol ler LMX9820A

Standard Device

Air Interface

UART Search for Devices

Inquiry Request

Inquiry Response

Get Remote Services

Transparent Mode

No Bluetooth™ commands necessary

Sensor Device

only “connected” event indicated to controller

SDP Link Reque st

SDP Link Accept

Connected

Service Browse

Service Response

Release SDP Link

Release Confirm

SPP Link Request

SPP Link Accept

Establish SPP Link

Link Established

on Port L

The client software only

shows high level functions

with Bluetooth

Raw Data

Obsolete

33 www.national.com

LMX9820A

13.0 Usage Scenarios (Continued)

13.2 SCENARIO 2: AUTOMA TIC POINT -TO-POINT

CONNECTION

LMX9820A at both sides.

Example: Serial Cable Replacement.

Device #1 controls the link setup with a few commands as

described.

If step 5 is ex ecute d, the sto red defau lt devic e is co nnecte d

(step 4) after reset (in automatic mode only) or by sending

the “Connect to Default Device” command. The command

can be sent to the device at any time.

If step 6 is left out, the microcontroller has to use the “Send

Data” command, instead of sending data directly to the

module.

Figure 22. Automatic Point-to-Point Connection

Microcontrol ler

LMX9820A

Air

Inquiry Inquiry Request

Inquiry Response

Inquiry Result

Establish SDP Link

Transparent Mode

SDP Link Request

SDP Link Accept

SDP Link Established

Connected

Service Browse

Brow se Result

Release SDP Link

SDP Link Released

Service Browse

Service Response

Release SDP Link

Release Confirm

SPP Link Request

SPP Link Accept

Establish SPP Link

Link Established on Port R

LMX9820A

Transparent Mode

Seri al Device #1

Inquiry

1. Devices in Range?

Inquiry Result

2. Choose the Device

3. Which COM Port is

available?

Establish SDP Link

SDP Link Established

Service Browse

RFComm Port = R

Release SDP Link

SDP Link Released

4. Create SPP Link

Establish SPP Link

Connected on Port L

to Port R1 on Port L2

T r an sparent Mod e

6. Switch to

to Port R on Port L

Microcontroller

Serial Device #2

5. Connect on Default

Store Default Device

(Optional)

Device Stored

Storing Default Device

Device Stored

1. Port R indicates the remote RFComm channel to connect to. Usually the result of the SDP request.

2. Port L indicates the Local RFComm channel used for that connection.

No Bluetooth™ commands necessary;

only “connected” event indicated to controlle

Bluetooth™ device controls link with

a few commands

Interface

Transparent

Raw Data

Obsolete

www.national.com 34

LMX9820A

13.0 Usage Scenarios (Continued)

13.3 SCENARIO 3: POINT-TO-MULTIPOINT

CONNECTION

LMX9820A acts as master for several slaves.

Example: Two sensors with LMX9820A; one hand-held

master device with LMX9820A.

Serial D e vi ce s #2 and #3 e stablish the l ink auto ma t ically a s

soon as they are contacted by another device. No control-

ler intera cti on i s ne ce ss ary for s etti ng up th e Blu eto oth l ink.

Both switch automatically into transparent mode. The host

sends raw data over the UART.

Serial Device #1 is acting as master for both devices. The

host control s which de vice is send ing dat a, usi ng the “Sen d

data” command. If the device receives data from the other

devices, it is packaged into an “Incoming data” event. The

event incl ude s the dev ic e related port numbe r.

If necess ary, a li nk confi gurati on can be st ored as defaul t in

the master Serial Device #1 to enable the automatic recon-

nect after reset, power-up, or by sending the “connect

default connection” command.

Figure 23. Point-to-Multipoint Connection

Mic rocontroll er

LMX9820A

Conne ct to De vi ce #2 Connection Request

Transparent Mode

LMX9820A

Serial Device #1

Connect to Device #2

Microcontroller

Serial Device #2

see Scenario 2 see Scenario 2

Automatic Link Setup Connected

on Port L

Send Data Command

Receive Data Event

Send Data to Port L1

Data Received

from Port L1

Link Established

on Port L1

Microcontroller

LMX9820A

Connection Request

Transparent Mode

Serial Device #3

Automatic Link Setup Connected

on Port L

Conne ct to De vi ce #3Connect to Device #3

see Scenario 2 see Scenario 2

Send Data Command

Receive Data Event

Send Data to Port L2

Data Received

from Port L2

Link Established

on Port L2

Air

Interface

Raw Data

Obsolete

35 www.national.com

LMX9820A

14.0 Application Information

Figure 24 on page 35 represents a typical system sche-

matic with optional 32KHz mounted for the LMX9820A.

14.1 MATCHING NETWORK

The antenna matching network may or may not be

required, depending upon the impedance of the antenna

chosen. A 6.8 pF blocking capacitor is recommended.

14.2 FILTERED POWER SUPPLY

It is important to provide the LMX9820A with adequate

ground planes and a filtered power supply. It is highly rec-

ommended that a 0.1 µF and a 10 pF by pass capacito r be

placed as close as possible to VCC (pad H2) on the

LMX9820A.

14.3 HOST INTERFACE

To set the logic thresholds of the LMX9820A to match the

host system, IOVCC (pad H12) must be connected to the

logic power supply of the host system. It is highly recom-

mende d that a 10 pF bypa ss capac itor be pla ced a s clo se

as possible to the IOVCC pad on the LMX9820A.

ISEL2 (pad H13) and ISEL1 (pad J13) can be strapped to

the host logic 0 and 1 levels to set the host interface boot-

up configuration. Alternatively both ISEL2 and ISEL1 can

be hardwired over 10kΩ pullup/pulldown resistors.

Env0 (pad E9) and Env1 (pad B11) can be left uncon-

nected (both are pulled high), if no ISP capability is

required. If the ISP environment mode is needed, then

Env0 must be driven to logic low and Reset needs to be

asserte d. Af ter de- ass ert ion of Reset, the LMX9 820 A b oots

into the m ode c orre spo nding to the v alu es pre se nt on Env 0

and Env1. Alternatively, a firmware upgrade command can

be used.

14.4 CLOCK INPUT

The clock source must be placed as close as possible to

the LMX9820A. The quality of the radio performance is

directly related to the quality of the clock source connected

to the oscillator port on the LMX9820A. Careful attention

must be paid to the crystal/oscillator parameters or radio

performance could be drastically reduced.

14.5 SCHEMATIC AND LAYOUT EXAMPLES

Notes:

Capacitor values, Ct1, Ct2, C1 and C2 may vary depending on board design crystal manufacturer specification.

Single ground plane is used for both RF and digital grounds.

Recommend that a 4 component T-PI pad be used between RF output and antenna. This allows for versatility in the design such that the

match to the antenna maybe improved and/or the blocking margin increased by use a LC filter.

Figure 24. Example System Schematic

B1 Ante nna

RF_inout

Clk+

Clk-

12 M Hz

Ct1 Ct2

VCC

10 pF 0.01 µF

10 pF 0.01 µ F

H12

IOVCC

Reset_b

Reset_5100

Env0

Env1

Uart_rx

Uart_tx

Uart_cts

Uart_rts

D11

B11

D10

C10

RF GND Dig_gnd[1:2]

LMX9820A

D12, G11

Reference

Table 18 on

page 16.

Reference

Table 17 on

page 15.

Reference Table

25 on page 23

for correct POR

timing.

Connect to system

UART bus.

No HW Flowcontrol:

- CTS GND

- RTS NC

ISEL2

ISEL1 H13

J13

6.8 pF

AAI_srd

AAI_std

AAI_sfs

AAI_sclk

Connect to

PCM codec

or leave open

32kHz_CLKI

max

1KΩ

VCC

B13

B10

B12

C11

C12

32kHz_CLKO

C13

32 KHz

Optional 32KHz

Circuitry

Obsolete

www.national.com 36

LMX9820A

14.0 Application Information (Continued)

Figure 25. Component Placement (Layer 1)

Obsolete

37 www.national.com

LMX9820A

14.0 Application Information (Continued)

Figure 26. Solid Ground Plane (Layer 2)

Figure 27. Signal Plane (Layer 3)

Obsolete

www.national.com 38

LMX9820A

14.0 Application Information (Continued)

Figure 28. Component Layout Bottom (Layer 4)

Obsolete

39 www.national.com

LMX9820A

15.0 Reference Design

Obsolete

www.national.com 40

LMX9820A

16.0 Soldering

The LMX9820A bumps are designed to melt as part of the

Surface Mount Assembly (SMA) process. In order to

ensure reflow of all solder bumps and maximum solder

joint reliability while minimizing damage to the package,

recommended reflow profiles should be used.

Table 40, Table 41 and Figure 29 on page 41 provide the

soldering details required to properly solder the LMX9820A

to standard PCBs. The illustration serves only as a guide

and Nat ional i s not li able if a selec ted prof ile does n ot work.

See IPC/JEDEC J-STD-020C, July 2004 for more informa-

tion

Table 40. Soldering Details

Parameter Value

PCB Land Pad Diameter 24 mil

PCB Solder Mask Opening 30 mil

PCB Finish (HASL details) Defined by customer or manufacturing facility

Stencil Aperture 28 mil

Stencil Thi ck nes s 5 mil

Solder Pa ste Used Defined by customer or manufacturing facility

Flux Cleaning Process Defined by customer or manufacturing facility

Reflow Profiles See Figure 29 on page 41

Table 41. Classification Reflow Profiles1, 2

Profile Fea ture Sn-Pb Eutectic Assembly NOPB Assem bly

Averag e Ramp-Up Rate ( TsMAX to

Tp) 3°C/second maximum 3°C/second maximum

Preheat:

Te mperature Min (TsMIN)

Temperature Max (TsMAX)

Ti me (tsMIN to tsMAX)

100°C

150°C

60–1 20 seconds

150°C

200°C

60–180 seconds

Time maintained above:

Temperature (TL)

Ti me (tL)183°C

60–1 50 seconds 217°C

60–150 seconds

Peak/Classification Temperature (Tp) 225 +0/-5°C 260 + 0°C

Time within 5°C of actual Peak

Temperat ure (tp) 10–30 seconds 20–40 seconds

Ramp-Down Rate 6°C/second maximum 6°C/second maximum

Time 25 °C to Peak Temperature 6 minutes maximum 8 minutes maximum

Reflo w Profiles See Figure 29 Se e Figur e 29

1. See IPC/JEDEC J-STD-0 20 C, July 2004.

2. All temperatur es refe r to the top side of the packag e, me asu red on the pac k age body su rfac e.

Obsolete

41 www.national.com

LMX9820A

16.0 Soldering (Continued)

Figure 29. Typic a l Reflow Profiles

Obsolete

www.national.com 42

LMX9820A

17.0 Datasheet Revision History

This section is a report of the revision/creation process of

the datasheet for the LMX9820A. Table 42 provides the

stages/definitions of the datasheet. Table 43 lists the revi-

sion history.

Table 42. Documentation Status Definitions

Datasheet Status Product Status Definition

Advance Information Formative or in Design This datasheet contains the design specifications for product de-

velopment. Specifications may change in any manner without no-

tice.

Prelimin ary First Production This datas heet conta ins prelim inary data. Supp lementary data will

be published at a later date. National Semiconductor Corporation

reserves the right to make c hanges at any ti me without notice i n or-

der to improve design and supply the best possible product.S

No Identific ation Noted Full production This datash eet c ontains fina l specif ica tions . Nation al Sem icond uc-

tor Corporation reserves the right to make changes at any time

without notice in order to improve design and supply the best pos-

sible product.

Obsol ete Not in Produc tion This datashee t contai ns spec ifica tions on a product that has been

discontinued by National Semiconductor Corporation. The

datasheet is printed for reference information only.

Table 43. Revision History

Revision #

(PDF Da te) Revisions/Comments

0.4 (April 2003) Initial Datasheet revised to include new radio and additional functionality. Several edits

have been made to functional, performance, and electrical details.

0.6 (February 2004) Updated RF performance values

Added 32 kHz freq uen cy supp ort.

0.7 (August 2004) Updated General Description and Features with Audio

Updated Pinout Information

Added Audio Secti on

Updated Command Section with audio commands

0.71 (August 2004) Reviewed Crystal Support Section

Added Audio block to application diagram

0.72 (October 2004) Updated package size

Table 9 to Table 15 updated

Optional 32.768 kHz c rystal suppor t remove d

Package outline drawing updated to 14.1mm width and 2.0mm height

0.73 (December 2004) In Table 15, maximum output power range updated to +4dBm.

0.80 (March 2005) Minor edits for clarity, language, units, formatting, etc. No functional changes.

0.81 (March 2005) Minor changes in feature list

Table 2 updated

Added footnote to Table 10

Added descri pti on in cha pte r 6.2

Table 20 updated

0.82 (March 2005) Added footnote to Table 13

Figure 22 updated

1.0 draft 1 (March 2005) Updated Power consumption Table 12

Obsolete

43 www.national.com

LMX9820A

17.0 Datasheet Revision History (Continued)

1.0 draft 2 (April 2005) No functional Update

1.0 draft 3 (April 2005) Updated C/I in Table 14

1.0 (April 2005) No functional Update

1.1 Interim internal release.

1.2 (May 2006) NOPB added, 3 2.768kH z oscilla tor, WinBon d and PCM slave info, s niff mode , Reference

to NKG3184A TCXO removed.

1.3 (Septemb er 2006) In the pad des cripti ons tabl e, H4 change d to RF GND not NC. Referenc e Schem atic sec -

tion add ed, Low po wer section completed, System schem atic compl eted with 32KH z crys-

tal option.

Table 43. Revision History

Revision #

(PDF Da te) Revisions/Comments

Obsolete

www.national.com 44

LMX9820A

Note

Obsolete

45 www.national.com

LMX9820A

18.0 Physical Dimension

Figure 30. Package with Sn-Pb Solder Bumps (metal housing).

NOTES:

PAD PITCH IS 1.00 MILLIMETER (.0394”) NON-ACCUMULATIVE.

UNLESS OTHERWISE SPECIFIED, ALL DIMENSIONS ARE IN MILLIMETER.

TOLERANCE, UNLESS OTHERWISE SPECIFIED:

TWO PLACE (.00): ±.01

THREE PLACE (.000): ±.002

ANGULAR: ±1°

Obsolete

LMX9820A Bluetooth Serial Port Module

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which,

(a) are intended for surgical implant into the body, or (b) support

or sustain life, and whose failure to perform, when properly used

in accordance with instructions for use provided in the labeling,

can be reasonably expected to result in a significant injury to the

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2. A critical component is any component of a life support device

or system whose failure to perform can be reasonably expected

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Leadfree products are RoHS compliant.

Figure 31. Package with NOPB Solder Bumps (plastic housing).

Obsolete

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