TPS622319DRYT - TEXAS INSTRUMENTS

TPH7R006PL

MOSFETs Silicon N-channel MOS (U-MOS-H)

TPH7R006PL

Start of commercial production

2016-10

1. Applications

Applications

• High-Efficiency DC-DC Converters

• Switching Voltage Regulators

• Motor Drivers

2. Features

Features

(1) High-speed switching

(2) Small gate charge: QSW = 6.2 nC (typ.)

(3) Small output charge: Qoss = 20 nC (typ.)

(4) Low drain-source on-resistance: RDS(ON) = 5.4 mΩ (typ.) (VGS = 10 V)

(5) Low leakage current: IDSS = 10 µA (max) (VDS = 60 V)

(6) Enhancement mode: Vth = 1.5 to 2.5 V (VDS = 10 V, ID = 0.2 mA)

3. Packaging and Internal Circuit

Packaging and Internal Circuit

SOP Advance

1, 2, 3: Source

4: Gate

5, 6, 7, 8: Drain

2016-11-21

Rev.1.0

TPH7R006PL

4. Absolute Maximum Ratings (Note) (T

Absolute Maximum Ratings (Note) (T

Absolute Maximum Ratings (Note) (Ta

a = 25

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Drain-source voltage

Gate-source voltage

Drain current (DC)

Drain current (pulsed)

Power dissipation

Single-pulse avalanche energy

Single-pulse avalanche current

Channel temperature

Storage temperature

(Tc = 25 )

(Silicon limit)

(t = 100 µs)

(Tc = 25 )

(Note 1)

(Note 1), (Note 2)

(Note 1)

(Note 3)

(Note 4)

(Note 5)

Symbol

VDSS

VGSS

IDP

EAS

IAS

Tch

Tstg

Rating

±20

180

0.96

175

-55 to 175

Unit



Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the

significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even

if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum

ratings.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook

("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test

report and estimated failure rate, etc).

5. Thermal Characteristics

Thermal Characteristics

Characteristics

Channel-to-case thermal resistance

Channel-to-ambient thermal resistance

(Tc = 25 )

(Ta = 25 )

(Note 3)

(Note 4)

Symbol

Rth(ch-c)

Rth(ch-a)

Max

1.83

156

Unit

/W

Note 1: Ensure that the channel temperature does not exceed 175 .

Note 2: Limited by silicon chip capability.

Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1

Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2

Note 5: VDD = 48 V, Tch = 25  (initial), L = 3.1 µH, IAS =60 A

Fig.

Fig. 5.1

5.1

5.1 Device Mounted on a Glass-Epoxy

Device Mounted on a Glass-Epoxy

Board (a)

Fig.

Fig. 5.2

5.2

5.2 Device Mounted on a Glass-Epoxy

Device Mounted on a Glass-Epoxy

Board (b)

Note: This transistor is sensitive to electrostatic discharge and should be handled with care.

2016-11-21

Rev.1.0

TPH7R006PL

6. Electrical Characteristics

Electrical Characteristics

6.1.

6.1. Static Characteristics (T

Static Characteristics (T

Static Characteristics (Ta

a = 25

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Gate leakage current

Drain cut-off current

Drain-source breakdown voltage

Gate threshold voltage

Drain-source on-resistance

(Note 6)

Symbol

IGSS

IDSS

V(BR)DSS

V(BR)DSX

Vth

RDS(ON)

Test Condition

VGS = ±20 V, VDS = 0 V

VDS = 60 V, VGS = 0 V

ID = 10 mA, VGS = 0 V

ID = 10 mA, VGS = -20 V

VDS = 10 V, ID = 0.2 mA

VGS = 4.5 V, ID = 10 A

VGS = 10 V, ID = 30 A

Min



1.5



Typ.



8.9

5.4

Max

±0.1



2.5

13.5

7.0

Unit

µA

mΩ

Note 6: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drain-

source breakdown voltage is lowered in this mode.

6.2.

6.2. Dynamic Characteristics (T

Dynamic Characteristics (T

Dynamic Characteristics (Ta

a = 25

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Input capacitance

Reverse transfer capacitance

Output capacitance

Gate resistance

Switching time (rise time)

Switching time (turn-on time)

Switching time (fall time)

Switching time (turn-off time)

Symbol

Ciss

Crss

Coss

ton

toff

Test Condition

VDS = 30 V, VGS = 0 V, f = 1 MHz



See Fig. 6.2.1

Min



Typ.

1440

300

0.8

5.6

4.5

Max

1875



1.3



Unit

Ω

VDD ≈ 30 V

VGS = 0 V/ 10 V

ID = 30 A

RL = 1.0 Ω

RGG = 4.7 Ω

RGS = 4.7 Ω

Duty ≤ 1 %, tw = 10 µs

Fig.

Fig. 6.2.1

6.2.1

6.2.1 Switching Time Test Circuit

Switching Time Test Circuit

6.3.

6.3. Gate Charge Characteristics (T

Gate Charge Characteristics (T

Gate Charge Characteristics (Ta

a = 25

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Total gate charge (gate-source plus

gate-drain)

Gate-source charge 1

Gate-drain charge

Gate switch charge

Output charge

Symbol

Qgs1

Qgd

QSW

Qoss

Test Condition

VDD ≈ 30 V, VGS = 10 V, ID = 30 A

VDD ≈ 30 V, VGS = 4.5 V, ID = 30 A

VDD ≈ 30 V, VGS = 10 V, ID = 30 A

VDS = 30 V, VGS = 0 V, f = 1 MHz

Min



Typ.

6.9

3.0

6.2

Max



Unit

2016-11-21

Rev.1.0

TPH7R006PL

6.4.

6.4. Source-Drain Characteristics (T

Source-Drain Characteristics (T

Source-Drain Characteristics (Ta

a = 25

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Reverse drain current (pulsed)

Diode forward voltage

Reverse recovery time

Reverse recovery charge

(Note 7)

Symbol

IDRP

VDSF

trr

Qrr

Test Condition

(t = 100 µs)

IDR = 60 A, VGS = 0 V

IDR = 15 A, VGS = 0 V,

-dIDR/dt = 100 A/µs

Min



Typ.



Max

180

-1.2



Unit

Note 7: Ensure that the channel temperature does not exceed 175 .

7. Marking

Marking

Fig.

Fig. 7.1

7.1

7.1 Marking

Marking

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Rev.1.0

TPH7R006PL

8. Characteristics Curves (Note)

Characteristics Curves (Note)

Fig.

Fig. 8.1

8.1

8.1 I

D - V

- V

- VDS

DS Fig.

Fig.

Fig. 8.2

8.2

8.2 I

D - V

- V

- VDS

Fig.

Fig. 8.3

8.3

8.3 I

D - V

- V

- VGS

GS Fig.

Fig.

Fig. 8.4

8.4

8.4 V

VDS

DS - V

- V

- VGS

Fig.

Fig. 8.5

8.5

8.5 R

RDS(ON)

DS(ON)

DS(ON) - I

- I

- ID

DFig.

Fig.

Fig. 8.6

8.6

8.6 I

IDR

DR - V

- V

- VDS

2016-11-21

Rev.1.0

TPH7R006PL

Fig.

Fig. 8.7

8.7

8.7 V

V(BR)DSS

(BR)DSS

(BR)DSS - T

- T

- Ta

aFig.

Fig.

Fig. 8.8

8.8

8.8 V

Vth

th - T

- T

- Ta

Fig.

Fig. 8.9

8.9

8.9 R

RDS(ON)

DS(ON)

DS(ON) - T

- T

- Ta

aFig.

Fig.

Fig. 8.10

8.10

8.10 Dynamic Input/Output Characteristics

Dynamic Input/Output Characteristics

Fig.

Fig. 8.11

8.11

8.11 Capacitance - V

Capacitance - V

Capacitance - VDS

DS Fig.

Fig.

Fig. 8.12

8.12

8.12 Q

Qoss

oss

oss - V

- V

- VDS

2016-11-21

Rev.1.0

TPH7R006PL

Fig.

Fig. 8.13

8.13

8.13 r

rth

th - t

- t

- tw

(Guaranteed Maximum)

Fig.

Fig. 8.14

8.14

8.14 P

D - T

- T

- Ta

(Guaranteed Maximum)

Fig.

Fig. 8.15

8.15

8.15 P

D - T

- T

- Tc

(Guaranteed Maximum)

Fig.

Fig. 8.16

8.16

8.16 Safe Operating Area

Safe Operating Area

(Guaranteed Maximum)

NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test,

unless otherwise noted.

2016-11-21

Rev.1.0

TPH7R006PL

Package Dimensions

Unit: mm

Weight: 0.069 g (typ.)

Package Name(s)

TOSHIBA: 2-5Q1S

Nickname: SOP Advance

2016-11-21

Rev.1.0

TPH7R006PL

RESTRICTIONS ON PRODUCT USE

• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information

in this document, and related hardware, software and systems (collectively "Product") without notice.

• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's

written permission, reproduction is permissible only if reproduction is without alteration/omission.

• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible

for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which

minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage

to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate

the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA

information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the

precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application

with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,

including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating

and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample

application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.

TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.

• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE

PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE

EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY

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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,

including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING

TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING

AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.

2016-11-21

Rev.1.0