Dual Processor
Supervisors with Watchdog
ADM13305
Rev. 0
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
FEATURES
Dual supervisory circuits
Supply voltage range of 2.7 V to 5.5 V
Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V
Adjustable 0.6 V voltage reference
Maximum supply current of 40 μA
140 ms (minimum) reset timeout
Watchdog timer with 1.6 sec (typical) timeout
RESET valid from VDD ≥ 1.1 V
Push-pull RESET and RESET outputs
8-lead, narrow body SOIC package
Temperature range: −40°C to +85°C
APPLICATIONS
Supervising DSPs/microcontrollers
Industrial and portable equipment
Wireless systems
Notebook/desktop computers
GENERAL DESCRIPTION
The ADM13305 is a dual voltage supervisor designed to
monitor two supplies and provide a reset signal to DSP and
microprocessor-based systems.
There are five models available, all of which feature a combination
of internally pretrimmed undervoltage threshold options for
monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also
an adjustable input option with an undervoltage threshold voltage
of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 models
have two internally fixed thresholds. The ADM13305-4 and
ADM13305-5 offer one internally fixed threshold and one
externally programmable threshold via a resistor string. See
the Ordering Guide for a list of all available options.
During power-up, RESET is asserted when the supply voltage
exceeds 1.1 V. The device then monitors the SENSEv input pins
and holds the RESET output low as long as either of the SENSEv
inputs remains below the rising threshold voltage, VIT+.
FUNCTIONAL BLOCK DIAGRAMS
06922-002
V
DD
14kΩ
R1 R2
R3 R4
1.25V
RESET
LOGIC + TIMER
OSCILLATOR
TRANSITION
DETECTION
WATCHDOG
LOGIC + TIMER
RESET
ADM13305-33
ADM13305-25
ADM13305-18
SENSE1
SENSE2
GND
WDI
MR
RESET
Figure 1.
06922-001
V
DD
14kΩ
R1 R2
0.6V
RESET
LOGIC + TIMER
OSCILLATOR
TRANSITION
DETECTION
WATCHDOG
LOGIC + TIMER
RESET
ADM13305-4
ADM13305-5
SENSE1
SENSE2
WDI
MR
RESET
GND
Figure 2. .
Once the supplies monitored at the SENSEv inputs rise above
their associated thresholds, the reset signal remains low for
the reset timeout period before deasserting. Subsequently, if a
voltage monitored by the SENSEv pins falls below its associ-
ated falling threshold, VIT−, the RESET output asserts. The
ADM13305 features both an active high RESET and an active
low RESET output.
As well as providing power-on reset signals, an on-chip watchdog
timer can reset the microprocessor if it fails to strobe within the
preset timeout period. A reset signal can also be asserted by an
external push button through the manual reset input pin.
The ADM13305 is available in an 8-lead, narrow body SOIC
package. The device operates over the extended industrial
temperature range of −40°C to +85°C.
ADM13305
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Requirements .................................................................. 5
Switching Characteristics ............................................................ 5
Functional Truth Table ................................................................ 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 10
Input Configuration ................................................................... 10
Reset Output ............................................................................... 10
Watchdog Timer ......................................................................... 10
Manual Reset (MR) .................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
8/07—Revision 0: Initial Version
ADM13305
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1. ADM13305-18, ADM13305-25, and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.7 5.5 V
SUPPLY CURRENT, IDD 40 µA
INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD
RESET, RESET OUTPUT
High Level Output Voltage, VOH V
DD − 0.2 V IOH = −20 µA
V
DD − 0.4 V IOH = −2 mA, VDD = 3.3 V
V
DD − 0.4 V IOH = −3 mA, VDD = 5.5 V
Low Level Output Voltage, VOL 0.2 V IOL = 20 µA
0.4 V IOL = 2 mA, VDD = 3.3 V
0.4 V IOL = 3 mA, VDD = 5.5 V
Power-Up Reset Voltage1 0.4 V IOL = 20 µA, VDD ≥ 1.1 V
SENSE INPUTS
Falling Threshold Voltage, VIT− 1.64 1.68 1.72 V TA = 0°C to 85°C
2.20 2.25 2.30 V TA = 0°C to 85°C
2.86 2.93 3.00 V TA = 0°C to 85°C
4.46 4.55 4.64 V TA = 0°C to 85°C
1.64 1.68 1.73 V TA = −40°C to +85°C
2.20 2.25 2.32 V TA = −40°C to +85°C
2.86 2.93 3.02 V TA = −40°C to +85°C
4.46 4.55 4.67 V TA = −40°C to +85°C
Hysteresis at SENSEv Inputs, VHYS 15 mV VIT− = 1.68 V
20 mV VIT− = 2.25 V
30 mV VIT− = 2.93 V
40 mV VIT− = 4.55 V
WDI
Average High Level Input Current, IH(AV) 100 150 µA WDI = VDD = 5.5 V
Average Low Level Input Current, IL(AV) −15 −20 µA WDI = 0 V, VDD = 5.5 V
INPUT VOLTAGE AT MR AND WDI
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V
INPUT TRANSITION RISE AND FALL RATE AT MR 50 ns/V
HIGH LEVEL INPUT CURRENT, IH
WDI 120 170 µA WDI = VDD = 5.5 V
MR −130 −180 µA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 5 8 µA SENSE1 = VDD = 5.5 V
SENSE2 6 9 µA SENSE2 = VDD = 5.5 V
LOW LEVEL INPUT CURRENT, IL
WDI −120 −170 µA WDI = 0 V, VDD = 5.5 V
MR −430 −600 µA
MR = 0 V, VDD = 5.5 V
SENSEv −1 +1 µA SENSE1, SENSE2 = 0 V
1 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 s/V.
ADM13305
Rev. 0 | Page 4 of 12
VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.7 5.5 V
SUPPLY CURRENT, IDD 40 µA
INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD
RESET, RESET OUTPUT
High-Level Output Voltage, VOH V
DD − 0.2 V IOH = −20 µA
V
DD − 0.4 V IOH = −2 mA, VDD = 3.3 V
V
DD − 0.4 V IOH = −3 mA, VDD = 5.5 V
Low-Level Output Voltage, VOL 0.2 V IOH = 20 µA
0.4 V IOH = 2 mA, VDD = 3.3 V
0.4 V IOH = 3 mA, VDD = 5.5 V
Power-Up Reset Voltage1 0.4 V IOH = 20 µA, VDD ≥ 1.1 V
SENSEv INPUTS
Falling Input Threshold Voltage, VIT− 0.5952 0.6 0.6048 V TA = −40°C to +85°C
2.23 2.25 2.29 V TA = −40°C to +85°C
2.90 2.93 2.98 V TA = −40°C to +85°C
Hysteresis at SENSEv Inputs, VHYS 0 mV VIT− = 0.6 V
20 mV VIT− = 2.25 V
30 mV VIT− = 2.93 V
WDI
Average High Level Input Current, IH(AV) 100 150 µA WDI = VDD = 5.5 V
Average Low Level Input Current, IL(AV) −15 −20 µA WDI = 0 V, VDD = 5.5 V
INPUT VOLTAGE AT MR AND WDI
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V
INPUT TRANSITION RISE AND FALL RATE AT MR 50 ns/V
HIGH LEVEL INPUT CURRENT, IH
WDI 120 170 µA WDI = VDD = 5.5 V
MR −130 −180 µA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 5 8 µA SENSE1 = VDD = 5.5 V
SENSE2 −50 +50 nA SENSE2 = VDD = 5.5 V
LOW LEVEL INPUT CURRENT, IL
WDI −120 −170 µA WDI = 0 V, VDD = 5.5 V
MR −430 −600 µA
MR = 0 V, VDD = 5.5 V
SENSEv −1 +1 µA SENSE1, SENSE2 = 0 V
1 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 µs/V.
ADM13305
Rev. 0 | Page 5 of 12
TIMING REQUIREMENTS
VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 3. ADM13305-18, ADM13305-25 and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
PULSE WIDTH (tw)
SENSEv 6 µs VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
MR 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
WDI 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
Table 4. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
PULSE WIDTH (tw)
SENSEv 30 µs VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
MR 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
WDI 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
SWITCHING CHARACTERISTICS
VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 5. ADM13305-18, ADM13305-25 and ADM13305-33
Parameter Min Typ Max Unit Test Conditions/Comments
Watchdog Timeout (tt(OUT)) 1.1 1.6 2.3 sec
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Delay Time (td) 140 200 280 ms
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) 1 5 µs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 1 5 µs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
1 The reset timeout delay of 200 ms masks the propagation delay.
Table 6. ADM13305-4 and ADM13305-5
Parameter Min Typ Max Unit Test Conditions/Comments
Watchdog Timeout (tt(out)) 1.1 1.6 2.3 sec
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Delay Time (td) 140 200 280 ms
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) 30 µs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 30 µs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
1 The reset timeout delay of 200 ms masks the propagation delay.
FUNCTIONAL TRUTH TABLE
Table 7.
MR SENSE1 > VIT1 SENSE2 > VIT2 RESET RESET
L X1 X
1 L H
H 0 0 L H
H 0 1 L H
H 1 0 L H
H 1 1 H L
1 X = don’t care.
ADM13305
Rev. 0 | Page 6 of 12
ABSOLUTE MAXIMUM RATINGS
Table 8.
Parameter Rating
Supply Voltage Range, VDD −0.3 V to +6 V
MR , WDI −0.3 V to VDD + 0.3 V
SENSE1, SENSE2 (VDD + 0.3 V)VIT/VREF
RESET, RESET
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−0.3 V to +6 V
Maximum Low Output Current 5 mA
Maximum High Output Current −5 mA
Input Clamp Current (VI < 0 V, VI > VDD) ±20 mA
Output Clamp Current (VO < 0 V, VO > VDD) ±20 mA
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
THERMAL RESISTANCE
Table 9.
Package Type θJA Unit
8-Lead SOIC_N (R-8) 206 °C/W
ESD CAUTION
ADM13305
Rev. 0 | Page 7 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06922-003
SENSE1 1
SENSE2 2
WDI 3
GND 4
VDD
8
MR7
RESET6
RESET5
ADM13305
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 10. Pin Function Descriptions
Pin No. Mnemonic Description
1 SENSE1 Sense Input Voltage 1.
2 SENSE2 Sense Input Voltage 2.
3 WDI Watchdog Timer Input.
4 GND Ground.
5 RESET Active-Low Reset Output.
6 RESET Active-High Reset Output.
7 MR Manual Reset Input.
8 VDD Supply Voltage.
ADM13305
Rev. 0 | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
0.6003
0.5985
06922-004
FREE AIR TEMPERATURE, T
A
(°C)
INPUT THRESHOLD VOLTAGE, V
IT
(V)
0.6001
0.5999
0.5997
0.5995
0.5993
0.5991
0.5989
0.5987
–40 –20 0 20 40 60 80
T
A
= 25°C
V
DD
= 2V
MR = OPEN
06922-007
0
0 1000
MINIMUM PULSE DURATION AT SENSE,
t
W
(µs)
10
9
8
7
6
5
4
3
2
1
100 200 300 400 500 600 700 800 900
V
DD
= 5.5V
MR = OPEN
SENSE THRESHOLD OVERDRIVE (mV)
Figure 4. Sense Threshold Voltage vs. Free Air Temperature at VDD Figure 7. ADM13305-18, ADM13305-25 and ADM13305-33 Minimum Pulse
Duration at SENSE vs. Sense Threshold Overdrive
40
–10
–1.0 6.5
06922-005
SUPPLY VOLTAGE, V
DD
(V)
SUPPLY CURRENT, I
DD
(µA)
35
30
25
20
15
10
5
0
–5
–0.5 00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SENSEv = 5.5V
MR = OPEN
T
A
= 25°C
30
0 1000
06922-017
MINIMUM PULSE DURATION AT SENSE,
tW
(µs)
40
39
38
37
36
35
34
33
32
31
100 200 300 400 500 600 700 800 900
V
DD
= 5.5V
MR = OPEN
SENSE THRESHOLD OVERDRIVE (mV)
Figure 5. Supply Current vs. Supply Voltage Figure 8. ADM13305-4 and ADM13305-5 Minimum Pulse Duration at SENSE
vs. Sense Threshold Overdrive
0
0––5–4–3–2–1
06922-008
HIGH LEVEL OUTPUT CURRENT, IOH (mA)
HIGH LEVEL OUTPUT VOLTAGE, V
OH (V)
2.50
6
2.00
1.00
0.50
1.50
–40°C
0°C
+25°C
+85°C
VDD = 2V
MR = OPEN
–900
–1.0 7.0
06922-006
INPUT VOLTAGE AT MR, V
I
(V)
INPUT CURRENT, I
I
(µA)
100
200
0
–100
–200
–300
–400
–500
–600
–700
–800
–0.5 00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V
DD
= 5.5V
T
A
= 25°C
Figure 6. Input Current vs. Input Voltage at MR Figure 9. High Level Output Voltage vs. High Level Output Current
ADM13305
Rev. 0 | Page 9 of 12
06922-009
0
0––50–40–30–20–10
HIGH LEVEL OUTPUT CURRENT, IOH (mA)
HIGH LEVEL OUTPUT VOLTAGE, V
OH (V)
6.0
60
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
–40°C
0°C
+25°C
+85°C
VDD = 5.5V
MR = OPEN
Figure 10. High Level Output Voltage vs. High Level Output Current
0
06
06922-010
LOW LEVEL OUTPUT CURRENT, IOL (mA)
LOW LEVEL OUTPUT VOLTAGE, V
OL (V)
0.25
0.20
0.15
0.10
0.05
24135
VDD = 2V
MR = OPEN
–40°C
0°C
+25°C
+85°C
Figure 11. Low Level Output Voltage vs. Low Level Output Current
0
06
06922-016
LOW LEVEL OUTPUT CURRENT, IOL (mA)
LOW LEVEL OUTPUT VOLTAGE, V
OL (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
5 10152025303540455055
–40°C
0°C
+25°C
+85°C
VDD = 5.5V
MR = OPEN
Figure 12. Low Level Output Voltage vs. Low Level Output Current
ADM13305
Rev. 0 | Page 10 of 12
THEORY OF OPERATION
The ADM13305 is a dual voltage supervisor designed to
monitor two supplies and provide a reset signal to DSP and
microprocessor-based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also
an adjustable input option with an undervoltage threshold of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 have
two internally fixed thresholds, while the ADM13305-4 and
ADM13305-5 offer one internally fixed threshold and one
externally programmable threshold via a resistor string. See
the Ordering Guide for a list of all available options.
INPUT CONFIGURATION
The ADM13305 is powered through VDD. To increase noise
immunity in noisy applications, place a 0.1 μF capacitor
between the VDD input and ground.
The SENSEv inputs are resistant to short power supply glitches.
Do not allow an unused SENSEv input to float or to be grounded,
instead connect it to a supply voltage greater than its specified
threshold voltage.
Typically, the threshold voltage at each adjustable SENSEv input
is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor
divider network to the device as depicted in Figure 13, where,
⎟
⎠
⎞
⎜
⎝
⎛+
=
R2
R2R1
VMONITERED V6.0
06922-012
R1
R2
MONITORED VOLTAGE
V
REF
= 0.6V
Figure 13. Setting the Adjustable Monitor
RESET OUTPUT
The reset outputs are guaranteed to be in the correct state for
VDD down to 1.1 V. During power-up, RESET is asserted when
the supply voltage becomes greater than 1.1 V.
06922-013
SENSEv
V
(NOM)
0
1
V
IT–
RESET
t
d
t
d
t
t
Figure 14. Reset Timing Diagram
Once the supplies monitored at the SENSEv pins rise above
their associated threshold level, the RESET signal remains low
for the reset timeout period before deasserting. Subsequently, if
either of the supplies monitored by the SENSEv pins falls below
its associated threshold the RESET output reasserts.
The ADM13305 features both an active-low, push-pull RESET
output and an active-high, push-pull RESET output.
WATCHDOG TIMER
The ADM13305 features a watchdog timer that monitors
microprocessor activity. A timer circuit is cleared with every
low-to-high or high-to-low logic transition on the watchdog
input pin (WDI). If the timer counts through the preset
watchdog timeout period of 1.6 sec, RESET is asserted, as
shown in . Figure 15
The microprocessor is required to toggle the WDI pin to avoid
being reset. Therefore, failure of the microprocessor to toggle
WDI within the timeout period indicates a code execution error
and the reset pulse generated restarts the microprocessor in a
known state. The watchdog timer can be disabled by leaving
WDI floating.
06922-014
0
1
RESET
0
1
WDI
t
WD
t
d
t
t
Figure 15. Watchdog Timing Diagram
ADM13305
Rev. 0 | Page 11 of 12
MANUAL RESET (MR)
The ADM13305 features a manual reset input, which when driven
low, asserts the reset output, as shown in Figure 16. When MR
transitions from low to high, reset remains asserted for the
duration of the reset active timeout period before deasserting.
An external push-button switch can be connected between MR
and ground to allow the user to generate a reset.
06922-015
0
1
RESET
td
t
0
1
t
MR
Figure 16. Manual Reset Timing Diagram
ADM13305
Rev. 0 | Page 12 of 12
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-012-A A
-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 17. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
Nominal Supervised
Voltage
Threshold Voltage
(Typical) Temperature
Range
Package
Description
Package
Option
SENSE1 SENSE2 SENSE1 SENSE2
ADM13305-18ARZ13.3 V 1.8 V 2.93 V 1.68 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-18ARZ-RL71
3.3 V 1.8 V 2.93 V 1.68 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-25ARZ1
3.3 V 2.5 V 2.93 V 2.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-25ARZ-RL71
3.3 V 2.5 V 2.93 V 2.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-33ARZ1
5 V 3.3 V 4.55 V 2.93 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-33ARZ-RL71
5 V 3.3 V 4.55 V 2.93 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-4ARZ1
3.3 V Adjustable22.93 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-4ARZ-RL71
3.3 V Adjustable22.93 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-5ARZ1
2.5 V Adjustable22.25 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13305-5ARZ-RL71
2.5 V Adjustable22.25 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
1 Z = RoHS Compliant Part.
2 0.6 V adjustable. External resistor divider determines the actual sense voltage.
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D06922-0-8/07(0)
