1© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Built Into Tomorrow
Overview
KEMET’s COTS program is an extension of KEMET knowledge of
high reliability test regimes and requirements. KEMET regularly
supplies “up-screened” products by working with customer
drawings and imposing specied design and test requirements.
The COTS program offers the same high quality and high
reliability components as up-screened products, but at a lower
cost to the customer. This is accomplished by eliminating the
need for customer-specic drawings to achieve the reliability
level required for customer applications. A series of tests and
inspections have been selected to provide the accelerated
conditioning and 100% screening necessary to eliminate infant
mortal failures from the population.
KEMET’s C0G dielectric features a 125°C maximum operating
temperature and is considered “stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes C0G dielectric as a Class I material. Components
of this classication are temperature compensating and are
suited for resonant circuit applications or those where Q and
stability of capacitance characteristics are required. C0G exhibits
no change in capacitance with respect to time and voltage
and boasts a negligible change in capacitance with reference
to ambient temperature. Capacitance change is limited to ±30
ppm/ºC from −55°C to +125°C.
All COTS testing includes voltage conditioning and post-
electrical testing as per MIL–PRF–55681. For enhanced
reliability, KEMET also provides the following test level options
and conformance certications:
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability
Applications, C0G Dielectric, 10 – 250 VDC
Ordering Information
C1206 T104 K 5 G A C TU
Ceramic
Case Size
(L" x W")
Specication/
Series
Capacitance
Code (pF)
Capacitance
Tolerance1
Rated
Voltage
(VDC)
Dielectric Test Level Termination
Finish2
Packaging/
Grade (C-Spec)
0402
0603
0805
1206
1210
1812
2220
T = COTS Two signicant
digits and
number of zeros
Use 9 for
1.0 – 9.9 pF
Use 8 for
0.5 – .99 pF
e.g., 2.2 pF = 229
e.g., 0.5 pF = 508
B = ±0.10 pF
C = ±0.25 pF
D = ±0.5 pF
F = ± 1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
8 = 10
4 = 16
3 = 25
6 = 35
5 = 50
1 = 100
2 = 200
A = 250
G = C0G A = Testing per MIL-
PRF-55681 PDA 8%
B = Testing per MIL-
PRF-55681 PDA 8%, DPA
per EIA-469
C = Testing per MIL-
PRF-55681 PDA 8%, DPA
per EIA-469, Humidity per
MIL-STD-202, Method 103,
Condition A
C = 100%
Matte Sn
L = SnPb
(5% Pb
minimum)
See
"Packaging
C-Spec
Ordering
Options
Table"
1 Additional capacitance tolerance offerings may be available. Contact KEMET for details.
2 Additional termination nish options may be available. Contact KEMET for details.
Test Level A Test Level B Test Level C
Voltage Conditioning
DWV
IR@25°C
CAP
DF
Voltage Conditioning
DWV
IR@25°C
CAP
DF
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8% PDA 8% PDA 8%
C of C DPA DPA
C of C 85/85
C of C
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2© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Packaging C-Spec Ordering Options Table
Packaging Type1Packaging/Grade
Ordering Code (C-Spec)
Bulk Bag/Unmarked
Not required (Blank)
7" Reel/Unmarked
TU
13" Reel/Unmarked
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
7" Reel/Unmarked/2 mm pitch
2
7081
13" Reel/Unmarked/2 mm pitch
2
7082
1 Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.
1 The terms “Marked” and “Unmarked” pertain to laser marking option of capacitors. All packaging options labeled as “Unmarked” will contain
capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see “Capacitor Marking”.
2 The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case
size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
Benets
• −55°C to +125°C operating temperature range
• Lead (Pb)-free, RoHS and REACH compliant
• Voltage conditioning and post-electrical testing per
MIL–PRF–55681, Paragraph 4.8.3.1, Standard Voltage
Conditioning
• Destructive Physical Analysis (DPA) per EIA–469
• Humidity, steady state, low voltage (85/85) per
MIL–STD–202, Method 103, Condition A
• RoHS Compliant (excluding SnPb end metallization option)
• EIA 0402, 0603, 0805, 1206, 1210, 1812, and 2220 case
sizes
• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, 200 V
and 250 V
• Capacitance offerings ranging from 0.5 pF up to 0.47 μF
• Available capacitance tolerances of ±0.10 pF, ±0.25 pF, ±0.5
pF, ±1%, ±2%, ±5%, ±10%, and ±20%
• Certicate of compliance
• No piezoelectric noise
• Extremely low ESR and ESL
• High thermal stability
• High ripple current capability
• Preferred capacitance solution at line frequencies and into
the MHz range
• No capacitance change with respect to applied rated DC
voltage
• Negligible capacitance change with respect to temperature
• No capacitance decay with time
• Non-polar device, minimizing installation concerns
• SnPb end metallization option available upon request
(5% Pb minimum)
Applications
Typical applications include military, space quality and high reliability electronics.
3© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Dimensions – Millimeters (Inches)
L
B
W
S
T
EIA Size
Code
Metric Size
Code
L
Length
W
Width
T
Thickness
B
Bandwidth
S
Separation
Minimum
Mounting
Technique
0402 1005
1.00 (0.040)
±0.05 (0.002)
0.50 (0.020)
±0.05 (0.002)
See Table 2 for
Thickness
0.30 (0.012)
±0.10 (0.004)
0.30 (0.012)
0603 1608
1.60 (0.063)
±0.15 (0.006)
0.80 (0.032)
±0.15 (0.006)
0.35 (0.014)
±0.15 (0.006)
0.70 (0.028)
Solder Wave or
Solder Reow
0805 2012
2.00 (0.079)
±0.20 (0.008)
1.25 (0.049)
±0.20 (0.008)
0.50 (0.02)
±0.25 (0.010)
0.75 (0.030)
1206 3216
3.20 (0.126)
±0.20 (0.008)
1.60 (0.063)
±0.20 (0.008)
0.50 (0.02)
±0.25 (0.010)
N/A
1210 3225
3.20 (0.126)
±0.20 (0.008)
2.50 (0.098)
±0.20 (0.008)
0.50 (0.02)
±0.25 (0.010)
Solder Reow
Only
1812 4532
4.50 (0.177)
±0.30 (0.012)
3.20 (0.126)
±0.30 (0.012)
0.60 (0.024)
±0.35 (0.014)
2220 5650
5.70 (0.224)
±0.40 (0.016)
5.00 (0.197)
±0.40 (0.016)
0.60 (0.024)
±0.35 (0.014)
Qualication/Certication
Commercial Grade products are subject to internal qualication. Details regarding test methods and conditions are
referenced in Table 4, Performance & Reliability.
Environmental Compliance
Lead (Pb)-free, RoHS, and REACH compliant without exemptions (excluding SnPb termination nish option).
4© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Electrical Parameters/Characteristics
Item Parameters/Characteristics
Operating Temperature Range −55°C to +125°C
Capacitance Change with Reference to
+25°C and 0 VDC Applied (TCC) ±30 ppm/ºC
Aging Rate (Maximum % Capacitance Loss/Decade Hour) 0%
1Dielectric Withstanding Voltage (DWV)
250% of rated voltage
(5±1 seconds and charge/discharge not exceeding 50 mA)
2Dissipation Factor (DF) Maximum Limit at 25ºC 0.1%
3Insulation Resistance (IR) Limit at 25°C
1,000 megohm microfarads or 100 GΩ
(Rated voltage applied for 120±5 seconds at 25°C)
1 DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the
capacitor.
2 Capacitance and dissipation factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF
3 To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions:
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known
as Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
C0G All All 0.5
0.3% or ±0.25 pF
10% of Initial
Limit
5© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 1A – Capacitance Range/Selection Waterfall (0402 – 0805 Case Sizes)
*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)
KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage
capability within the same form factor (conguration and dimensions).
These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts.
Capacitance Cap
Code
Case Size/Series C0402T C0603T C0805T
Voltage Code 843512A843512A843512A
Rated Voltage (VDC)
10
16
25
50
100
200
250
10
16
25
50
100
200
250
10
16
25
50
100
200
250
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
0.50 & 0.75 pF 508 & 758 B C D BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
1.0 - 9.1 pF* 109 - 919* B C D BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
10 - 91 pF* 100 - 910* F G J K M BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
100 pF 101 F G J K M BB BB BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
110 - 180 pF* 111 -181* F G J K M BB BB BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
200 - 270 pF* 201 - 271* F G J K M BB BB BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
300 pF 301 F G J K M BB BB BB BB BB BD BD CF CF CF CF CF CF CF DN DN DN DN DN DN DN
330 pF 331 F G J K M BB BB BB BB BB BD BD CF CF CF CF CF CF CF DN DN DN DN DN DN DN
360 pF 361 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
390 pF 391 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
430 pF 431 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
470 pF 471 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DP DP
510 - 820 pF* 511 - 821* F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN
910 pF 911 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DP DP DP
1,000 pF 102 F G J K M BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DP DP DP
1,100 pF 112 F G J K M BB BB BB BB CF CF CF CF CF CH CH DN DN DN DN DN DN DN
1,200 pF 122 F G J K M BB BB BB BB CF CF CF CF CF CH CH DN DN DN DN DN DN DN
1,300 pF 132 F G J K M BB BB BB BB CF CF CF CF CF CH CH DP DP DP DP DP DN DN
1,500 pF 152 F G J K M BB BB BB BB CF CF CF CF CF CH CH DP DP DP DP DP DN DN
1,600 pF 162 F G J K M BB BB BB CF CF CF CF CF CH CH DP DP DP DP DP DN DN
1,800 pF 182 F G J K M BB BB BB CF CF CF CF CF CH CH DP DP DP DP DP DN DN
2,000 pF 202 F G J K M BB BB BB CF CF CF CF CF CH CH DN DN DN DN DN DN DN
2,200 pF 222 F G J K M BB BB BB CF CF CF CF CF CH CH DN DN DN DN DN DN DN
2,400 pF 242 F G J K M CF CF CF CF CF DN DN DN DN DN DN DN
2,700 pF 272 F G J K M CF CF CF CF CF DN DN DN DN DN DN DN
3,000 pF 302 F G J K M CF CF CF CF CF DP DP DP DP DN DN DN
3,300 pF 332 F G J K M CF CF CF CF CF DP DP DP DP DN DN DN
3,600 pF 362 F G J K M CF CF CF CF CF DP DP DP DP DN DP DP
3,900 pF 392 F G J K M CF CF CF CF CF DE DE DE DE DN DP DP
4,300 pF 432 F G J K M CF CF CF CF CF DE DE DE DE DN DP DP
4,700 pF 472 F G J K M CF CF CF CF CF DE DE DE DE DN DP DP
5,100 pF 512 F G J K M CF CF CF CF DE DE DE DE DN DP DP
5,600 pF 562 F G J K M CF CF CF CF DN DN DN DN DN DP DP
6,200 pF 622 F G J K M CF CF CF CF DN DN DN DN DN DG DG
6,800 pF 682 FG J K M CF CF CF CF DN DN DN DN DN DG DG
7,500 pF 752 F G J K M CF CF CF DN DN DN DN DN DG DG
8,200 pF 822 F G J K M CF CF CF DN DN DN DN DN DG DG
9,100 pF 912 F G J K M CF CF CF DN DN DN DN DN
10,000 pF 103 F G J K M CF CF CF DN DN DN DN DP
12,000 pF 123 F G J K M CF CF CF DN DN DN DN DE
15,000 pF 153 F G J K M CF CF CF DN DN DN DP DG
18,000 pF 183 F G J K M DN DN DN DP
22,000 pF 223 F G J K M DP DP DP DF
27,000 pF 273 F G J K M DF DF DF
33,000 pF 333 F G J K M DG DG DG
39,000 pF 393 F G J K M DG DG DG
47,000 pF 473 F G J K M DG DG DG
Capacitance Cap Code
Rated Voltage (VDC)
10
16
25
50
100
200
250
10
16
25
50
100
200
250
10
16
25
50
100
200
250
Voltage Code 843512A843512A843512A
Case Size/Series C0402T C0603T C0805T
6© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes)
*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)
KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage
capability within the same form factor (conguration and dimensions).
These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts.
Capacitance Cap
Code
Case Size/Series C1206T C1210T C1812T C2220T
Voltage Code 8 4 3 5 1 2 A 8 4 3 5 1 2 A 5 1 2 A 5 1 2
Rated Voltage (VDC)
10
16
25
50
100
200
250
10
16
25
50
100
200
250
50
100
200
250
50
100
200
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
1.0 - 9.1 pF* 109 - 919* B C D EB EB EB EB EB EB EB FB FB FB FB FB FB FB
10 - 91 pF* 100 - 910* F G J K M EB EB EB EB EB EB EB FB FB FB FB FB FB FB
100 - 430 pF* 101 - 431* F G J K M EB EB EB EB EB EB EB FB FB FB FB FB FB FB
470 - 910 pF* 471 - 911* F G J K M EB EB EB EB EB EB EB FB FB FB FB FB FB FB GB GB GB GB
1,000 pF 102 F G J K M EB EB EB EB EB EE EE FB FB FB FB FB FB FB GB GB GB GB
1,100 pF 112 F G J K M EB EB EB EB EB EB EB FB FB FB FB FB FB FB GB GB GB GB
1,200 pF 122 F G J K M EB EB EB EB EB EB EB FB FB FB FB FB FB FB GB GB GB GB
1,300 pF 132 F G J K M EB EB EB EB EC EC EC FB FB FB FB FB FC FC GB GB GB GB
1,500 pF 152 F G J K M EB EB EB EB ED EC EC FB FB FB FB FB FE FE GB GB GB GB
1,600 pF 162 F G J K M EB EB EB EB ED ED ED FB FB FB FB FB FE FE GB GB GB GB
1,800 pF 182 F G J K M EB EB EB EB ED ED ED FB FB FB FB FB FE FE GB GB GB GB
2,000 pF 202 F G J K M EB EB EB EB ED ED ED FB FB FB FB FC FE FE GB GB GB GB
2,200 pF 222 F G J K M EB EB EB EB EE EE ED FB FB FB FB FC FG FG GB GB GB GB
2,400 pF 242 F G J K M EB EB EB EB EC EC EC FB FB FB FB FC FC FC
2,700 pF 272 F G J K M EB EB EB EB EC EC EC FB FB FB FB FC FC FC GB GB GB GB
3,000 pF 302 F G J K M EC EC EC EC EC EB EB FB FB FB FB FC FF FF
3,300 pF 332 F G J K M EC EC EC EC EE EB EB FB FB FB FB FF FF FF GB GB GB GB
3,600 pF 362 F G J K M EC EC EC EC EE EB EB FB FB FB FB FF FF FF
3,900 pF 392 F G J K M EC EC EC EC EF EB EB FB FB FB FB FF FF FF GB GB GB GB
4,300 pF 432 F G J K M EC EC EC EC EC EB EB FB FB FB FB FF FF FF
4,700 pF 472 F G J K M EC EC EC EC EC EB EB FF FF FF FF FG FG FG GB GB GD GD
5,100 pF 512 F G J K M ED ED ED ED ED EB EB FB FB FB FB FG FG FG
5,600 pF 562 F G J K M ED ED ED ED ED EB EB FB FB FB FB FG FG FG GB GB GH GH
6,200 pF 622 F G J K M EB EB EB EB EB EB EB FB FB FB FB FG FB FB
6,800 pF 682 F G J K M EB EB EB EB EB EB EB FB FB FB FB FG FB FB GB GB GJ GJ JE JE JB
7,500 pF 752 F G J K M EB EB EB EB EB EB EB FC FC FC FC FC FB FB
8,200 pF 822 F G J K M EC EC EC EC EB EC EC FC FC FC FC FC FB FB GB GH GB GB JE JE JB
9,100 pF 912 F G J K M EC EC EC EC EB EC EC FE FE FE FE FE FB FB
10,000 pF 103 F G J K M ED ED ED ED EB EC EC FF FF FF FF FF FB FB GB GH GB GB JE JE JB
12,000 pF 123 F G J K M EB EB EB EB EB ED ED FG FG FG FG FB FB FB GB GG GB GB JE JE JB
15,000 pF 153 F G J K M EB EB EB EB EB EF EF FG FG FG FG FB FC FC GB GB GB GB JE JE JB
18,000 pF 183 F G J K M EB EB EB EB EB EH EH FB FB FB FB FB FC FC GB GB GB GB JE JE JB
22,000 pF 223 F G J K M EB EB EB EB EC EH EH FB FB FB FB FB FF FF GB GB GB GB JE JB JB
27,000 pF 273 F G J K M EB EB EB EB EE FB FB FB FB FB FG FG GB GB GB GB JE JB JB
33,000 pF 333 F G J K M EB EB EB EB EE FB FB FB FB FB FH FH GB GB GB GB JB JB JB
39,000 pF 393 F G J K M EC EC EC EE EH FB FB FB FB FE FH FH GB GB GB GB JB JB JB
47,000 pF 473 F G J K M EC EC EC EE EH FB FB FB FB FE FJ FJ GB GB GD GD JB JB JB
56,000 pF 563 F G J K M ED ED ED EF FB FB FB FB FF GB GB GD GD JB JB JB
68,000 pF 683 F G J K M EF EF EF EH FB FB FB FC FG GB GB GK GK JB JB JB
82,000 pF 823 F G J K M EH EH EH EH FC FC FC FF FH GB GB GM GM JB JB JB
0.10 µF 104 F G J K M EH EH EH FE FE FE FG FM GB GD GM GM JB JB JD
0.12 µF 124 F G J K M FG FG FG FH GB GH JB JB JD
0.15 µF 154 F G J K M FH FH FH FM GD GN JB JB JG
0.18 µF 184 F G J K M FJ FJ FJ GH JB JD JG
0.22 µF 224 F G J K M FK FK FK GK JB JD JL
0.27 µF 274 F G J K M JB JF
0.33 µF 334 F G J K M JD JG
0.39 µF 394 F G J K M JG
0.47 µF 474 F G J K M JG
Capacitance Cap
Code
Rated Voltage (VDC)
10
16
25
50
100
200
250
10
16
25
50
100
200
250
50
100
200
250
50
100
200
Voltage Code 8 4 3 5 1 2 A 8 4 3 5 1 2 A 5 1 2 A 5 1 2
Case Size/Series C1206T C1210T C1812T C2220T
7© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 2A – Chip Thickness/Tape & Reel Packaging Quantities
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
Paper Quantity1Plastic Quantity
7" Reel 13" Reel 7" Reel 13" Reel
BB
0402
0.50 ± 0.05
10,000
50,000
0
0
BD
0402
0.55 ± 0.05
10,000
50,000
0
0
CF
0603
0.80 ± 0.07
4,000
15,000
0
0
CH
0603
0.85 ± 0.07
4,000
10,000
0
0
DN
0805
0.78 ± 0.10
4,000
15,000
0
0
DP
0805
0.90 ± 0.10
4,000
15,000
0
0
DE
0805
1.00 ± 0.10
0
0
2,500
10,000
DF
0805
1.10 ± 0.10
0
0
2,500
10,000
DG
0805
1.25 ± 0.15
0
0
2,500
10,000
EB
1206
0.78 ± 0.10
0
0
4,000
10,000
EC
1206
0.90 ± 0.10
0
0
4,000
10,000
ED
1206
1.00 ± 0.10
0
0
2,500
10,000
EE
1206
1.10 ± 0.10
0
0
2,500
10,000
EF
1206
1.20 ± 0.15
0
0
2,500
10,000
EH
1206
1.60 ± 0.20
0
0
2,000
8,000
FB
1210
0.78 ± 0.10
0
0
4,000
10,000
FC
1210
0.90 ± 0.10
0
0
4,000
10,000
FE
1210
1.00 ± 0.10
0
0
2,500
10,000
FF
1210
1.10 ± 0.10
0
0
2,500
10,000
FG
1210
1.25 ± 0.15
0
0
2,500
10,000
FH
1210
1.55 ± 0.15
0
0
2,000
8,000
FM
1210
1.70 ± 0.20
0
0
2,000
8,000
FJ
1210
1.85 ± 0.20
0
0
2,000
8,000
FK
1210
2.10 ± 0.20
0
0
2,000
8,000
GB
1812
1.00 ± 0.10
0
0
1,000
4,000
GD
1812
1.25 ± 0.15
0
0
1,000
4,000
GH
1812
1.40 ± 0.15
0
0
1,000
4,000
GG
1812
1.55 ± 0.10
0
0
1,000
4,000
GK
1812
1.60 ± 0.20
0
0
1,000
4,000
GJ
1812
1.70 ± 0.15
0
0
1,000
4,000
GN
1812
1.70 ± 0.20
0
0
1,000
4,000
GM
1812
2.00 ± 0.20
0
0
500
2,000
JB
2220
1.00 ± 0.15
0
0
1,000
4,000
JD
2220
1.30 ± 0.15
0
0
1,000
4,000
JE
2220
1.40 ± 0.15
0
0
1,000
4,000
JF
2220
1.50 ± 0.15
0
0
1,000
4,000
JG
2220
1.70 ± 0.15
0
0
1,000
4,000
JL
2220
2.00 ± 0.20
0
0
500
2,000
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
7" Reel 13" Reel 7" Reel 13" Reel
Paper Quantity1Plastic Quantity
Package quantity based on nished chip thickness specications.
1 If ordering using the 2 mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA
0603 (1608 metric) case size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
8© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 2B – Bulk Packaging Quantities
Packaging Type Loose Packaging
Bulk Bag (default)
Packaging C-Spec1N/A2
Case Size Packaging Quantities (pieces/unit packaging)
EIA (in) Metric (mm) Minimum Maximum
0402
1005
1
50,000
0603
1608
0805
2012
1206
3216
1210
3225
1808
4520
20,000
1812
4532
1825
4564
2220
5650
2225
5664
1 The "Packaging C-Spec" is a 4 to 8 digit code which identies the packaging type and/or product grade. When ordering, the proper code must be
included in the 15th through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details.
Commercial Grade product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk
bag packaging option for Automotive Grade products.
2 A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The
15th through 22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to our
standard "Bulk Bag" packaging.
9© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C Y X V1 V2 C Y X V1 V2 C Y X V1 V2
0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80
0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20
0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70
1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00
1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90
121013225 1.50 1.60 2.90 5.60 3.90 1.40 1.40 2.80 4.70 3.30 1.30 1.20 2.70 4.00 3.00
1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70
2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60
1 Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow
solder processes. KEMET only recommends wave soldering of EIA 0603, 0805, and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform
qualication testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Image below based on Density Level B for an EIA 1210 case size.
Y
C C
X X
V1
V2
Grid Placement Courtyard
Y
10© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Soldering Process
Recommended Soldering Technique:
• Solder wave or solder reow for EIA case sizes 0603, 0805 and 1206
• All other EIA case sizes are limited to solder reow only
Recommended Reow Soldering Prole:
KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual),
convection, IR or vapor phase reow techniques. Preheating of these components is recommended to avoid extreme thermal
stress. KEMET’s recommended prole conditions for convection and IR reow reect the prole conditions of the IPC/
J-STD-020 standard for moisture sensitivity testing. These devices can safely withstand a maximum of three reow passes
at these conditions.
Prole Feature Termination Finish
SnPb 100% Matte Sn
Preheat/Soak
Temperature Minimum (TSmin)
100°C
150°C
Temperature Maximum (T
Smax
)150°C 200°C
Time (tS) from TSmin to TSmax
60 – 120 seconds
60 – 120 seconds
Ramp-Up Rate (TL to TP)3°C/second
maximum
3°C/second
maximum
Liquidous Temperature (TL)183°C 217°C
Time Above Liquidous (tL) 60 – 150 seconds 60 – 150 seconds
Peak Temperature (TP)235°C 260°C
Time Within 5°C of Maximum
Peak Temperature (t
P
)
20 seconds
maximum
30 seconds
maximum
Ramp-Down Rate (TP to TL)6°C/second
maximum
6°C/second
maximum
Time 25°C to Peak
Temperature
6 minutes
maximum
8 minutes
maximum
Note 1: All temperatures refer to the center of the package, measured on the
capacitor body surface that is facing up during assembly reow.
Time
Temperature
Tsmin
25
Tsmax
TL
TPMaximum Ramp-up Rate = 3°C/second
Maximum Ramp-down Rate = 6°C/second
tP
tL
ts
25°C to Peak
11© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress Reference Test or Inspection Method
Terminal Strength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex JIS–C–6429
Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm
for C0G. Flexible termination system – 3.0 mm (minimum).
Solderability J–STD–002
Magnication 50 X. Conditions:
a) Method B, 4 hours at 155°C, dry heat at 235°C
b) Method B at 215°C category 3
c) Method D, category 3 at 260°C
Temperature Cycling JESD22 Method JA–104
1,000 Cycles (−55°C to +125°C). Measurement at 24 hours +/− 4 hours after test
conclusion.
Biased Humidity MIL–STD–202 Method
103
Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
Moisture Resistance
MIL–STD–202 Method
106
t = 24 hours/cycle. Steps 7a and 7b not required.
Measurement at 24 hours +/− 4 hours after test conclusion.
Thermal Shock
MIL–STD–202 Method
107
−55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20
seconds, dwell time – 15 minutes. Air – Air.
High Temperature Life
MIL–STD–202 Method
108
/EIA–198
1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied.
Storage Life
MIL–STD–202 Method
108
150°C, 0 VDC for 1,000 hours.
Vibration MIL–STD–202 Method
204
5 g's for 20 min., 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7
secure points on one long side and 2 secure points at corners of opposite sides. Parts
mounted within 2" from any secure point. Test from 10 – 2,000 Hz
Mechanical Shock
MIL–STD–202 Method
213
Figure 1 of Method 213, Condition F.
Resistance to Solvents
MIL–STD–202 Method
215
Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in
other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,
and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp
and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum
storage humidity not exceed 70% relative humidity. Temperature uctuations should be minimized to avoid condensation on
the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock
should be used promptly, preferably within 1.5 years of receipt.
12© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Construction
Detailed Cross Section
Barrier Layer
(Ni)
Inner Electrodes
(Ni)
Barrier Layer
(Ni)
Inner Electrodes
(Ni)
Dielectric Material
(CaZrO3)
Dielectric Material
(CaZrO3)
Termination Finish
(100% Matte Sn /
SnPb - 5% Pb min)
Termination Finish
(100% Matte Sn /
SnPb - 5% Pb min)
End Termination/
External Electrode
(Cu)
End Termination/
External Electrode
(Cu)
Capacitor Marking (Optional)
Laser marking option is not available on:
• C0G, Ultra Stable X8R and Y5V dielectric devices
• EIA 0402 case size devices
• EIA 0603 case size devices with Flexible Termination option.
• KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
13© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with
EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for
details on reeling quantities for commercial chips.
8 mm, 12 mm
or 16 mm carrier tape
180 mm (7.00")
or
330 mm (13.00")
Anti-static reel
Embossed plastic* or
punched paper carrier.
Embossment or punched cavity
Anti-static cover tape
(0.10 mm (0.004") maximum thickness)
Chip and KPS orientation in pocket
(except 1825 commercial, and 1825 and 2225 Military)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
KEMET
®
Bar code label
Sprocket holes
Table 5 – Carrier Tape Con guration, Embossed Plastic & Punched Paper (mm)
EIA Case Size
Tape
Size
(W)*
Embossed Plastic Punched Paper
7" Reel 13" Reel 7" Reel 13" Reel
Pitch (P
1
)* Pitch (P
1
)*
01005 – 0402 8 2 2
0603 82/4 2/4
0805 84444
1206 – 1210 84444
1805 – 1808 12 4 4
≥ 1812 12 8 8
KPS 1210 12 8 8
KPS 1812
and 2220
16 12 12
Array 0612 844
*Refer to Figures 1 and 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 and 7 for tolerance speci cations.
New 2 mm Pitch Reel Options*
Packaging
Ordering Code
(C-Spec)
Packaging Type/Options
C-3190
Automotive grade 7" reel unmarked
C-3191
Automotive grade 13" reel unmarked
C-7081
Commercial grade 7" reel unmarked
C-7082
Commercial grade 13" reel unmarked
* 2 mm pitch reel only available for 0603 EIA case size.
2 mm pitch reel for 0805 EIA case size under development.
Bene ts of Changing from 4 mm to 2 mm Pitching Spacing
• Lower placement costs.
• Double the parts on each reel results in fewer reel
changes and increased effi ciency.
• Fewer reels result in lower packaging, shipping and
storage costs, reducing waste.
14© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P
0
T
F
W
Center Lines of Cavity
A
0
B
0
User Direction of Unreeling
Cover Tape
K
0
B
1
is for tape feeder reference only,
including draft concentric about B
0
.
T
2
ØD
1
ØD
0
B
1
S
1
T
1
E
1
E
2
P
1
P
2
Embossment
For cavity size,
see Note 1 Table 4
(10 pitches cumulative
tolerance on tape ±0.2 mm)
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0
D
1
Minimum
Note 1
E1P0 P2
R Reference
Note 2
S
1
Minimum
Note 3
T
Maximum
T
1
Maximum
8 mm
1.5 +0.10/−0.0
(0.059 +0.004/−0.0)
1.0
(0.039)
1.75 ±0.10
(0.069 ±0.004) 4.0 ±0.10
(0.157 ±0.004) 2.0 ±0.05
(0.079 ±0.002)
25.0
(0.984)
0.600
(0.024) 0.600
(0.024) 0.100
(0.004)
12 mm 1.5
(0.059) 30
(1.181)
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch
B
1
Maximum
Note 4
E
2
Minimum
F P1
T
2
Maximum
W
Maximum
A0,B0 & K0
8 mm Single (4 mm)
4.35
(0.171)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
2.5
(0.098)
8.3
(0.327)
Note 512 mm Single (4 mm)
and double (8 mm)
8.2
(0.323)
10.25
(0.404)
5.5 ±0.05
(0.217 ±0.002)
8.0 ±0.10
(0.315 ±0.004)
4.6
(0.181)
12.3
(0.484)
16 mm Triple (12 mm)
12.1
(0.476)
14.25
(0.561)
7.5 ±0.05
(0.138 ±0.002)
12.0 ±0.10
(0.157 ±0.004)
4.6
(0.181)
16.3
(0.642)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of the embossment
location and the hole location shall be applied independently of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
3. If S1 < 1.0 mm, there may not be enough area for a cover tape to be properly applied (see EIA Standard 481, paragraph 4.3, section b.)
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity de ned by A0, B0 and K0 shall surround the component with suffi cient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3.)
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape
(see Figure 4.)
(e) for KPS product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
15© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Figure 2 – Punched (Paper) Carrier Tape Dimensions
User Direction of Unreeling
Top Cover Tape
T
Center Lines of Cavity
P1
ØDo Po E1
F
E2
W
G
A0
B0
Cavity Size,
See
Note 1, Table 7
Bottom Cover Tape
T1
T1
Bottom Cover Tape
(10 pitches cumulative
tolerance on tape ±0.2 mm)
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D
0
E
1
P
0
P
2
T
1
Maximum G Minimum
R Reference
Note 2
8 mm 1.5 +0.10 -0.0
(0.059 +0.004 -0.0) 1.75 ±0.10
(0.069 ±0.004) 4.0 ±0.10
(0.157 ±0.004) 2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004)
maximum
0.75
(0.030) 25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0
8 mm Half (2 mm) 6.25
(0.246) 3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
1.1
(0.098)
8.3
(0.327)
Note 1
8 mm Single (4 mm)
4.0 ±0.10
(0.157 ±0.004)
8.3
(0.327)
1. The cavity de ned by A0, B0 and T shall surround the component with suffi cient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
c) rotation of the component is limited to 20° maximum (see Figure 3.)
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4.)
e) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
16© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width Peel Strength
8 mm 0.1 to 1.0 newton (10 to 100 gf)
12 and 16 mm 0.1 to 1.3 newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be
165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of
300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
Ao
Bo
°
T
°
s
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Tape Maximum
Width (mm) Rotation (°
T)
8,12 20
16 – 200 10 Tape Maximum
Width (mm) Rotation ( °
S)
8,12 20
16 – 56 10
72 – 200 5
Typical Pocket Centerline
Typical Component Centerline
Figure 4 – Maximum Lateral Movement
0.5 mm maximum
0.5 mm maximum
8 mm & 12 mm Tape
1.0 mm maximum
1.0 mm maximum
16 mm Tape
Figure 5 – Bending Radius
RR
Bending
Radius
Embossed
Carrier
Punched
Carrier
17© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Figure 6 – Reel Dimensions
AD(See Note)
Full Radius,
See Note
B(see Note)
Access Hole at
Slot Location
(Ø 40 mm minimum)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
W3(Includes
flange distortion
at outer edge)
W2(Measured at hub)
W1(Measured at hub)
C
(Arbor hole
diameter)
Note: Drive spokes optional; if used, dimensions B and D shall apply.
N
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size A B Minimum CD Minimum
8 mm 178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059) 13.0 +0.5/−0.2
(0.521 +0.02/−0.008) 20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size N Minimum W1 W2 Maximum W3
8 mm
50
(1.969)
8.4 +1.5/−0.0
(0.331 +0.059/−0.0)
14.4
(0.567)
Shall accommodate tape
width without interference
12 mm
12.4 +2.0/−0.0
(0.488 +0.078/−0.0)
18.4
(0.724)
16 mm
16.4 +2.0/−0.0
(0.646 +0.078/−0.0)
22.4
(0.882)
18© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Figure 7 – Tape Leader & Trailer Dimensions
Trailer
160 mm minimum
Carrier Tape
END START
Round Sprocket Holes
Elongated Sprocket Holes
(32 mm tape and wider)
Top Cover Tape
Top Cover Tape
Punched Carrier
8 mm & 12 mm only
Embossed Carrier
Components
100 mm
minimum leader
400 mm minimum
Figure 8 – Maximum Camber
Carrier Tape
Round Sprocket Holes
1 mm maximum, either direction
Straight Edge
250 mm
Elongated Sprocket Holes
(32 mm & wider tapes)
19© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1026_C0G_COTS_SMD • 9/15/2020
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
KEMET Electronics Corporation Sales Offi ces
For a complete list of our global sales offi ces, please visit www.kemet.com/sales.
Disclaimer
All product speci cations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for
checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed. All Information given
herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such
applications, but are not intended to constitute – and KEMET speci cally disclaims – any warranty concerning suitability for a speci c customer application or use.
The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any
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no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component
failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards
(such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury
or property damage.
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measures may not be required.
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