Single Driver for GaAs FET Switches and Attenuators
Rev. V3
MADRCC0005
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M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make
changes to the product(s) or information contained herein without notice.
2 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions
is considering for development. Performance is based on target specifications, simulated results,
and/or prototype measurements. Commitment to develop is not guaranteed.
PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology
Solutions has under development. Performance is based on engineering tests. Specifications are
typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available.
Commitment to produce in volume is not guaranteed.
Symbol Parameter Test Conditions Units Min Typ Max
VIH Input HIGH Voltage Guaranteed HIGH Input Voltage V 2.0 — -
VIL Input LOW Voltage Guaranteed LOW Input Voltage V - — 0.8
VOH Output HIGH Voltage IOH = -1 mA VEE = Max V - 0.1 — -
VOL Output LOW Voltage IOL = 1 mA VEE = Max V — — VEE + 0.1
IIN Input Leakage Current VIN = VCC or GND VEE = Min µA -1.0 0 1.0
ICC Quiescent Supply Current VCC = Max VEE = Min
VIN = VCC or GND µA — — 400
TPHL, TPLH Propagation Delay Guaranteed -40° C to + 85° C nS — — 50
TTHL, TTLH Output Transition Time Guaranteed -40° C to + 85° C nS — — 25
Delay Skew,
Output A to Output B Guaranteed -40° C to + 85° C nS — — 8
AC & DC Characteristics Over Guaranteed Operating Range
See Switching Wave Forms for the definition of the switching terms.
Supplies must be by-passed with .01 µF Capacitors.
Switching Waveforms
TF TR
TTLH TTHL
TPLH TPHL
1.3 V
90%
50%
10%
90%
10%
INPUT
VIN
GND
LOGIC 1
LOGIC 0
OUTPUT A
VOUT
OUTPUT B VEE
Absolute Maximum Ratings2,3
Parameter Abso lute Maximum
VCC - .5V to + 6.0 V
VEE - 6.0 V to - .5 V
VCC - VEE 12 V
V IN 4 VCC + .5 V
V OUT VEE - .5 V
Storage Temperature -65°C to +150°C
2. Exceeding any one or combination of these limits may cause
permanent damage to this device.
3. M/A-COM does not recommend sustained operation near
these survivability limits.
4. Standard CMOS TTL interface, latch-up will occur if logic
signal is applied prior to power supply.
Handling Procedures
Please observe the following precautions to avoid
damage:
Static Sensitivity
Silicon Integrated Circuits are sensitive to
electrostatic discharge (ESD) and can be damaged
by static electricity. Proper ESD control techniques
should be used when ha ndling these devices.
Truth Table
Input Outputs
VIN A B
0 VEE GND
1 GND VEE