Digital Step Attenuator 75 DC-2000 MHz 31.5 dB, 0.5 dB Step 6 Bit, Parallel Control Interface, Dual Supply Voltage Product Features * Dual Supply Voltage: VDD=+3V, VSS=-3V * Immune to latch up * Excellent accuracy, 0.1 dB Typ * Parallel control interface * Fast switching control frequency, 1 MHz Typ. * Low Insertion Loss * High IP3, +52 dBm Typ. * Very low DC power consumption * Excellent return loss, 20 dB Typ * Small size 4.0 x 4.0 mm DAT-31575-PN+ DAT-31575-PN + RoHS compliant in accordance with EU Directive (2002/95/EC) The +Suffix identifies RoHS Compliance. See our web site for RoHS Compliance methodologies and qualifications. Typical Applications * Base Station Infrastructure * Portable Wireless * CATV & DBS * MMDS & Wireless LAN * Wireless Local Loop * UNII & Hiper LAN * Power amplifier distortion canceling loops General Description The DAT-31575-PN is a 75 RF digital step attenuator that offers an attenuation range up to 31.5 dB in 0.5 dB steps. The control is a 6-bit parallel interface, operating on dual supply voltage: VDD=+3V, VSS=-3V. The DAT-31575-PN is produced using a unique CMOS process on silicon, offering the performance of GaAs, with the advantages of conventional CMOS devices. Simplified Schematic RF Input 16dB 4dB 8dB 2dB 1dB 0.5dB RF Out Parallel Control Latch Enable Internal Control Logic Interface '. )''#$/&-')# . REV. C M112685 ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ DAT-31575-PN 071002 Page 1 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator RF Electrical Specifications, DC-2000 MHz, TAMB=25C, VDD=+3V, VSS=-3V Freq. Range (GHz) Parameter Min. Typ. Max. Units DC-1.2 -- 0.03 0.17 dB 1.2-2.0 -- 0.05 0.18 dB DC-1.2 -- 0.03 0.24 dB 1.2-2.0 -- 0.1 0.25 dB Accuracy @ 0.5 dB Attenuation Setting Accuracy @ 1 dB Attenuation Setting Accuracy @ 2 dB Attenuation Setting Accuracy @ 4 dB Attenuation Setting Accuracy @ 8 dB Attenuation Setting Accuracy @ 16 dB Attenuation Setting Insertion Loss(note1) @ all attenuator set to 0dB Input IP3(note 2) (at Min. and Max. Attenuation) Input Power @ 0.2dB Compression (at Min. and Max. Attenuation) DC-1.2 -- 0.07 0.28 dB 1.2-2.0 -- 0.15 0.3 dB DC-1.2 -- 0.05 0.36 dB 1.2-2.0 -- 0.15 0.4 dB DC-1.2 -- 0.1 0.52 dB 1.2-2.0 -- 0.24 0.6 dB DC-1.2 -- 0.23 0.84 dB 1.2-2.0 -- 0.8 1.0 dB DC-1.2 -- 1.2 1.8 dB 1.2-2.0 -- 1.6 2.1 dB DC-2.0 -- +52 -- dBm DC-2.0 -- +24 -- dBm (note 2) VSWR DC-1.2 -- 1.6 2.0 -- 1.2-2.0 -- 1.7 2.0 -- Notes: 1. I. Loss values are de-embedded from test board Loss (test board's Insertion Loss: 0.10dB @100MHz, 0.40dB @1200MHz, 0.55dB @2000MHz, 0.75dB @4000MHz) 2. Input IP3 and 1dB compression degrades below 1 MHz DC Electrical Specifications Parameter Min. Typ. Max. Units V VDD, Supply Voltage 2.7 3 3.3 VSS, Supply Voltage -3.3 -3 -2.7 V -- -- 100 A V IDD (ISS), Supply Current Control Input Low -- -- 0.3xVDD Control Input High 0.7xVDD -- -- V -- -- 1 A Control Current Switching Specifications Parameter Min. Typ. Max. Units Switching Speed, 50% Control to 0.5dB of Attenuation Value -- 1.0 -- Sec Switching Control Frequency -- 1.0 -- MHz Absolute Maximum Ratings Parameter Ratings Operating Temperature -40C to 85C Storage Temperature -55C to 100C -0.3V Min., 4V Max. VDD VSS -4V Min., 0.3V Max. Voltage on any input -0.3V Min., VDD+0.3V Max. ESD, HBM 500V ESD, MM 100V Input Power +24dBm '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 2 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator C16 1 4 Ground connection RFin 2 LE 5 Latch Enable Input (Note 2) VDD 6 Positive Supply Voltage PUP1 7 Power-up selection bit PUP2 8 Power-up selection bit Positive Supply Voltage Ground connection GND 11 Ground connection VSS 12 Negative Supply Voltage GND 13 Ground Connection LE 5 6 9 10 3 4 2x2mm Paddle ground VDD VDD GND N/C GND RF out 14 RF out port (Note 1) C8 15 Control for attenuation bit, 8 dB C4 16 Control for attenuation bit, 4 dB C2 17 Control for attenuation bit, 2 dB GND 18 Ground Connection C1 19 Control for attenuation bit, 1 dB C0.5 20 Control for attenuation bit, 0.5 dB GND Paddle 16 C4 Not connected (Note 4) GND 15 C8 14 RFout 13 GND 12 VSS 11 GND 10 RF in port (Note 1) 3 GND 2 N/C 17 C2 RF in 9 Control for Attenuation bit, 16dB (Note 3) VDD 1 18 GND C16 Description PUP2 8 Pin Number 20 C0.5 Function 19 C1 Pin Configuration (Top View) PUP1 7 Pin Description Paddle ground (Note 5) Notes: 1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor. 2. Latch Enable (LE) has an internal 100K resistor to VDD. 3. Place a 10K resistor in series, as close to pin as possible to avoid freq. resonance. 4. Place a shunt 10K resistor to GND. 5. The exposed solder pad on the bottom of the package (See Pin configuration) must be grounded for proper device operation. '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 3 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Typical Performance Curves INSERTION LOSS (Ref) @ +25C, +85C, -45C 7 ATTENUATION (0.5dB) @ +25C, +85C, -45C 1 6 +85C 0.8 -45C +25C +85C +25C 5 0.6 4 (dB) (dB) -45C 3 0.4 2 0.2 1 0 0 0 500 1000 1500 2000 2500 3000 0 500 1000 Frequency (MHz) ATTENUATION (1dB) @ +25C, +85C, -45C 1.4 1500 2000 2500 3000 Frequency (MHz) ATTENUATION (2dB) @ +25C, +85C, -45C 2.6 -45C +25C +85C 2.4 1.2 -45C +25C +85C (dB) (dB) 1 2.2 2 1.8 0.8 1.6 0.6 1.4 1.2 0.4 0 500 1000 1500 2000 2500 0 3000 500 1000 ATTENUATION (4dB) @ +25C, +85C, -45C 4.6 2000 2500 3000 ATTENUATION (8dB) @ +25C, +85C, -45C 8.6 -45C +25C +85C 4.4 -45C +25C +85C 8.4 8.2 4.2 8 7.8 (dB) 4 (dB) 1500 Frequency (MHz) Frequency (MHz) 3.8 3.6 7.6 7.4 7.2 7 3.4 6.8 3.2 6.6 3 6.4 0 500 1000 1500 2000 2500 3000 0 500 1000 Frequency (MHz) 1500 2000 2500 3000 Frequency (MHz) '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 4 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Typical Performance Curves ATTENUATION (16dB) @ +25C, +85C, -45C -45C +25C +85C 16.5 16 -45C +25C +85C 32 31 30 15.5 29 (dB) 15 (dB) ATTENUATION (31.5dB) @ +25C, +85C, -45C 33 17 14.5 14 28 27 26 13.5 25 13 24 12.5 23 12 22 0 500 1000 1500 2000 2500 3000 0 500 1000 Frequency (MHz) RETURN LOSS IN S11 (Ref) @ +25C, +85C, -45C 50 1500 2000 2500 3000 Frequency (MHz) -45C +25C +85C 40 RETURN LOSS OUT S22 (Ref) @ +25C, +85C, -45C 50 -45C +25C +85C 40 30 (dB) (dB) 30 20 20 10 10 0 0 0 500 1000 1500 2000 2500 0 3000 500 1000 1500 2500 3000 RETURN LOSS OUT S22 (Major Attenuation Steps) @ +25C RETURN LOSS IN S11 (Major Attenuation Steps) @ +25C 50 2000 Frequency (MHz) Frequency (MHz) 50 40 30 30 (dB) (dB) 40 20 20 ATT=0dB ATT=1dB ATT=4dB ATT=16dB 10 ATT=0.5dB ATT=2dB ATT=8dB ATT=31.5dB ATT=0dB ATT=1dB ATT=4dB ATT=16dB 10 0 ATT=0.5dB ATT=2dB ATT=8dB ATT=31.5dB 0 0 500 1000 1500 2000 2500 3000 0 500 1000 Frequency (MHz) 1500 2000 2500 3000 Frequency (MHz) '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 5 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Typical Performance Curves 70 60 60 50 50 ATT=0dB ATT=0.5dB ATT=1dB ATT=2dB ATT=4dB ATT=8dB ATT=16dB ATT=31.5dB 40 30 20 10 (dBm) (dBm) IP-3 INPUT (Major Attenuation Steps) @ +25C 70 IP-3 INPUT (Major Attenuation Steps) @ +85C 40 ATT=0dB ATT=0.5dB ATT=1dB ATT=2dB ATT=4dB ATT=8dB ATT=16dB ATT=31.5dB 30 20 10 0 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 800 Frequency (MHz) 1600 1800 2000 60 0.1 50 0 ATT=0dB ATT=0.5dB ATT=1dB ATT=2dB ATT=4dB ATT=8dB ATT=16dB ATT=31.5dB 40 30 10 -0.1 (dB) (dBm) 1400 0.2 20 -0.2 -0.3 -0.4 0 ATT=0dB ATT=1dB ATT=4dB ATT=0.5dB ATT=2dB ATT=8dB ATT=16dB ATT=31.5dB -0.5 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 800 Frequency (MHz) 1000 1200 1400 1600 1800 2000 Frequency (MHz) COMPRESSION @INPUT POWER=+24dBm (+85C) 0.2 0.2 0.1 0.1 0 0 -0.1 -0.1 COMPRESSION @INPUT POWER=+24dBm(-45C) (dB) (dB) 1200 COMPRESSION @INPUT POWER=+24dBm (+25C) IP-3 INPUT (Major Attenuation Steps) @ -45C 70 1000 Frequency (MHz) -0.2 -0.2 -0.3 ATT=0dB ATT=1dB ATT=4dB ATT=16dB -0.4 -0.3 ATT=0.5dB ATT=2dB ATT=8dB ATT=31.5dB ATT=0dB ATT=1dB ATT=4dB ATT=16dB -0.4 -0.5 ATT=0.5dB ATT=2dB ATT=8dB ATT=31.5dB -0.5 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 Frequency (MHz) 800 1000 1200 1400 1600 1800 2000 Frequency (MHz) '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 6 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Outline Drawing (DG983-1) PCB Land Pattern Suggested Layout, Tolerance to be within .002 Device Marking 31575 Outline Dimensions (inch mm ) WT. GRAMS A B C D E F G H J K L M N P Q R .157 .157 .035 .008 .081 .081 .010 -- .022 .020 .166 .166 .070 .012 .020 .070 4.00 4.00 0.90 0.20 2.06 2.06 0.25 -- 0.56 0.50 4.22 4.22 1.78 0.31 0.51 1.78 .04 '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 7 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Suggested Layout for PCB Design (PL-183) The suggested Layout shows only the footprint area of the DAT, and the components located near this area (i.e.: R1, R7). For the complete Layout, see photo and schematic diagram on page 11 of 12. NOTES: 1. TRACE WIDTH IS SHOWN FOR FR4 WITH DIELECTRIC THICKNESS. .025" .002". COPPER: 1/2 OZ. EACH SIDE. FOR OTHER MATERIALS TRACE WIDTH MAY NEED TO BE MODIFIED. 2. 0603, 0402 SIZE CHIP FOOT PRINTS SHOWN FOR REFERENCE, VALUES OF RESISTORS WILL VARY BASED ON APPLICATION. 3. BOTTOM SIDE OF THE PCB IS CONTINUOUS GROUND PLANE. DENOTES PCB COPPER LAYOUT WITH SMOBC (SOLDER MASK OVER BARE COPPER) DENOTES COPPER LAND PATTERN FREE OF SOLDERMASK '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 8 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Simplified Schematic RF Input 16dB 8dB 4dB 2dB 0.5dB 1dB RF Out Parallel Control Internal Control Logic Interface Latch Enable The DAT-31575-PN parallel interface consists of 6 control bits that select the desired attenuation state, as shown in Table 1: Truth Table Table 1. Truth Table Attenuation State C16 C8 C4 C2 C1 C0.5 Reference 0 0 0 0 0 0 0.5 (dB) 0 0 0 0 0 1 1 (dB) 0 0 0 0 1 0 2 (dB) 0 0 0 1 0 0 4 (dB) 0 0 1 0 0 0 8 (dB) 0 1 0 0 0 0 16 (dB) 1 0 0 0 0 0 31.5 (dB) 1 1 1 1 1 1 Note: Not all 64 possible combinations of C0.5 - C16 are shown in table The parallel interface timing requirements are defined by Figure 1 (Parallel Interface Timing Diagram) and Table 2 (Parallel Interface AC Characteristics), and switching speed. For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenuation state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device. For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation state control values will change device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Figure 1: Parallel Interface Timing Diagram LE Table 2. Parallel Interface AC Characteristics Symbol Parallel Data C16:C0.5 tPDSUP tLEPW Parameter Min. Max. Units tLEPW LE minimum pulse width 10 ns tPDSUP Data set-up time before clock rising edge of LE 10 ns tPDHLD Data hold time after clock falling edge of LE 10 ns tPDHLD '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 9 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Power-up Control Settings The DAT-31575-PN always assumes a specifiable attenuation setting on power-up, allowing a known attenuation state to be established before an initial parallel control word is provided. When the attenuator powers up with LE=0, the control bits are automatically set to one of four possible values .These four values are selected by the two power-up control bits,PUP1 and PUP2 ,as shown in Table 3: (Power-Up Truth Table, Parallel Mode). Table 3. Power-Up Truth Table, Parallel Mode Attenuation State PUP1 PUP2 LE Reference 0 0 0 8 (dB) 0 1 0 16 (dB) 1 0 0 31 (dB) 1 1 0 Defined by C0.5-C16 (See Table 1-Truth Table) X (Note 1) X (Note 1) 1 Note 1: PUP1 and PUP2 Connection may be 0, 1, GROUND, or not connect, without effect on attenuation state. Power-Up with LE=1 provides normal parallel operation with C0.5-C16, and PUP1 and PUP2 are not active. '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 10 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator 1 2 GND VDD 13 12 11 5 6 7 8 C2 C4 C8 GND 3 10 4 C1 2 C0.5 1 C16 DC SUPPLY J2.2 GND TB-341 Evaluation Board Schematic Diagram 9 8 IC1 14 1 2 3 PARALLEL CONTROL J1.1 13 7 4 5 12 11 1 + C1 9 8 IC2 714 6 10 2 7 3 4 5 6 C2 C4 C6 R2 C16 19 18 16 15 2 14 17 DAT N/C 13 4 IC3 6 + GND GND 11 10 C13 2 3 4 GND C10 1 Vss R10 + 5 GND C11 R9 LE CONTROL J1.2 9 VDD 8 PUP2 PUP1 7 VDD 1 6 VDD LE GND 5 LE R8 C12 Vss 2 2 RFout GND 12 GND C9 R6 C8 RFout 3 1 R5 C4 1 RFin R7 C8 R4 C2 C1 20 RFin C7 R3 C0.5 R1 GND C3 C5 DC SUPPLY J2.1 Bill of Materials R1 - R8 Resistor 0603 10 KOhm +/- 1% R10, R11 Resistor 0603 470 Ohm +/- 1% R9 Resistor 0402 10 KOhm +/- 1% C2 - C10 & C13 NPO Capacitor 0603 100pF +/- 5% C1, C11 & C12 Tantalum Capacitor 100nF +/- 10% IC1, IC2 Hex inverting Schmitt trigger MM74HC14 IC3 Dual non-inverting Schmitt trigger SN74LVC2G17 TB-341 '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 11 of 12 DAT-31575-PN+ DAT-31575-PN Digital Step Attenuator Tape and Reel Packaging Information Table T&R TR No. No. of Devices Designation Letter Reel Size 3000 T 13 inch T-005 multiples of 10, less than full reel of 1K PR 13 inch multiples of 10, on tape only E not applicable Tape Width Pitch 12 mm 8 mm Unit Orientation Tape Cavity Direction of Feed Ordering Information Model No. Description DAT-31575-PN (+) Parallel Interface, Dual Voltage (Negative and Positive) TB-341 Test Board Only Packaging Designation Letter (See Table T&R) Quantity Min. No. of Units Price $ Ea. E 10 $3.80 Not Applicable 1 $79.95 How to Order Example: 3000 pieces of DAT-31575-PN+ 1K DAT-31575-PN+ Quantity T&R=T Model No. T&R designation letter (see Table T&R) '. )''#$/&-')# . ')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+ Page 12 of 12